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[/] [2d_game_console/] [trunk/] [Processor_Quartus/] [Genesis_6button_Interface.v.bak] - Rev 2
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module Genesis_6button_Interface(
clock,
reset,
mem_grant,
up_z,
down_y,
left_x,
right_mode,
b_a,
c_start,
v_sync,
int_ack,
mem_addr,
mem_data,
mem_wren,
mem_req,
counter,
buttons,
current_state,
next_state,
select,
v_sync_flag,
int_req
);
input up_z;
input down_y;
input left_x;
input right_mode;
input b_a;
input c_start;
input mem_grant;
input int_ack;
input v_sync;
input clock;
input reset;
output reg [19:0] counter;
output reg [15:0] buttons;
output reg [15:0] mem_addr;
output reg [15:0] mem_data;
output reg mem_wren;
output reg mem_req;
output reg int_req;
output reg select;
output v_sync_flag;
/*########################################################################*/
/*################# Video vertical sync edge-detection #################*/
/*########################################################################*/
reg v_sync_delay;
always @ (posedge clock)
begin
v_sync_delay <= v_sync;
end
assign v_sync_flag = ~v_sync & v_sync_delay;
/*########################################################################*/
/*########################################################################*/
/*########################################################################*/
/*######################## FINITE STATE MACHINE ########################*/
/*######################## SEGA GENESIS ########################*/
/*######################## 6-BUTTON CONTROLLER ########################*/
/*########################################################################*/
output reg [3:0] current_state;
output reg [3:0] next_state;
// States
parameter Reset = 4'b0000; // Reset = 0
parameter Wait_Frame = 4'b0001; // Wait_Frame = 1
parameter Step_0 = 4'b0010; // Step_0 = 2
parameter Step_1 = 4'b0011; // Step_1 = 3
parameter Step_2 = 4'b0100; // Step_2 = 4
parameter Step_3 = 4'b0101; // Step_3 = 5
parameter Step_4 = 4'b0110; // Step_4 = 6
parameter Step_5 = 4'b0111; // Step_5 = 7
parameter Step_6 = 4'b1000; // Step_6 = 8
parameter Step_7 = 4'b1001; // Step_7 = 9
parameter Write_Data = 4'b1010; // Write_Data = 10
parameter Wait_Mem = 4'b1011; // Wait_Mem = 11
parameter Int_Req = 4'b1100; // Int_Req = 12
// Next State Decoder
always @ (*)
begin
case (current_state)
// State 0
Reset:
begin
next_state = Wait_Frame;
end
// State 1
Wait_Frame:
begin
//if (counter > 840000)
// next_state = Step_0;
//else
// next_state = Wait_Frame;
//ATENÇÃO!!!!!!!!
if (v_sync_flag)
next_state = Step_0;
else
next_state = Wait_Frame;
end
// State 2
Step_0:
begin
if (counter > 1000)
next_state = Step_1;
else
next_state = Step_0;
end
// State 3
Step_1:
begin
if (counter > 1000)
next_state = Step_2;
else
next_state = Step_1;
end
// State 4
Step_2:
begin
if (counter > 1000)
next_state = Step_3;
else
next_state = Step_2;
end
// State 5
Step_3:
begin
if (counter > 1000)
next_state = Step_4;
else
next_state = Step_3;
end
// State 6
Step_4:
begin
if (counter > 1000)
next_state = Step_5;
else
next_state = Step_4;
end
// State 7
Step_5:
begin
if (counter > 1000)
next_state = Step_6;
else
next_state = Step_5;
end
// State 8
Step_6:
begin
if (counter > 1000)
next_state = Step_7;
else
next_state = Step_6;
end
// State 9
Step_7:
begin
if (counter <= 1000)
begin
next_state = Step_7;
end
else if ( (counter > 1000) && (buttons != mem_data) && (buttons != 0) && (! int_ack) )
begin
next_state = Write_Data;
end
else if ( (counter > 1000) && (buttons == mem_data) && (buttons != 0) && (! int_ack) )
begin
next_state = Int_Req;
end
else
begin
next_state = Wait_Frame;
end
end
// State 10
Write_Data:
begin
if (mem_grant)
next_state = Wait_Mem;
else
next_state = Write_Data;
end
// State 11
Wait_Mem:
begin
next_state = Int_Req;
end
// State 12
Int_Req:
begin
if (int_ack)
next_state = Wait_Frame;
else
next_state = Int_Req;
end
default:
begin
next_state = Reset;
end
endcase
end
// Output Decoder
always @ (*)
begin
// Default Assignments
select = 1;
mem_addr = 16'd1025;
mem_wren = 0;
mem_req = 0;
int_req = 0;
case (current_state)
// State 0
Reset:
begin
end
// State 1
Wait_Frame:
begin
end
// State 2
Step_0:
begin
end
// State 3
Step_1:
begin
select = 0;
end
// State 4
Step_2:
begin
end
// State 5
Step_3:
begin
select = 0;
end
// State 6
Step_4:
begin
end
// State 7
Step_5:
begin
select = 0;
end
// State 8
Step_6:
begin
end
// State 9
Step_7:
begin
select = 0;
end
// State 10
Write_Data:
begin
mem_wren = 1;
mem_req = 1;
end
// State 11
Wait_Mem:
begin
mem_wren = 1;
mem_req = 1;
end
// State 12
Int_Req:
begin
int_req = 1;
end
default:
begin
end
endcase
end
// State Register and Reset Logic
always @ (posedge clock)
begin
if (reset)
begin
current_state <= Reset;
// State: Reset
mem_data <= 16'd0;
buttons <= 16'd0;
counter <= 20'd0;
end
else
begin
current_state <= next_state;
// State: Wait_Frame
//if (next_state == Wait_Frame)
// counter <= counter + 1'b1;
// State: Step_0
if (next_state == Step_0)
begin
if (counter > 1000)
counter <= 0;
else
counter <= counter + 1'b1;
end
// State: Step_1
if (next_state == Step_1)
begin
buttons[6] <= ~ b_a;
buttons[7] <= ~ c_start;
if (counter > 1000)
counter <= 0;
else
counter <= counter + 1'b1;
end
// State: Step_2
if (next_state == Step_2)
begin
buttons[0] <= ~ up_z;
buttons[1] <= ~ down_y;
buttons[2] <= ~ left_x;
buttons[3] <= ~ right_mode;
buttons[4] <= ~ b_a;
buttons[5] <= ~ c_start;
if (counter > 1000)
counter <= 0;
else
counter <= counter + 1'b1;
end
// State: Step_3
if (next_state == Step_3)
begin
if (counter > 1000)
counter <= 0;
else
counter <= counter + 1'b1;
end
// State: Step_4
if (next_state == Step_4)
begin
if (counter > 1000)
counter <= 0;
else
counter <= counter + 1'b1;
end
// State: Step_5
if (next_state == Step_5)
begin
if (counter > 1000)
counter <= 0;
else
counter <= counter + 1'b1;
end
// State: Step_6
if (next_state == Step_6)
begin
buttons[8] <= ~ up_z;
buttons[9] <= ~ down_y;
buttons[10] <= ~ left_x;
buttons[11] <= ~ right_mode;
if (counter > 1000)
counter <= 0;
else
counter <= counter + 1'b1;
end
// State: Step_7
if (next_state == Step_7)
begin
if (counter > 1000)
counter <= 0;
else
counter <= counter + 1'b1;
end
// State: Write_Data
if (next_state == Write_Data)
begin
mem_data <= buttons;
end
end
end
/*########################################################################*/
/*########################################################################*/
endmodule