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[/] [2d_game_console/] [trunk/] [Processor_Quartus/] [Processor_Controller.v.bak] - Rev 2

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module Processor_Controller(

instruction,
clock,
reset,
add_overflow,
add_result,     
sub_overflow,
sub_result,     
mult_result,
divide_quotient,
divide_remain,
compare_aeb,
compare_agb,
compare_alb,

program_rom_addr,
opcode,
reg_a_num,
reg_b_num,
reg_c_num,
imm,
rflags_index,
const_bool,

sprite_level,
sprite_id,
sprite_x,
sprite_y,
sprite_color,

reg_c_val,
reg_b_val,
reg_a_val,

current_state,
next_state,
program_counter,
registers,
rflags

);


input   [31:0]  instruction;
input           [15:0]  add_result;
input           [15:0]  sub_result;
input           [31:0]  mult_result;
input           [15:0]  divide_quotient;
input           [15:0]  divide_remain;
input           add_overflow;
input           sub_overflow;
input           compare_aeb;
input           compare_agb;
input           compare_alb;
input   clock;
input   reset;


output                          const_bool;
output  [2:0]           rflags_index;
output  [4:0]           reg_a_num;
output  [4:0]           reg_b_num;
output  [4:0]           reg_c_num;
output  [5:0]           opcode;
output  [15:0]  imm;

output reg      [15:0]  reg_a_val;
output reg      [15:0]  reg_b_val;
output reg      [15:0]  reg_c_val;

output reg      [15:0]  program_rom_addr;
output reg      [15:0]  program_counter;
output reg      [511:0] registers;
output reg      [6:0]           rflags;

output reg      [5:0]           sprite_level;
output reg      [383:0] sprite_id;
output reg      [639:0] sprite_x;
output reg      [639:0] sprite_y;
output reg      [1023:0]        sprite_color;

assign  opcode                  =       instruction[31:26];
assign  reg_a_num               =       instruction[25:21];
assign  reg_b_num               =       instruction[20:16];
assign  reg_c_num               =       instruction[15:11];
assign  imm                             =       instruction[15:0];
assign  const_bool              =       instruction[17];
assign  rflags_index    =       instruction[20:18];


// INSTRUCTIONS OPERATION CODE
// Data Transfer Instructions
parameter opcode_lw                                             = 6'b001001;
parameter opcode_sw                                             = 6'b001010;
parameter opcode_limm                                   = 6'b001100;
// Arithmetic Instructions
parameter opcode_add                                            = 6'b010001;
parameter opcode_sub                                            = 6'b010010;
parameter opcode_mul                                            = 6'b010100;
parameter opcode_div                                            = 6'b010101;
// Logical Instructions
parameter opcode_and                                            = 6'b100001;
parameter opcode_or                                             = 6'b100010;
parameter opcode_cmp                                            = 6'b100100;
parameter opcode_not                                            = 6'b100101;
// Control Transfer Instructions
parameter opcode_jr                                             = 6'b101001;
parameter opcode_brfl                                   = 6'b101010;
parameter opcode_call                                   = 6'b101100;
parameter opcode_ret                                            = 6'b101101;
parameter opcode_nop                                            = 6'b101110;
parameter opcode_jmp                                            = 6'b101111;
// Graphical instructions
parameter opcode_sprite_id                              = 6'b111001;
parameter opcode_sprite_color                   = 6'b111010;
parameter opcode_sprite_pos                     = 6'b111100;
parameter opcode_wait_vsync                     = 6'b111111;



/*########################################################################*/
/*########################  FINITE STATE MACHINE  ########################*/
/*########################  PROCESSOR CONTROLLER  ########################*/
/*########################################################################*/

output reg      [5:0]           current_state;
output reg      [5:0]           next_state;

// States
parameter       Reset                                           = 6'b000000;    // Reset                                                = 0
parameter       Wait_Program_Mem_1      = 6'b000001;    // Wait_Program_Mem_1   = 1
parameter       Decode_Instruction      = 6'b000010;    // Decode_Instruction   = 2
parameter       Wait_Operation                  = 6'b000011;    // Wait_Operation                       = 3
parameter       Wait_DIV_1                              = 6'b000100;    // Wait_DIV_1                           = 4
parameter       Wait_DIV_2                              = 6'b000101;    // Wait_DIV_2                           = 5
parameter       Wait_DIV_3                              = 6'b000110;    // Wait_DIV_3                           = 6
parameter       Wait_DIV_4                              = 6'b000111;    // Wait_DIV_4                           = 7
parameter       ADD                                             = 6'b001000;    // ADD                                          = 8
parameter       SUB                                             = 6'b001001;    // SUB                                          = 9
parameter       MUL                                             = 6'b001010;    // MUL                                          = 10
parameter       DIV                                             = 6'b001011;    // DIV                                          = 11
parameter       AND                                             = 6'b001100;    // AND                                          = 12
parameter       OR                                                      = 6'b001101;    // OR                                                   = 13
parameter       CMP                                             = 6'b001110;    // CMP                                          = 14
parameter       NOT                                             = 6'b001111;    // NOT                                          = 15
parameter       SPRITE_ID                               = 6'b010000;    // SPRITE_ID                            = 16
parameter       SPRITE_COLOR                    = 6'b010001;    // SPRITE_COLOR                 = 17
parameter       SPRITE_POS                              = 6'b010010;    // SPRITE_POS                           = 18
parameter       JMP                                             = 6'b010011;    // JMP                                          = 19
parameter       LIMM                                            = 6'b010100;    // LIMM                                         = 20
parameter       Inc_Program_Counter     = 6'b100010;    // Inc_Program_Counter  = 34



// Next State Decoder
always @ (*)
begin
        case (current_state)
        
                // State 0
                Reset:
                begin
                        next_state = Wait_Program_Mem_1;
                end
                
                // State 1
                Wait_Program_Mem_1:
                begin
                        next_state = Decode_Instruction;
                end
                
                // State 2
                Decode_Instruction:
                begin
                        next_state = Wait_Operation;
                end

                // State 3
                Wait_Operation:
                begin

                        case (opcode)
                        
                                opcode_limm:
                                begin
                                        next_state = LIMM;
                                end
                                
                                opcode_add:
                                begin
                                        next_state = ADD;
                                end
                                
                                opcode_sub:
                                begin
                                        next_state = SUB;
                                end
                                
                                opcode_mul:
                                begin
                                        next_state = MUL;
                                end
                                
                                opcode_div:
                                begin
                                        next_state = Wait_DIV_1;
                                end
                                
                                opcode_and:
                                begin
                                        next_state = AND;
                                end
                                
                                opcode_or:
                                begin
                                        next_state = OR;
                                end
                                
                                opcode_cmp:
                                begin
                                        next_state = CMP;
                                end
                                
                                opcode_not:
                                begin
                                        next_state = NOT;
                                end

                                opcode_sprite_id:
                                begin
                                        next_state = SPRITE_ID;
                                end

                                opcode_sprite_color:
                                begin
                                        next_state = SPRITE_COLOR;
                                end

                                opcode_sprite_pos:
                                begin
                                        next_state = SPRITE_POS;
                                end
                                
                                opcode_jmp:
                                begin
                                        next_state = JMP;
                                end
                                
                                default:
                                begin
                                        next_state = Reset;
                                end
                        
                        endcase


                end             

                // State 4
                Wait_DIV_1:
                begin
                        next_state = Wait_DIV_2;
                end

                // State 5
                Wait_DIV_2:
                begin
                        next_state = Wait_DIV_3;
                end

                // State 6
                Wait_DIV_3:
                begin
                        next_state = Wait_DIV_4;
                end

                // State 7
                Wait_DIV_4:
                begin
                        next_state = DIV;
                end
                
                // State 8
                ADD:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 9
                SUB:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 10
                MUL:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 11
                DIV:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 12
                AND:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 13
                OR:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 14
                CMP:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 15
                NOT:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 16
                SPRITE_ID:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 17
                SPRITE_COLOR:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 18
                SPRITE_POS:
                begin
                        next_state = Inc_Program_Counter;
                end
                
                // State 19
                JMP:
                begin
                        next_state = Wait_Program_Mem_1;
                end
                
                // State 20
                LIMM:
                begin
                        next_state = Inc_Program_Counter;
                end

                // State 34
                Inc_Program_Counter:
                begin
                        next_state = Wait_Program_Mem_1;
                end
                
                default:
                begin
                        next_state = Reset;
                end

        endcase

end


// Output Decoder
always @ (*)
begin

        // Default Assignments
        reg_a_val = registers[16*reg_a_num +: 16];
        reg_b_val = registers[16*reg_b_num +: 16];
        reg_c_val = registers[16*reg_c_num +: 16];
        sprite_level = registers[16*reg_a_num +: 6];
        program_rom_addr = program_counter;
        
        case (current_state)

                // State 0
                Reset:
                begin

                end
                
                // State 1
                Wait_Program_Mem_1:
                begin
                        
                end
                
                // State 2
                Decode_Instruction:
                begin
                        
                end

                // State 3
                Wait_Operation:
                begin
                        
                end

                // State 4
                Wait_DIV_1:
                begin
                        
                end

                // State 5
                Wait_DIV_2:
                begin
                        
                end

                // State 6
                Wait_DIV_3:
                begin
                        
                end

                // State 7
                Wait_DIV_4:
                begin
                        
                end

                // State 8
                ADD:
                begin
                        
                end
                
                // State 9
                SUB:
                begin
                        
                end
                
                // State 10
                MUL:
                begin
                        
                end
                
                // State 11
                DIV:
                begin
                        
                end

                // State 12
                AND:
                begin
                        
                end
                
                // State 13
                OR:
                begin
                        
                end
                
                // State 14
                CMP:
                begin
                        
                end
                
                // State 15
                NOT:
                begin
                        
                end
                
                // State 16
                SPRITE_ID:
                begin
                        
                end
                
                // State 17
                SPRITE_COLOR:
                begin
                        
                end
                
                // State 18
                SPRITE_POS:
                begin
                        
                end
                
                // State 19
                JMP:
                begin
                        
                end
                
                // State 20
                LIMM:
                begin
                        
                end

                // State 34
                Inc_Program_Counter:
                begin
                        
                end
                
                
                default:
                begin
                        
                end

        endcase
end


// State Register and Reset Logic
always @ (posedge clock)
begin

        if (reset)
        begin
                current_state   <= Reset;
                
                program_counter <= 0;   
        end

        else
        begin
                current_state   <=      next_state;
                
                
                // State: ADD
                if (next_state == ADD)
                        registers[16*reg_a_num +: 16] <= add_result;
                
                
                // State: SUB
                if (next_state == SUB)
                        registers[16*reg_a_num +: 16] <= sub_result;
                
                
                // State: MUL
                if (next_state == MUL)
                        registers[16*reg_a_num +: 16] <= mult_result[15:0];
                
                
                // State: DIV
                if (next_state == DIV)
                        registers[16*reg_a_num +: 16] <= divide_quotient;
                
                
                // State: AND
                if (next_state == AND)
                        registers[16*reg_a_num +: 16] <= reg_a_val & reg_b_val;
                
                
                // State: OR
                if (next_state == OR)
                        registers[16*reg_a_num +: 16] <= reg_a_val | reg_b_val;
                
                
                // State: CMP
                if (next_state == CMP)
                begin
                        rflags[3] <= compare_alb;       //RFlags[below]
                        rflags[4] <= compare_aeb;       //RFlags[equal]
                        rflags[5] <= compare_agb;       //RFlags[above]
                end
                
                
                // State: NOT
                if (next_state == NOT)
                        registers[16*reg_a_num +: 16] <= ~ reg_a_val;
                
                
                // State: SPRITE_ID
                if (next_state == SPRITE_ID)
                        sprite_id[6*sprite_level +: 6] <= reg_b_val[5:0];
                
                
                // State: SPRITE_COLOR
                if (next_state == SPRITE_COLOR)
                        sprite_color[16*sprite_level +: 16] <= reg_b_val;
                
                
                // State: SPRITE_POS
                if (next_state == SPRITE_POS)
                begin
                        sprite_x[10*sprite_level +: 10] <= reg_c_val[9:0];
                        sprite_y[10*sprite_level +: 10] <= reg_b_val[9:0];
                end
                
                
                // State: JMP
                if (next_state == JMP)
                        program_counter <= imm;
                
                
                // State: LIMM
                if (next_state == LIMM)
                        registers[16*reg_a_num +: 16] <= imm;
                
                
                // State: Inc_Program_Counter
                if (next_state == Inc_Program_Counter)
                        program_counter <= program_counter + 1'b1;
                
                
        end

end

/*########################################################################*/
/*########################################################################*/


        
        
        
        
endmodule

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