URL
https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk
Subversion Repositories 6809_6309_compatible_core
[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [BUGS.txt] - Rev 16
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Known bugs are described here25.07.14--------- no known bugs, core passes cpu-check22.07.14--------- ABX doesn't work06.07.14--------- no known bugs, core passes cpu-check29.06.14-06.07.14------------------ Multiple opcodes fail: direct, extended opcodes, jmp, inc, dec, daasex, long branches, indirect indexed opcodes don't load the indirectaddress07.02.14--------- no known bugs06.01.14--------- no known bugs05.01.14--------- The bit instruction modifies the destination (it shouldn't)- The E flag is not read back when RTI is processed. This means that FIRQ will not returncorrectly.01.01.14--------- SYNC doesn't work as expected- The E flag is not read back when RTI is processed. This means that FIRQ will not returncorrectly.31.12.13--------- CWAI, SYNC don't work as expected- The E flag is not read back when RTI is processed. This means that FIRQ will not returncorrectly.30.12.13--------- EXG doesn't work, the register file can only be written once in the WriteBack cycle.- The E flag is not read back when RTI is processed. This means that FIRQ will not returncorrectly.28.12.13--------- EXG doesn't work, the register file can only be written once in the WriteBack cycle.- LEAX/LEAY do not modify the Z flag- The E flag is not read back when RTI is processed. This means that FIRQ will not returncorrectly.