URL
https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk
Subversion Repositories 6809_6309_compatible_core
[/] [6809_6309_compatible_core/] [trunk/] [syn/] [lattice/] [P6809/] [P6809_P6809_scck.rpt] - Rev 10
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# Synospys Constraint Checker(syntax only), version maplat, Build 618R, built Mar 14 2013
# Copyright (C) 1994-2012, Synopsys Inc. This software the associated documentation are confidential and proprietary to Synopsys, Inc. Your use or disclosure of this software subject to the terms and conditions of a written license agreement between you, or your company, and Synopsys, Inc.
# Written on Thu Feb 6 15:34:39 2014
##### DESIGN INFO #######################################################
Top View: "CC3_top"
Constraint File(s): (none)
#Run constraint checker to find more issues with constraints.
#########################################################################
No issues found in constraint syntax.
Clock Summary
**************
Start Requested Requested Clock Clock
Clock Frequency Period Type Group
--------------------------------------------------------------------------------------------------------------------
CC3_top|clk40_i 1.0 MHz 1000.000 inferred Inferred_clkgroup_0
CC3_top|div_derived_clock 1.0 MHz 1000.000 derived (from CC3_top|clk40_i) Inferred_clkgroup_0
CC3_top|cpu_clk_derived_clock 1.0 MHz 1000.000 derived (from CC3_top|clk40_i) Inferred_clkgroup_0
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