URL
https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk
Subversion Repositories 6809_6309_compatible_core
[/] [6809_6309_compatible_core/] [trunk/] [syn/] [lattice/] [textmem4k.srp] - Rev 8
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SCUBA, Version Diamond_2.2_Production (99)
Fri Jan 3 10:41:37 2014
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp. All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
Copyright (c) 2001 Agere Systems All rights reserved.
Copyright (c) 2002-2013 Lattice Semiconductor Corporation, All rights reserved.
Issued command : /usr/local/diamond/2.2_x64/ispfpga/bin/lin64/scuba -w -n textmem4k -lang verilog -synth synplify -bus_exp 7 -bb -arch xo2c00 -type ramdp -device LCMXO2-7000HE -aaddr_width 12 -widtha 8 -baddr_width 12 -widthb 8 -anum_words 4096 -bnum_words 4096 -cascade -1 -memfile /home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/textmem2k.mem -memformat orca -writemodeA NORMAL -writemodeB NORMAL -e
Circuit name : textmem4k
Module type : RAM_DP_TRUE
Module Version : 7.2
Ports :
Inputs : DataInA[7:0], DataInB[7:0], AddressA[11:0], AddressB[11:0], ClockA, ClockB, ClockEnA, ClockEnB, WrA, WrB, ResetA, ResetB
Outputs : QA[7:0], QB[7:0]
I/O buffer : not inserted
Memory file : /home/pacito/02_Elektronik/020_V6809/6809/opencores/trunk/syn/lattice/textmem2k.mem
EDIF output : suppressed
Verilog output : textmem4k.v
Verilog template : textmem4k_tmpl.v
Verilog testbench: tb_textmem4k_tmpl.v
Verilog purpose : for synthesis and simulation
Bus notation : big endian
Report output : textmem4k.srp
Element Usage :
DP8KC : 4
Estimated Resource Usage:
EBR : 4