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<p class="MsoNormal" style="text-align: left" align="left"><b>
<span lang="EN-US" style="font-size: 18pt; color: #bf0000; font-family: Verdana">
Project: Aquarius</span></b><span lang="EN-US" style="color: black; font-family: Verdana"><font size="5">
</font></span></p>
<p class="MsoNormal" style="text-align: left" align="left"><b>
<span lang="EN-US" style="font-size: 13.5pt; color: black; font-family: Verdana">
</span></b></p>
<p class="MsoNormal" align="left"><font size="4"><b>
<span style="font-family: Verdana">Introduction</span></b></font></p>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Aquarius is a
Core IP (Intellectual Property) of pipelined RISC CPU and can execute SuperH-2
instructions. Follows are <span class="SpellE">SuperH</span> characteristics.</span><!--[if gte vml 1]><v:shapetype id="_x0000_t75"
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<ol>
<li>
<p class="MsoBodyText"><span class="SpellE">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">SuperH</span></span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
is a very popular CPU core. The software development environments </span>
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">such</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
as C c</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">ompiler
have been well prepared. The GNU C compiler for <span class="SpellE">SuperH</span>
is very famous and easy to get. The <span class="SpellE">SuperH</span> had
been developed by Hitachi, Ltd. Now, semiconductor group of Hitachi has merged
with same group of <span class="SpellE">Mitsubish</span> and new semiconductor
company “<span class="SpellE">Renesas</span> Technology Corp.” has established
in April, 2003.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">SuperH-2 is a
CPU for MCU (Micro Controller Unit). Then the CPU need not handle complex
exception recovering such as</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
memory fault exception from</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
M</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">MU (Mem</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">ory
Managing Unit). This means SuperH-2 has simple structure, easiness to design,
and it does not consume many logic gates and power.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">All SuperH-2
instructions have 16bit length. It also makes the hardware very simple. And
most important aspect from 16bit fixed length of instructions is that the
object code size compiled from C source programs becomes very small.</span></li>
</ol>
<p class="MsoBodyText"><b>
<span lang="EN-US" style="font-size: 13.5pt; color: black; font-family: Verdana">
Features</span></b></p>
<p class="MsoBodyText"><font size="3"><span style="font-family: Verdana">Follows
are Aquarius features.</span></font></p>
<ol>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Instruction
set is compatible with Super</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">H-2.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Bus interface
is compatible with WISHBONE.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Aquarius is
written in <span class="SpellE">Verilog</span> RTL codes.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Aquarius has
verified on a test bench by vector simulation and FPGA implementation with GNU</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
Assemble and C Compiler.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Interrupt</span><span style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">s</span><span lang="EN-US" style="font-size: 12pt; font-family: Verdana">
and Exception</span><span style="font-size: 12pt; font-family: Verdana">s</span><span lang="EN-US" style="font-size: 12pt; font-family: Verdana">
are fully supported.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Low Power
Mode (SLEEP) is supported.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Some small
applications are provided including debugging monitor for a FPGA board.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">A complete
Document with over 100 pages, describing</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
Usage of Aqua</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">rius,
FPGA Implementation and Inside</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
Aquarius, is provided.</span></li>
</ol>
<p class="MsoBodyText" align="center">
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</span></p>
<p class="MsoBodyText"> </p>
<p class="MsoBodyText"><font size="4"><b><span style="font-family: Verdana">
Deliverables</span></b></font><span lang="EN-US" style="font-size: 10.5pt; font-family: Century"><!--[if gte vml 1]><v:shape
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<p class="MsoBodyText"><font size="3"><span style="font-family: Verdana">Follows
are Aquarius features.</span></font></p>
<ol>
<li>
<p class="MsoBodyText"><span class="SpellE">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Verilog</span></span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
RTL codes for CPU, and Test Bench including modules comprising MCU</span><font size="3"><span style="font-family: Verdana">,</span></font><span lang="EN-US" style="font-size: 12pt; font-family: Verdana">
such as UART, System Controller, Parallel I/O Interface, and Internal Memories
(ROM/RAM).</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Verification
Resources, such as Converter </span>
<span style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">from </span>
<span lang="EN-US" style="font-size: 12pt; font-family: Verdana">S-format to
<span class="SpellE">Verilog</span> format </span>
<span lang="EN-US" style="font-size: 12pt; font-family: Verdana">for ROM
coding</span><span style="font-size: 12pt; font-family: Verdana">,</span><span lang="EN-US" style="font-size: 12pt; font-family: Verdana">
</span><span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">and
</span><span style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Assemble Source</span><span lang="EN-US" style="font-size: 12pt; font-family: Verdana">
Programs</span><span style="font-size: 12pt; font-family: Verdana"> for Vector
Simulation</span><span lang="EN-US" style="font-size: 12pt; font-family: Verdana">.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">FPGA
Resources, such as </span><span style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
Circuit Schematics of</span><span style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">
Interface Board, </span>
<span lang="EN-US" style="font-size: 12pt; font-family: Verdana">Converter
from S-format to </span><span class="SpellE">
<span style="font-size: 12pt; font-family: Verdana">Xilinx </span>
<span lang="EN-US" style="font-size: 12pt; font-family: Verdana">BlockRAM</span></span><span lang="EN-US" style="font-size: 12pt; font-family: Verdana"><span lang="EN-US" style="font-size: 12pt; font-family: Verdana">
INIT statements for RAM initialization</span></span><span style="font-size: 12pt; font-family: Verdana">,</span><span lang="EN-US" style="font-size: 12pt; font-family: Verdana">
and </span><span style="font-size: 12pt; font-family: Verdana">a sample of
</span><span lang="EN-US" style="font-size: 12pt; font-family: Verdana">User
Constraints File.</span></li>
<li>
<p class="MsoBodyText">
<span lang="EN-US" style="FONT-SIZE: 12pt; FONT-FAMILY: Verdana">Small
Applications including LCD Test Program, Clock using interrupt, and Debugging
Monitor.</span><span style="font-size: 10.5pt; font-family: Century"> </span>
</li>
</ol>
<p class="MsoBodyText"><font size="4">
<span style="font-family: Verdana; font-weight: 700">Development Status</span></font><span lang="EN-US" style="font-size: 10.5pt; font-family: Century"><!--[if gte vml 1]><v:shape
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<ol>
<li>
<p class="MsoNormal" style="text-align: left" align="left">
<span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
RTL coding and verifying </span>
<span style="font-size: 12pt; color: black; font-family: Verdana">have already
been</span><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
finished. </span></li>
<li>
<p class="MsoNormal" style="text-align: left" align="left">
<span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
FPGA</span><span style="font-size: 12pt; color: black; font-family: Verdana">
(Xilinx VirtexE)</span><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
implementation with LCD, Matrix</span><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
Keyboard and RS-232C interfaces has also finished using GNU Assembler and C
Compiler.</span></li>
<li>
<p class="MsoNormal" style="text-align: left" align="left"><font size="3">
<span style="font-family: Verdana">Some small Applications using FPGA and its
interface board have finished.</span></font></li>
</ol>
<p class="MsoNormal" style="text-align: left" align="left"><b>
<span lang="EN-US" style="font-size: 13.5pt; color: black; font-family: Verdana">
Download</span></b><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
</span></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
Document, RTL Source codes and related Tools can be downloaded from the
<span class="SpellE">OpenCopres</span> CVS under the directory </span>
<span style="font-size: 12pt; color: black; font-family: Verdana">"</span><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">Aquarius</span><span style="font-size: 12pt; color: black; font-family: Verdana">"</span><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">.</span></p>
<p class="MsoNormal" style="text-align: left" align="left"><font size="4">
<span style="color: black; font-family: Verdana"><b>Performance</b></span></font><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
</span></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<span style="font-size: 12pt; color: black; font-family: Verdana">Aquarius has
implemented into FPGA.</span></p>
<table border="1" cellpadding="0" cellspacing="0" style="border-collapse: collapse" bordercolor="#111111" width="49%" id="AutoNumber1" height="49">
<tr>
<td width="51%" bgcolor="#FFFF99" height="24">
<p class="MsoNormal" style="text-align: left" align="left">
<span class="SpellE">
<span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
Xilinx</span></span><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
<span class="SpellE">VirtexE</span> (XCV300E)</span></td>
<td width="49%" bgcolor="#CCFFFF" height="24">
<p class="MsoNormal" style="text-align: left" align="left">
<span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
2753 slices @21MHz</span></td>
</tr>
<tr>
<td width="51%" bgcolor="#FFFF99" height="24">
<p class="MsoNormal" style="text-align: left" align="left">
<span class="SpellE">
<span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
Altera</span></span><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
<span class="SpellE">Stratix</span> (EP1S10</span><span style="font-size: 12pt; color: black; font-family: Verdana">)</span></td>
<td width="49%" bgcolor="#CCFFFF" height="24">
<p class="MsoNormal" style="text-align: left" align="left">
<span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
7499 cells @31MHz</span></td>
</tr>
</table>
<p class="MsoNormal" style="text-align: left" align="left"> </p>
<p class="MsoNormal" style="text-align: left" align="left"><font size="4"><b>
<span style="font-family: Verdana">Project News</span></b></font></p>
<table border="1" cellpadding="0" cellspacing="0" style="border-collapse: collapse" bordercolor="#111111" width="100%" id="AutoNumber2" height="54">
<tr>
<td width="27%" height="26" bgcolor="#66FFFF"><b><font face="Verdana">Date</font></b></td>
<td width="73%" height="26" bgcolor="#66FFFF"><b><font face="Verdana">News</font></b></td>
</tr>
<tr>
<td width="27%" height="27" bgcolor="#EAEAEA"><font face="Verdana">12/7/2003</font></td>
<td width="73%" height="27" bgcolor="#EAEAEA"><font face="Verdana">Project
Start and First Release</font></td>
</tr>
</table>
<p class="MsoNormal" style="text-align: left" align="left"> </p>
<p class="MsoNormal" style="text-align: left" align="left"><font size="4">
<span style="color: black; font-family: Verdana"><b>Links</b></span></font></p>
<p class="MsoNormal" style="text-align: left" align="left"> </p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">Renesas Technology Corp.
<a href="http://www.renesas.com/">http://www.renesas.com/</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">SuperH Family
<a href="http://www.renesas.com/eng/products/mpumcu/32bit/sh/index.html">
http://www.renesas.com/eng/products/mpumcu/32bit/sh/index.html</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">HuMANDATA Ltd.
<a href="http://www.hdl.co.jp/home.html">http://www.hdl.co.jp/home.html</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">Schematic of FPGA Board
<a href="http://www.hdl.co.jp/ftpdata/xsp-009/XSP009.sch.pdf">
http://www.hdl.co.jp/ftpdata/xsp-009/XSP009.sch.pdf</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">SUNLIKE Displays Tech Corp.
<a href="http://www.lcd-modules.com.tw/">http://www.lcd-modules.com.tw/</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">LCD SC-1602B Datasheet
<a href="http://www.lcd-modules.com.tw/data/SC/SC1602B.pdf">
http://www.lcd-modules.com.tw/data/SC/SC1602B.pdf</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">LCD Timing
<a href="http://www.lcd-modules.com.tw/data/SU/P32.pdf">
http://www.lcd-modules.com.tw/data/SU/P32.pdf</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">LCD Display Commands
<a href="http://www.lcd-modules.com.tw/data/SU/P33.pdf">
http://www.lcd-modules.com.tw/data/SU/P33.pdf</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">LCD Initialization
<a href="http://www.lcd-modules.com.tw/data/SU/P34.pdf">
http://www.lcd-modules.com.tw/data/SU/P34.pdf</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">Analog Devices Inc.
<a href="http://www.analog.com/">http://www.analog.com/</a></font></p>
<p class="MsoNormal" style="text-align: left; margin-bottom: 12pt" align="left">
<font face="Verdana" size="3">RS-232C PHY
<a href="http://www.analog.com/UploadedFiles/Data_Sheets/452317841ADM222_32A_42_a.pdf">
http://www.analog.com/UploadedFiles/Data_Sheets/452317841ADM222_32A_42_a.pdf</a></font></p>
<p class="MsoNormal" style="text-align: left" align="left"><font size="4"><b>
<span style="font-family: Verdana">Page Maintainer</span></b></font><span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
</span></p>
<p class="MsoNormal" style="text-align: left" align="left">
<span lang="EN-US" style="font-size: 12pt; color: black; font-family: Verdana">
This web page is maintained by Thorn Aitch </span>
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