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[/] [a-z80/] [trunk/] [cpu/] [toplevel/] [toplevel.bdf] - Rev 12

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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
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(alias "<<__$DEF_ALIAS89>>""nNMI")
(alias "<<__$DEF_ALIAS90>>""nRESET")
(alias "<<__$DEF_ALIAS424>>""nMREQ")
(alias "<<__$DEF_ALIAS91>>""nBUSRQ")
(alias "<<__$DEF_ALIAS425>>""nIORQ")
(alias "<<__$DEF_ALIAS92>>""CLK")
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(alias "<<__$DEF_ALIAS427>>""nWR")
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        (mapper
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(block
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        (text "TIMINGS FOR CONTROL PINS" (rect 5 5 163 17)(font "Arial" ))      (text "memory_ifc_" (rect 5 54 71 66)(font "Arial" ))   (block_io "nM1_int" (input))
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        (block_io "iorq_Tw" (input))
        (block_io "hold_clk_wait" (input))
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        (block_io "nRFSH_out" (output))
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(block
        (rect 352 376 456 472)
        (text "RESET UNIT" (rect 5 5 69 17)(font "Arial" ))     (text "resets_" (rect 5 94 41 106)(font "Arial" ))      (block_io "fpga_reset" (input))
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(block
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        (text "CPU STATE" (rect 5 5 65 17)(font "Arial" ))      (text "decode_state_" (rect 5 102 76 114)(font "Arial" ))       (block_io "ctl_state_iy_set" (input))
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                (bidir)
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(block
        (rect 488 224 656 376)
        (text "THE SEQUENCER" (rect 5 5 99 17)(font "Arial" ))  (text "sequencer_" (rect 5 150 61 162)(font "Arial" ))  (block_io "setM1" (input))
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        (block_io "hold_clk_busrq" (input))
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                (bidir)
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(block
        (rect 1144 592 1264 664)
        (text "ALU CONTROL" (rect 5 5 82 17)(font "Arial" ))    (text "alu_select_" (rect 5 70 60 82)(font "Arial" ))   (block_io "ctl_alu_oe" (input))
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        (block_io "ctl_alu_op2_oe" (input))
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(block
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(block
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        (block_io "im1" (output))
        (block_io "im2" (output))
)
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(text "CONTROL UNIT" (rect 688 80 901 110)(font "Arial Black" (color 0 0 0)(font_size 16)))
(text "ALU" (rect 880 536 936 566)(font "Arial Black" (color 0 0 0)(font_size 16)))
(text "REGISTER FILE" (rect 416 536 623 566)(font "Arial Black" (color 0 0 0)(font_size 16)))
(text "ADDRESS INCR" (rect 216 632 421 662)(font "Arial Black" (color 0 0 0)(font_size 16)))
(text "DB0" (rect 1332 288 1354 332)(font "Arial" (color 0 0 0)(font_size 14))(vertical))
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(text "SW1" (rect 1328 752 1378 774)(font "Arial" (color 0 0 0)(font_size 14)))
(text "SW2" (rect 768 648 818 670)(font "Arial" (color 0 0 0)(font_size 14)))
(text "A-Z80 is internally modelled on the\noriginal Zilog Z80 CPU. This is a\nhigh-level block diagram that also\napproximates the location of modules,\nbuses and switches on a die.\n\nwww.baltazarstudios.com\n" (rect 56 432 315 560)(font "Arial" (font_size 10)))
(rectangle (rect 336 104 1280 520)(fill (color 217 255 255)))
(rectangle (rect 872 576 1280 928)(fill (color 217 255 255)))
(rectangle (rect 416 576 712 928)(fill (color 217 255 255)))
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(rectangle (rect 776 784 808 824)(color 255 255 255)(fill (color 253 211 206)))
(rectangle (rect 696 824 888 856)(color 253 211 206)(fill (color 253 211 206)))
(rectangle (rect 384 768 416 832)(color 253 211 206)(fill (color 253 211 206)))
(rectangle (rect 696 720 744 752)(color 253 211 206)(fill (color 253 211 206)))
(rectangle (rect 840 680 1296 712)(color 253 211 206)(fill (color 253 211 206)))
(rectangle (rect 1304 144 1336 624)(color 253 211 206)(fill (color 253 211 206)))
(rectangle (rect 1280 144 1368 176)(color 253 211 206)(fill (color 253 211 206)))
(title_block
        (rect 56 688 117 1009)
        (name "title-custom-medium")
        (rotate90)
        (section (rect 41 81 60 321)(text "DATE" (rect 0 210 12 238)(font "Arial" )(vertical))(text "November 16, 2014" (rect 3 54 19 184)(font "Arial" (font_size 10))(vertical))(border))
        (section (rect 21 1 40 321)(text "DESIGNER" (rect 0 261 12 318)(font "Arial" )(vertical))(text "Goran Devic" (rect 2 169 19 264)(font "Arial" (font_size 11))(vertical))(border))
        (section (rect 0 1 20 191)(text "MODULE" (rect 1 142 13 188)(font "Arial" )(vertical))(text "CPU TOP LEVEL" (rect 2 -5 21 147)(font "Arial" (font_size 12)(bold))(vertical))(border))
        (section (rect 0 1 20 321)(text "PROJECT" (rect 0 268 12 318)(font "Arial" )(vertical))(text "A-Z80" (rect 2 214 21 264)(font "Arial" (font_size 12)(bold))(vertical))(border))
        (section (rect 41 1 60 80)(text "REV" (rect 1 54 13 77)(font "Arial" )(vertical))(text "1.0" (rect 3 15 19 36)(font "Arial" (font_size 10))(vertical))(border))
        (drawing
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)

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