OpenCores
URL https://opencores.org/ocsvn/a-z80/a-z80/trunk

Subversion Repositories a-z80

[/] [a-z80/] [trunk/] [host/] [basic_nexys3/] [Nexys3_master.ucf] - Rev 15

Go to most recent revision | Compare with Previous | Blame | View Log

## This file is a general .ucf for Nexys3 rev B board
## To use it in a project:
## - remove or comment the lines corresponding to unused pins
## - rename the used signals according to the project

## Clock signal
NET "CLOCK_100"       LOC = "V10" | IOSTANDARD = "LVCMOS33";   #Bank = 2, pin name = IO_L30N_GCLK0_USERCCLK,            Sch name = GCLK
#Net "clk" TNM_NET = sys_clk_pin;
#TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 100000 kHz;

NET "KEY0" CLOCK_DEDICATED_ROUTE = FALSE;
NET "KEY1" CLOCK_DEDICATED_ROUTE = FALSE;
NET "KEY2" CLOCK_DEDICATED_ROUTE = FALSE;

PIN "KEY2_BUFGP/BUFG.O" CLOCK_DEDICATED_ROUTE = FALSE;

## onBoard USB controller
## NOTE: DEPP and DSTM net names use some of the same pins, if trying to use both DEPP and DSTM use a signle net name for each shared pin.

## Data bus for both the DEPP and DSTM interfaces uncomment lines 15-22 if using either one
#NET "DB<0>"          LOC = "E1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L50N_M3BA2,                     Sch name = U-FD0
#NET "DB<1>"          LOC = "F4"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L51P_M3A10,                     Sch name = U-FD1
#NET "DB<2>"          LOC = "F3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L51N_M3A4,                      Sch name = U-FD2
#NET "DB<3>"          LOC = "D2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L52P_M3A8,                      Sch name = U-FD3
#NET "DB<4>"          LOC = "D1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L52N_M3A9,                      Sch name = U-FD4
#NET "DB<5>"          LOC = "H7"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L53P_M3CKE,                     Sch name = U-FD5
#NET "DB<6>"          LOC = "G6"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L53N_M3A12,                     Sch name = U-FD6
#NET "DB<7>"          LOC = "E4"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L54P_M3RESET,                   Sch name = U-FD7

## If using the DEPP interface uncomment lines 25-28
#NET "EppWRITE"       LOC = "F5"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L55N_M3A14,                     Sch name = U-FLAGC
#NET "EppASTB"        LOC = "H1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L41N_GCLK26_M3DQ5,              Sch name = U-FLAGA
#NET "EppDSTB"        LOC = "K4"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L42P_GCLK25_TRDY2_M3UDM,        Sch name = U-FLAGB
#NET "EppWAIT"        LOC = "C2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L83P,                           Sch name = U-SLRD

## If using the DSTM interface uncomment lines 31-40
#NET "DstmIFCLK"      LOC = "H2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L41P_GCLK27_M3DQ4,              Sch name = U-IFCLK
#NET "DstmSLCS"       LOC = "F6"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L55P_M3A13,                     Sch name = U-SLCS
#NET "DstmFLAGA"      LOC = "H1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L41N_GCLK26_M3DQ5,              Sch name = U-FLAGA
#NET "DstmFLAGB"      LOC = "K4"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L42P_GCLK25_TRDY2_M3UDM,        Sch name = U-FLAGB
#NET "DstmADR<0>"     LOC = "H5"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L49N_M3A2,                      Sch name = U-FIFOAD0
#NET "DstmADR<1>"     LOC = "E3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L50P_M3WE,                      Sch name = U-FIFOAD1
#Net "DstmSLRD"       LOC = "C2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L83P,                           Sch name = U-SLRD
#NET "DstmSLWR"       LOC = "C1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L83N_VREF,                      Sch name = U-SLWR
#NET "DstmSLOE"       LOC = "H6"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L49P_M3A7,                      Sch name = U-SLOE
#NET "DstmPKTEND"     LOC = "D3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L54N_M3A11,                     Sch name = U-PKTEND

#NET "UsbMode"        LOC = "F1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L48N_M3BA1,                     Sch name = U-INT0#


## onBoard Cellular RAM, Numonyx StrataFlash and Numonyx Quad Flash
#NET "MemOE"          LOC = "L18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L46N_FOE_B_M1DQ3,               Sch name = P30-OE
#NET "MemWR"          LOC = "M16" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L47P_FWE_B_M1DQ0,               Sch name = P30-WE

#NET "RamAdv"         LOC = "H18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L43N_GCLK4_M1DQ5,               Sch name = P30-ADV
#NET "RamCS"          LOC = "L15" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L42P_GCLK7_M1UDM,               Sch name = MT-CE
#NET "RamClk"         LOC = "R10" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L29P_GCLK3,                     Sch name = P30-CLK
#NET "RamCRE"         LOC = "M18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L47N_LDC_M1DQ1,                 Sch name = MT-CRE
#NET "RamLB"          LOC = "K16" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L41N_GCLK8_M1CASN,              Sch name = MT-LB
#NET "RamUB"          LOC = "K15" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L41P_GCLK9_IRDY1_M1RASN,        Sch name = MT-UB
#NET "RamWait"        LOC = "V4"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L63N,                           Sch name = P30-WAIT

#NET "FlashRp"        LOC = "T4"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L63P,                           Sch name = P30-RST
#NET "FlashCS"        LOC = "L17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L46P_FCS_B_M1DQ2,               Sch name = P30-CE

#NET "QuadSpiFlashCS"    LOC="V3"  | IOSTANDARD = "LVCMOS33";  #Bank = MISC, Pin name = IO_L65N_CSO_B_2,                Sch name = CS
#NET "QuadSpiFlashSck"   LOC="R15" | IOSTANDARD = "LVCMOS33";  #Bank = MISC, Pin name = IO_L1P_CCLK_2,                  Sch name = SCK
#NET "QuadSpiFlashDB<0>" LOC="T13" | IOSTANDARD = "LVCMOS33";  #Dual/Quad SPI Flash DB<0>, Bank = MISC, Pin name = IO_L3N_MOSI_CSI_B_MISO0_2, Sch name = SDI

#NET "MemAdr<1>"      LOC = "K18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L45N_A0_M1LDQSN,                Sch name = P30-A0
#NET "MemAdr<2>"      LOC = "K17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L45P_A1_M1LDQS,                 Sch name = P30-A1
#NET "MemAdr<3>"      LOC = "J18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L44N_A2_M1DQ7,                  Sch name = P30-A2
#NET "MemAdr<4>"      LOC = "J16" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L44P_A3_M1DQ6,                  Sch name = P30-A3
#NET "MemAdr<5>"      LOC = "G18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L38N_A4_M1CLKN,                 Sch name = P30-A4
#NET "MemAdr<6>"      LOC = "G16" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L38P_A5_M1CLK,                  Sch name = P30-A5
#NET "MemAdr<7>"      LOC = "H16" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L37N_A6_M1A1,                   Sch name = P30-A6
#NET "MemAdr<8>"      LOC = "H15" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L37P_A7_M1A0,                   Sch name = P30-A7
#NET "MemAdr<9>"      LOC = "H14" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L36N_A8_M1BA1,                  Sch name = P30-A8
#NET "MemAdr<10>"     LOC = "H13" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L36P_A9_M1BA0,                  Sch name = P30-A9
#NET "MemAdr<11>"     LOC = "F18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L35N_A10_M1A2,                  Sch name = P30-A10
#NET "MemAdr<12>"     LOC = "F17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L35P_A11_M1A7,                  Sch name = P30-A11
#NET "MemAdr<13>"     LOC = "K13" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L34N_A12_M1BA2,                 Sch name = P30-A12
#NET "MemAdr<14>"     LOC = "K12" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L34P_A13_M1WE,                  Sch name = P30-A13
#NET "MemAdr<15>"     LOC = "E18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L33N_A14_M1A4,                  Sch name = P30-A14
#NET "MemAdr<16>"     LOC = "E16" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L33P_A15_M1A10,                 Sch name = P30-A15
#NET "MemAdr<17>"     LOC = "G13" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L32N_A16_M1A9,                  Sch name = P30-A16
#NET "MemAdr<18>"     LOC = "H12" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L32P_A17_M1A8,                  Sch name = P30-A17
#NET "MemAdr<19>"     LOC = "D18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L31N_A18_M1A12,                 Sch name = P30-A18
#NET "MemAdr<20>"     LOC = "D17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L31P_A19_M1CKE,                 Sch name = P30-A19
#NET "MemAdr<21>"     LOC = "G14" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L30N_A20_M1A11,                 Sch name = P30-A20
#NET "MemAdr<22>"     LOC = "F14" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L30P_A21_M1RESET                Sch name = P30-A21
#NET "MemAdr<23>"     LOC = "C18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L29N_A22_M1A14,                 Sch name = P30-A22
#NET "MemAdr<24>"     LOC = "C17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L29P_A23_M1A13,                 Sch name = P30-A23
#NET "MemAdr<25>"     LOC = "F16" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L1N_A24_VREF,                   Sch name = P30-A24
#NET "MemAdr<26>"     LOC = "F15" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L1P_A25,                        Sch name = P30-A25

#NET "MemDB<0>"       LOC = "R13" | IOSTANDARD = "LVCMOS33";   #Ram or Numonyx Paralell Flash DB<0>, or Dual/Quad SPI Flash DB<1>, Bank = MISC, Pin name = IO_L3P_D0_DIN_MISO_MISO1_2,     Sch name = P30-DQ0
#NET "MemDB<1>"       LOC = "T14" | IOSTANDARD = "LVCMOS33";   #Ram or Numonyx Paralell Flash DB<1>, or Quad SPI Flash DB<2>, Bank = MISC, Pin name = IO_L12P_D1_MISO2_2,                      Sch name = P30-DQ1
#NET "MemDB<2>"       LOC = "V14" | IOSTANDARD = "LVCMOS33";   #Ram or Numonyx Paralell Flash DB<2>, or Quad SPI Flash DB<3>, Bank = MISC, Pin name = IO_L12N_D2_MISO3_2,                      Sch name = P30-DQ2
#NET "MemDB<3>"       LOC = "U5"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_49P_D3,                         Sch name = P30-DQ3
#NET "MemDB<4>"       LOC = "V5"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_49N_D4,                         Sch name = P30-DQ4
#NET "MemDB<5>"       LOC = "R3"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L62P_D5,                        Sch name = P30-DQ5
#NET "MemDB<6>"       LOC = "T3"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L62N_D6,                        Sch name = P30-DQ6
#NET "MemDB<7>"       LOC = "R5"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L48P_D7,                        Sch name = P30-DQ7
#NET "MemDB<8>"       LOC = "N5"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L64P_D8,                        Sch name = P30-DQ8
#NET "MemDB<9>"       LOC = "P6"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L64N_D9,                        Sch name = P30-DQ9
#NET "MemDB<10>"      LOC = "P12" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L13N_D10,                       Sch name = P30-DQ10
#NET "MemDB<11>"      LOC = "U13" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L14P_D11,                       Sch name = P30-DQ11
#NET "MemDB<12>"      LOC = "V13" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L14N_D12,                       Sch name = P30-DQ12
#NET "MemDB<13>"      LOC = "U10" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L30P_GCLK1_D13,                 Sch name = P30-DQ13
#NET "MemDB<14>"      LOC = "R8"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L31P_GCLK31_D14,                Sch name = P30-DQ14
#NET "MemDB<15>"      LOC = "T8"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L31N_GCLK30_D15,                Sch name = P30-DQ15


## 7 segment display
#NET "seg<0>"         LOC = "T17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L51P_M1DQ12,                    Sch name = CA
#NET "seg<1>"         LOC = "T18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L51N_M1DQ13,                    Sch name = CB
#NET "seg<2>"         LOC = "U17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L52P_M1DQ14,                    Sch name = CC
#NET "seg<3>"         LOC = "U18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L52N_M1DQ15,                    Sch name = CD
#NET "seg<4>"         LOC = "M14" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L53P,                           Sch name = CE
#NET "seg<5>"         LOC = "N14" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L53N_VREF,                      Sch name = CF
#NET "seg<6>"         LOC = "L14" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L61P,                           Sch name = CG
#NET "seg<7>"         LOC = "M13" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L61N,                           Sch name = DP

#NET "an<0>"          LOC = "N16" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L50N_M1UDQSN,                   Sch name = AN0
#NET "an<1>"          LOC = "N15" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L50P_M1UDQS,                    Sch name = AN1
#NET "an<2>"          LOC = "P18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L49N_M1DQ11,                    Sch name = AN2
#NET "an<3>"          LOC = "P17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L49P_M1DQ10,                    Sch name = AN3


## Leds
#NET "Led<0>"         LOC = "U16" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L2P_CMPCLK,                     Sch name = LD0
#NET "Led<1>"         LOC = "V16" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L2N_CMPMOSI,                    Sch name = LD1
#NET "Led<2>"         LOC = "U15" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L5P,                            Sch name = LD2
#NET "Led<3>"         LOC = "V15" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L5N,                            Sch name = LD3
#NET "Led<4>"         LOC = "M11" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L15P,                           Sch name = LD4
#NET "Led<5>"         LOC = "N11" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L15N,                           Sch name = LD5
#NET "Led<6>"         LOC = "R11" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L16P,                           Sch name = LD6
#NET "Led<7>"         LOC = "T11" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L16N_VREF,                      Sch name = LD7


## Switches
#NET "sw<0>"          LOC = "T10" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L29N_GCLK2,                     Sch name = SW0
#NET "sw<1>"          LOC = "T9"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L32P_GCLK29,                    Sch name = SW1
#NET "sw<2>"          LOC = "V9"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L32N_GCLK28,                    Sch name = SW2
#NET "sw<3>"          LOC = "M8"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L40P,                           Sch name = SW3
#NET "sw<4>"          LOC = "N8"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L40N,                           Sch name = SW4
#NET "sw<5>"          LOC = "U8"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L41P,                           Sch name = SW5
#NET "sw<6>"          LOC = "V8"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L41N_VREF,                      Sch name = SW6
#NET "sw<7>"          LOC = "T5"  | IOSTANDARD = "LVCMOS33";   #Bank = MISC, Pin name = IO_L48N_RDWR_B_VREF_2,          Sch name = SW7


## Buttons
NET "KEY0"            LOC = "B8"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L33P,                           Sch name = BTNS
NET "KEY1"            LOC = "A8"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L33N,                           Sch name = BTNU
NET "KEY2"            LOC = "C4"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L1N_VREF,                       Sch name = BTNL
#NET "btn<3>"         LOC = "C9"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L34N_GCLK18,                    Sch name = BTND
#NET "btn<4>"         LOC = "D9"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L34P_GCLK19,                    Sch name = BTNR


## VGA Connector
#NET "vgaRed<0>"      LOC = "U7"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L43P,                          Sch name = RED0
#NET "vgaRed<1>"      LOC = "V7"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L43N,                          Sch name = RED1
#NET "vgaRed<2>"      LOC = "N7"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L44P,                          Sch name = RED2
#NET "vgaGreen<0>"    LOC = "P8"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L44N,                          Sch name = GRN0
#NET "vgaGreen<1>"    LOC = "T6"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L45P,                          Sch name = GRN1
#NET "vgaGreen<2>"    LOC = "V6"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L45N,                          Sch name = GRN2
#NET "vgaBlue<1>"     LOC = "R7"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L46P,                          Sch name = BLU1
#NET "vgaBlue<2>"     LOC = "T7"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L46N,                          Sch name = BLU2

#NET "Hsync"          LOC = "N6"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L47P,                          Sch name = HSYNC
#NET "Vsync"          LOC = "P7"  | IOSTANDARD = "LVCMOS33";   # Bank = 2, Pin name = IO_L47N,                          Sch name = VSYNC


## 12 pin connectors

##JA
NET "GPIO_0<0>"          LOC = "T12" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L19P,                           Sch name = JA1
NET "GPIO_0<1>"          LOC = "V12" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L19N,                           Sch name = JA2  
NET "GPIO_0<2>"          LOC = "N10" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L20P,                           Sch name = JA3
NET "GPIO_0<3>"          LOC = "P11" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L20N,                           Sch name = JA4
NET "GPIO_0<4>"          LOC = "M10" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L22P,                           Sch name = JA7
NET "GPIO_0<5>"          LOC = "N9"  | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L22N,                           Sch name = JA8
NET "GPIO_0<6>"          LOC = "U11" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L23P,                           Sch name = JA9
NET "GPIO_0<7>"          LOC = "V11" | IOSTANDARD = "LVCMOS33";   #Bank = 2, Pin name = IO_L23N,                           Sch name = JA10

##JB
NET "GPIO_1<0>"           LOC = "K2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L38P_M3DQ2,                     Sch name = JB1
NET "GPIO_1<1>"           LOC = "K1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L38N_M3DQ3,                     Sch name = JB2
NET "GPIO_1<2>"           LOC = "L4"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L39P_M3LDQS,                    Sch name = JB3
NET "GPIO_1<3>"           LOC = "L3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L39N_M3LDQSN,                   Sch name = JB4
NET "GPIO_1<4>"           LOC = "J3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L40P_M3DQ6,                     Sch name = JB7
NET "GPIO_1<5>"           LOC = "J1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L40N_M3DQ7,                     Sch name = JB8
NET "GPIO_1<6>"           LOC = "K3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L42N_GCLK24_M3LDM,              Sch name = JB9
NET "GPIO_1<7>"           LOC = "K5"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L43N_GCLK22_IRDY2_M3CASN,       Sch name = JB10

##JC
NET "GPIO_2<0>"          LOC = "H3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L44N_GCLK20_M3A6,               Sch name = JC1
NET "GPIO_2<1>"          LOC = "L7"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L45P_M3A3,                      Sch name = JC2
NET "GPIO_2<2>"          LOC = "K6"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L45N_M3ODT,                     Sch name = JC3
NET "GPIO_2<3>"          LOC = "G3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L46P_M3CLK,                     Sch name = JC4
NET "GPIO_2<4>"          LOC = "G1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L46N_M3CLKN,                    Sch name = JC7
NET "GPIO_2<5>"          LOC = "J7"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L47P_M3A0,                      Sch name = JC8
NET "GPIO_2<6>"          LOC = "J6"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L47N_M3A1,                      Sch name = JC9
NET "GPIO_2<7>"          LOC = "F2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L48P_M3BA0,                     Sch name = JC10

##JD, LX16 Die only
NET "GPIO_3<0>"          LOC = "G11" | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L40P,                           Sch name = JD1
NET "GPIO_3<1>"          LOC = "F10" | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L40N,                           Sch name = JD2
NET "GPIO_3<2>"          LOC = "F11" | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L42P,                           Sch name = JD3
NET "GPIO_3<3>"          LOC = "E11" | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L42N,                           Sch name = JD4
NET "GPIO_3<4>"          LOC = "D12" | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L47P,                           Sch name = JD7
NET "GPIO_3<5>"          LOC = "C12" | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L47N,                           Sch name = JD8
NET "GPIO_3<6>"          LOC = "F12" | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L51P,                           Sch name = JD9
NET "GPIO_3<7>"          LOC = "E12" | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L51N,                           Sch name = JD10


## SMSC ethernet PHY
#NET "PhyRstn"        LOC = "P3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L2N,                            Sch name = ETH-RST
#NET "PhyCrs"         LOC = "N3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L1N_VREF,                       Sch name = ETH-CRS
#NET "PhyCol"         LOC = "P4"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L2P,                            Sch name = ETH-COL
#NET "PhyClk25Mhz"    LOC = "N4"  | IOSTANDARD = "LVCMOS33";   #Unconnected if R172 is not loaded, Bank = 3, Pin name = IO_L1P, Sch name = ETH-CLK25MHZ

#NET "PhyTxd<3>"      LOC = "T1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L33N_M3DQ13,                    Sch name = ETH-TXD3 
#NET "PhyTxd<2>"      LOC = "T2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L33P_M3DQ12,                    Sch name = ETH-TXD2
#NET "PhyTxd<1>"      LOC = "U1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L32N_M3DQ15,                    Sch name = ETH-TXD1
#NET "PhyTxd<0>"      LOC = "U2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L32P_M3DQ14,                    Sch name = ETH-TXD0
#NET "PhyTxEn"        LOC = "L2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L37P_M3DQ0,                     Sch name = ETH-TX_EN
#NET "PhyTxClk"       LOC = "L5"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L43P_GCLK23_M3RASN,             Sch name = ETH-TX_CLK
#NET "PhyTxEr"        LOC = "P2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L34P_M3UDQS,                    Sch name = ETH-TXD4

#NET "PhyRxd<3>"      LOC = "M3"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L36P_M3DQ8,                     Sch name = ETH-RXD3
#NET "PhyRxd<2>"      LOC = "N1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L35N_M3DQ11,                    Sch name = ETH-RXD2
#NET "PhyRxd<1>"      LOC = "N2"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L35P_M3DQ10,                    Sch name = ETH-RXD1
#NET "PhyRxd<0>"      LOC = "P1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L34N_M3UDQSN,                   Sch name = ETH-RXD0
#NET "PhyRxDv"        LOC = "L1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L37N_M3DQ1,                     Sch name = ETH-RX_DV
#NET "PhyRxEr"        LOC = "M1"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L36N_M3DQ9,                     Sch name = ETH-RXD4
#NET "PhyRxClk"       LOC = "H4"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L44P_GCLK21_M3A5,               Sch name = ETH-RX_CLK

#NET "PhyMdc"         LOC = "M5"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L31N_VREF,                      Sch name = ETH-MDC
#NET "PhyMdio"        LOC = "L6"  | IOSTANDARD = "LVCMOS33";   #Bank = 3, Pin name = IO_L31P,                           Sch name = ETH-MDIO


## Pic USB-HID interface
#NET "PS2KeyboardData" LOC = "J13" | IOSTANDARD = "LVCMOS33" | PULLUP;  #Bank = 1, Pin name = IO_L39P_M1A3,             Sch name = PIC-SDI1
#NET "PS2KeyboardClk"  LOC = "L12" | IOSTANDARD = "LVCMOS33" | PULLUP;  #Bank = 1, Pin name = IO_L40P_GCLK11_M1A5,      Sch name = PIC-SCK1

#NET "PS2MouseData"   LOC = "K14" | IOSTANDARD = "LVCMOS33" | PULLUP;   #Bank = 1, Pin name = IO_L39N_M1ODT,            Sch name = PIC-SDO1
#NET "PS2MouseClk"    LOC = "L13" | IOSTANDARD = "LVCMOS33" | PULLUP;   #Bank = 1, Pin name = IO_L40N_GCLK10_M1A6,      Sch name = PIC-SS1

#NET "PicGpio<0>"     LOC = "L16" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L42N_GCLK6_TRDY1_M1LDM,         Sch name = PIC-GPIO0
#NET "PicGpio<1>"     LOC = "H17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L43P_GCLK5_M1DQ4,               Sch name = PIC-GPIO1


## Usb-RS232 interface
#NET "RsRx"           LOC = "N17" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L48P_HDC_M1DQ8,                 Sch name = MCU-RX
NET "UART_TXD"        LOC = "N18" | IOSTANDARD = "LVCMOS33";   #Bank = 1, Pin name = IO_L48N_M1DQ9,                     Sch name = MCU-TX


## VHDCI Connector
#NET "EXP-IO_P<0>"    LOC = "B2"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L2P,                            Sch name = EXP_IO1_P
#NET "EXP-IO_N<0>"    LOC = "A2"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L2N,                            Sch name = EXP_IO1_N
#NET "EXP-IO_P<1>"    LOC = "D6"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L3P,                            Sch name = EXP_IO2_P
#NET "EXP-IO_N<1>"    LOC = "C6"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L3N,                            Sch name = EXP_IO2_N
#NET "EXP-IO_P<2>"    LOC = "B3"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L4P,                            Sch name = EXP_IO3_P
#NET "EXP-IO_N<2>"    LOC = "A3"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L4N,                            Sch name = EXP_IO3_N
#NET "EXP-IO_P<3>"    LOC = "B4"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L5P,                            Sch name = EXP_IO4_P
#NET "EXP-IO_N<3>"    LOC = "A4"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L5N,                            Sch name = EXP_IO4_N
#NET "EXP-IO_P<4>"    LOC = "C5"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L6P,                            Sch name = EXP_IO5_P
#NET "EXP-IO_N<4>"    LOC = "A5"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L6N,                            Sch name = EXP_IO5_N
#NET "EXP-IO_P<5>"    LOC = "B6"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L8P,                            Sch name = EXP_IO6_P
#NET "EXP-IO_N<5>"    LOC = "A6"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L8N_VREF,                       Sch name = EXP_IO6_N
#NET "EXP-IO_P<6>"    LOC = "C7"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L10P,                           Sch name = EXP_IO7_P
#NET "EXP-IO_N<6>"    LOC = "A7"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L10N,                           Sch name = EXP_IO7_N
#NET "EXP-IO_P<7>"    LOC = "D8"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L11P,                           Sch name = EXP_IO8_P
#NET "EXP-IO_N<7>"    LOC = "C8"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L11N,                           Sch name = EXP_IO8_N
#NET "EXP-IO_P<8>"    LOC = "B9"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L35P_GCLK17,                    Sch name = EXP_IO9_P
#NET "EXP-IO_N<8>"    LOC = "A9"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L35N_GCLK16,                    Sch name = EXP_IO9_N
#NET "EXP-IO_P<9>"    LOC = "D11" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L36P_GCLK15,                    Sch name = EXP_IO10_P
#NET "EXP-IO_N<9>"    LOC = "C11" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L36N_GCLK14,                    Sch name = EXP_IO10_N
#NET "EXP-IO_P<10>"   LOC = "C10" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L37P_GCLK13,                    Sch name = EXP_IO11_P
#NET "EXP-IO_N<10>"   LOC = "A10" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L37N_GCLK12,                    Sch name = EXP_IO11_N
#NET "EXP-IO_P<11>"   LOC = "G9"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L38P,                           Sch name = EXP_IO12_P
#NET "EXP-IO_N<11>"   LOC = "F9"  | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L38N_VREF,                      Sch name = EXP_IO12_N
#NET "EXP-IO_P<12>"   LOC = "B11" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L39P,                           Sch name = EXP_IO13_P
#NET "EXP-IO_N<12>"   LOC = "A11" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L39N,                           Sch name = EXP_IO13_N
#NET "EXP-IO_P<13>"   LOC = "B12" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L41P,                           Sch name = EXP_IO14_P
#NET "EXP-IO_N<13>"   LOC = "A12" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L41N,                           Sch name = EXP_IO14_N
#NET "EXP-IO_P<14>"   LOC = "C13" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L50P,                           Sch name = EXP_IO15_P
#NET "EXP-IO_N<14>"   LOC = "A13" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L50N,                           Sch name = EXP_IO15_N
#NET "EXP-IO_P<15>"   LOC = "B14" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L62P,                           Sch name = EXP_IO16_P
#NET "EXP-IO_N<15>"   LOC = "A14" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L62N_VREF,                      Sch name = EXP_IO16_N
#NET "EXP-IO_P<16>"   LOC = "F13" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L63P_SCP7,                      Sch name = EXP_IO17_P
#NET "EXP-IO_N<16>"   LOC = "E13" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L63N_SCP6,                      Sch name = EXP_IO17_N
#NET "EXP-IO_P<17>"   LOC = "C15" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L64P_SCP5,                      Sch name = EXP_IO18_P
#NET "EXP-IO_N<17>"   LOC = "A15" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L64N_SCP4,                      Sch name = EXP_IO18_N
#NET "EXP-IO_P<18>"   LOC = "D14" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L65P_SCP3,                      Sch name = EXP_IO19_P
#NET "EXP-IO_N<18>"   LOC = "C14" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L65N_SCP2,                      Sch name = EXP_IO19_N
#NET "EXP-IO_P<19>"   LOC = "B16" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L66P_SCP1,                      Sch name = EXP_IO20_P
#NET "EXP-IO_N<19>"   LOC = "A16" | IOSTANDARD = "LVCMOS33";   #Bank = 0, Pin name = IO_L66N_SCP0,                      Sch name = EXP_IO20_N

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.