OpenCores
URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [sim/] [iversim] - Rev 162

Go to most recent revision | Compare with Previous | Blame | View Log

#!/bin/sh
# $Id: iversim,v 1.8 2008-05-27 19:01:58 sybreon Exp $

HERE=$(dirname $0)
RANDOM=$(date +%s)
SIM="isim"
IVERLIB="-y$HERE/../rtl/verilog"

# seed random number
echo "\`define randseed $RANDOM" > random.v

# pre-processor
iverilog $IVERLIB -tnull -M$SIM.ls $@ && \
sed 1d < $SIM.ls > $SIM.fs && \
iverilog -c$SIM.fs -E -tnull -o $SIM.v $@ && \
rm $SIM.ls $SIM.fs && \
rm random.v && \

# simulation
if [ -e "$SIM.v" ]; then
        iverilog -tvvp -o $SIM.vvp $SIM.v && \
        vvp -l iverilog.log $SIM.vvp && \
        rm $SIM.vvp
fi

# recompress
if [ -e "dump.vcd" ]; then
        vcd2lxt dump.vcd dump.lxt -stats && \
        rm dump.vcd
fi

echo "DONE"

# $Log: not supported by cvs2svn $
# Revision 1.4  2008/05/13 20:05:13  ssnt2
# *** empty log message ***
#
# Revision 1.3  2008/05/09 16:20:03  ssnt2
# added vcd2lxt recompressor.
#
# Revision 1.2  2008/05/09 16:13:59  ssnt2
# added pre-processor and cleaned up code.
#

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.