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[/] [aes-128_pipelined_encryption/] [trunk/] [doc/] [release_notes.txt] - Rev 2
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DESIGN : 128 bit AES Pipelined CipherRELEASE DATE: 07-07-2013REVISION 0.0FEATURES :-One clock domain-Asynchronous reset-128 bit data-128 bit Cipher Key-Optimized for speed-Pipelined architectureBlOCKS STATUS:Top_PipelinedCipher completed - Functionally VerifiedKeyExpantion completed - Functionally VerifiedRoundKeyGen completed - Functionally VerifiedRound completed - Functionally VerifiedSubBytes completed - Functionally VerifiedSBox completed - Functionally VerifiedShiftRows completed - Functionally VerifiedMixColumns completed - Functionally VerifiedAddRoundKey completed - Functionally VerifiedWHOLE DESIGN : completed - Functionally Verified using AESVS document test vectors (284 vector)Synthesis , Place and Route on Xilinx virtex 6 6vcx240tff784-2Post Place and Route Simulation Verified