Subversion Repositories aes_crypto_core

                        Clock Frequency Report

        Clock                : Frequency
      ------------------------------------

        clk                  : 101.3 MHz


                        Critical Path Report


Critical path #1, (path slack =  0.1):

NAME                                             GATE              ARRIVAL              LOAD
--------------------------------------------------------------------------------------------
clock information not specified
delay thru clock network                                           0.00 (ideal)


reg_s3_buf(1)(3)/Q                               FDC         0.00  0.53 up             1.50
ix36548_ix910/O                                  LUT4        0.72  1.25 up             0.50
ix36548_ix913/O                                  MUXF5       0.38  1.63 up             0.50
ix36548_ix919/O                                  MUXF6       0.24  1.86 up             0.50
ix36548_ix933/O                                  MUXF7       0.24  2.10 up             0.50
ix36548_ix963/O                                  MUXF8       0.24  2.34 up             0.80
r_02(1)(6)/O                                     LUT3        0.72  3.06 up             1.00
nx14310/O                                        LUT4        0.72  3.78 up             0.60
modgen_xor_11683_nx2/O                           LUT4        0.72  4.50 up             0.50
a(0)_dup_37693/O                                 LUT4        0.72  5.22 up             1.00
modgen_xor_11685_nx10/O                          LUT4        0.72  5.94 up             0.50
modgen_xor_11685_ix13/LO                         LUT4_L      0.72  6.66 up             0.50
nx40772/O                                        LUT3        0.72  7.37 up             0.50
next_round_data_2(0)(4)/O                        LUT4        0.72  8.09 up             0.60
nx27520/O                                        LUT4        0.72  8.81 up             0.60
reg_s2_buf(0)(4)/D                               FDC         0.00  8.81 up             0.00
data arrival time                                                  8.81


data required time  (default specified - setup time)                8.94
--------------------------------------------------------------------------------------------
data required time                                                 8.94
data arrival time                                                  8.81
                                                                ----------
slack                                                             0.13
--------------------------------------------------------------------------------------------




Critical path #2, (path slack =  0.1):

NAME                                             GATE              ARRIVAL              LOAD
--------------------------------------------------------------------------------------------
clock information not specified
delay thru clock network                                           0.00 (ideal)


reg_s3_buf(1)(2)/Q                               FDC         0.00  0.53 up             1.50
ix36548_ix910/O                                  LUT4        0.72  1.25 up             0.50
ix36548_ix913/O                                  MUXF5       0.38  1.63 up             0.50
ix36548_ix919/O                                  MUXF6       0.24  1.86 up             0.50
ix36548_ix933/O                                  MUXF7       0.24  2.10 up             0.50
ix36548_ix963/O                                  MUXF8       0.24  2.34 up             0.80
r_02(1)(6)/O                                     LUT3        0.72  3.06 up             1.00
nx14310/O                                        LUT4        0.72  3.78 up             0.60
modgen_xor_11683_nx2/O                           LUT4        0.72  4.50 up             0.50
a(0)_dup_37693/O                                 LUT4        0.72  5.22 up             1.00
modgen_xor_11685_nx10/O                          LUT4        0.72  5.94 up             0.50
modgen_xor_11685_ix13/LO                         LUT4_L      0.72  6.66 up             0.50
nx40772/O                                        LUT3        0.72  7.37 up             0.50
next_round_data_2(0)(4)/O                        LUT4        0.72  8.09 up             0.60
nx27520/O                                        LUT4        0.72  8.81 up             0.60
reg_s2_buf(0)(4)/D                               FDC         0.00  8.81 up             0.00
data arrival time                                                  8.81


data required time  (default specified - setup time)                8.94
--------------------------------------------------------------------------------------------
data required time                                                 8.94
data arrival time                                                  8.81
                                                                ----------
slack                                                             0.13
--------------------------------------------------------------------------------------------




Critical path #3, (path slack =  0.1):

NAME                                             GATE              ARRIVAL              LOAD
--------------------------------------------------------------------------------------------
clock information not specified
delay thru clock network                                           0.00 (ideal)


reg_s3_buf(1)(1)/Q                               FDC         0.00  0.53 up             1.50
ix36548_ix910/O                                  LUT4        0.72  1.25 up             0.50
ix36548_ix913/O                                  MUXF5       0.38  1.63 up             0.50
ix36548_ix919/O                                  MUXF6       0.24  1.86 up             0.50
ix36548_ix933/O                                  MUXF7       0.24  2.10 up             0.50
ix36548_ix963/O                                  MUXF8       0.24  2.34 up             0.80
r_02(1)(6)/O                                     LUT3        0.72  3.06 up             1.00
nx14310/O                                        LUT4        0.72  3.78 up             0.60
modgen_xor_11683_nx2/O                           LUT4        0.72  4.50 up             0.50
a(0)_dup_37693/O                                 LUT4        0.72  5.22 up             1.00
modgen_xor_11685_nx10/O                          LUT4        0.72  5.94 up             0.50
modgen_xor_11685_ix13/LO                         LUT4_L      0.72  6.66 up             0.50
nx40772/O                                        LUT3        0.72  7.37 up             0.50
next_round_data_2(0)(4)/O                        LUT4        0.72  8.09 up             0.60
nx27520/O                                        LUT4        0.72  8.81 up             0.60
reg_s2_buf(0)(4)/D                               FDC         0.00  8.81 up             0.00
data arrival time                                                  8.81


data required time  (default specified - setup time)                8.94
--------------------------------------------------------------------------------------------
data required time                                                 8.94
data arrival time                                                  8.81
                                                                ----------
slack                                                             0.13
--------------------------------------------------------------------------------------------




Critical path #4, (path slack =  0.1):

NAME                                             GATE              ARRIVAL              LOAD
--------------------------------------------------------------------------------------------
clock information not specified
delay thru clock network                                           0.00 (ideal)


reg_s3_buf(1)(0)/Q                               FDC         0.00  0.53 up             1.50
ix36548_ix910/O                                  LUT4        0.72  1.25 up             0.50
ix36548_ix913/O                                  MUXF5       0.38  1.63 up             0.50
ix36548_ix919/O                                  MUXF6       0.24  1.86 up             0.50
ix36548_ix933/O                                  MUXF7       0.24  2.10 up             0.50
ix36548_ix963/O                                  MUXF8       0.24  2.34 up             0.80
r_02(1)(6)/O                                     LUT3        0.72  3.06 up             1.00
nx14310/O                                        LUT4        0.72  3.78 up             0.60
modgen_xor_11683_nx2/O                           LUT4        0.72  4.50 up             0.50
a(0)_dup_37693/O                                 LUT4        0.72  5.22 up             1.00
modgen_xor_11685_nx10/O                          LUT4        0.72  5.94 up             0.50
modgen_xor_11685_ix13/LO                         LUT4_L      0.72  6.66 up             0.50
nx40772/O                                        LUT3        0.72  7.37 up             0.50
next_round_data_2(0)(4)/O                        LUT4        0.72  8.09 up             0.60
nx27520/O                                        LUT4        0.72  8.81 up             0.60
reg_s2_buf(0)(4)/D                               FDC         0.00  8.81 up             0.00
data arrival time                                                  8.81


data required time  (default specified - setup time)                8.94
--------------------------------------------------------------------------------------------
data required time                                                 8.94
data arrival time                                                  8.81
                                                                ----------
slack                                                             0.13
--------------------------------------------------------------------------------------------