Subversion Repositories ahb_slave

<##//////////////////////////////////////////////////////////////////
////                                                             ////
////  Author: Eyal Hochberg                                      ////
////          eyal@provartec.com                                 ////
////                                                             ////
////  Downloaded from: http://www.opencores.org                  ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// Copyright (C) 2010 Provartec LTD                            ////
//// www.provartec.com                                           ////
//// info@provartec.com                                          ////
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//// the original copyright notice and the associated disclaimer.////
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//// This source file is free software; you can redistribute it  ////
//// and/or modify it under the terms of the GNU Lesser General  ////
//// Public License as published by the Free Software Foundation.////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied  ////
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//// PURPOSE.  See the GNU Lesser General Public License for more////
//// details. http://www.gnu.org/licenses/lgpl.html              ////
////                                                             ////
//////////////////////////////////////////////////////////////////##>
SWAP.GLOBAL MODEL_NAME AHB slave stub

VERIFY (DATA_BITS in 32, 64)  ##stub supports 32 or 64 bits data bus
VERIFY (ADDR_BITS in 16..24) ##Memory size should not be too big to prevent maloc fail
      
GROUP STUB_AHB is {
  HADDR   ADDR_BITS   output
  HBURST  3           output
  HSIZE   2           output
  HTRANS  2           output
  HWRITE  1           output
  HWDATA  DATA_BITS   output
  HRDATA  DATA_BITS   input
  HREADY  1           input
  HRESP   1           input
}


GROUP STUB_MEM is {
    WR        1            output
    RD        1            output
    ADDR_WR   ADDR_BITS    output
    ADDR_RD   ADDR_BITS    output
    DIN       DATA_BITS    output
    BSEL      DATA_BITS/8  output
    DOUT      DATA_BITS    input
}