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[/] [ahbmaster/] [trunk/] [test79_AHBmaster/] [simulation/] [coreahblite_usertb_ahb_master0.bfm] - Rev 3
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// ********************************************************************
// Actel Corporation Proprietary and Confidential
// Copyright 2010 Actel Corporation. All rights reserved.
//
// ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN
// ACCORDANCE WITH THE ACTEL LICENSE AGREEMENT AND MUST BE APPROVED
// IN ADVANCE IN WRITING.
//
// Description: User testbench AHBLite master 0 BFM script for CoreAHBLite
//
// Revision Information:
// Date Description
// 10Feb10 Production Release Version 3.1
//
// SVN Revision Information:
// SVN $Revision: 21348 $
// SVN $Date: 2013-10-23 20:30:39 +0530 (Wed, 23 Oct 2013) $
//
// Resolved SARs
// SAR Date Who Description
//
// Notes:
// 1. best viewed with tabstops set to "4"
// 2. Most of the behavior is driven from the BFM script for the AHBLite master.
// Consult the Actel AMBA BFM documentation for more information.
// 3. All procedures, variables, and constants used by the 'main' procedure
// are declared in the include file "coreahblite_usertb_include.bfm"
//
// History: 11/05/08 - TFB created
//
// *********************************************************************
// include constants, and miscellaneous procedures used in this main file
include "coreahblite_usertb_include.bfm"
procedure main
int i
int j
int k
int dtmp[4]
int atmp
int slot_incr
int M0_S0_IN_COMBINED
int M0_S1_IN_COMBINED
int M0_S2_IN_COMBINED
int M0_S3_IN_COMBINED
int M0_S4_IN_COMBINED
int M0_S5_IN_COMBINED
int M0_S6_IN_COMBINED
int M0_S7_IN_COMBINED
int M0_S8_IN_COMBINED
int M0_S9_IN_COMBINED
int M0_S10_IN_COMBINED
int M0_S11_IN_COMBINED
int M0_S12_IN_COMBINED
int M0_S13_IN_COMBINED
int M0_S14_IN_COMBINED
int M0_S15_IN_COMBINED
int M0_S0_ACTIVE
int M0_S1_ACTIVE
int M0_S2_ACTIVE
int M0_S3_ACTIVE
int M0_S4_ACTIVE
int M0_S5_ACTIVE
int M0_S6_ACTIVE
int M0_S7_ACTIVE
int M0_S8_ACTIVE
int M0_S9_ACTIVE
int M0_S10_ACTIVE
int M0_S11_ACTIVE
int M0_S12_ACTIVE
int M0_S13_ACTIVE
int M0_S14_ACTIVE
int M0_S15_ACTIVE
header "User Testbench for CoreAHBLite: BFM AHBLite Master 0 Test Harness"
print "(c) Copyright 2010 Actel Corporation. All rights reserved."
call pr_underscores
debug 1 // only text strings printed
timeout 2000 // timeout in cycles, in case BFM stalls
wait 1
// initialize local variables passed from testbench HDL to the
// ARGVALUE* BFM parameters
call init_parameter_vars
wait 2
# Set slot increment based on MEMSPACE parameter
if MEMSPACE == 0
call pr_underscores
print "Master 0, memory space: 16 64KB slave slots, one huge slave slot, testing beginning at: %0d ns." $TIME
call pr_underscores
set slot_incr 0x00010000;
endif
if MEMSPACE == 1
call pr_underscores
print "Master 0, memory space = 4GB, 16 256MB slave slots, testing beginning at: %0d ns." $TIME
call pr_underscores
set slot_incr 0x10000000;
endif
if MEMSPACE == 2
call pr_underscores
print "Master 0, memory space = 256MB, 16 16MB slave slots, testing beginning at: %0d ns." $TIME
call pr_underscores
set slot_incr 0x01000000;
endif
if MEMSPACE == 3
call pr_underscores
print "Master 0, memory space = 16MB, 16 1MB slave slots, testing beginning at: %0d ns." $TIME
call pr_underscores
set slot_incr 0x00100000;
endif
if MEMSPACE == 4
call pr_underscores
print "Master 0, memory space = 1MB, 16 64KB slave slots, testing beginning at: %0d ns." $TIME
call pr_underscores
set slot_incr 0x00010000;
endif
if MEMSPACE == 5
call pr_underscores
print "Master 0, memory space = 64KB, 16 4KB slave slots, testing beginning at: %0d ns." $TIME
call pr_underscores
set slot_incr 0x00001000;
endif
if MEMSPACE == 6
call pr_underscores
print "Master 0, memory space = 4KB, 16 256B slave slots, testing beginning at: %0d ns." $TIME
call pr_underscores
set slot_incr 0x00000100;
endif
//=========================================================================
# Test byte/halfword/word writes and reads for all enabled slots
loop i 0 15 1
if SC[i] == 0
if M0_AHBSLOTENABLE[i]
call pr_underscores
print "Master 0 testing AHBLite slot:%0d at: %0d ns." i $TIME
call pr_underscores
// write/read 32-bit word
set atmp i * slot_incr + 0x0
set dtmp[0] 0x12345678
print "Master 0 writes:%08x to AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
write w BASE atmp dtmp[0]
print "Master 0 verifying (reading):%08x from AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
readcheck w BASE atmp dtmp[0]
wait 8
// write/read 16-bit halfwords
set dtmp[0] 0xdead
set dtmp[1] 0xbeef
loop j 0 1 1
set k j * 2
set atmp i * slot_incr + k
print "Master 0 writes:%04x to AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
write h BASE atmp dtmp[j]
endloop
loop j 0 1 1
set k j * 2
set atmp i * slot_incr + k
print "Master 0 verifying (reading):%04x from AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
readcheck h BASE atmp dtmp[j]
endloop
wait 8
// write/read 8-bit bytes
set dtmp[0] 0x9a
set dtmp[1] 0x56
set dtmp[2] 0x34
set dtmp[3] 0x12
loop j 0 3 1
set k j * 1
set atmp i * slot_incr + k
print "Master 0 writes:%02x to AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
write b BASE atmp dtmp[j]
endloop
loop j 0 3 1
set k j * 1
set atmp i * slot_incr + k
print "Master 0 verifying (reading):%02x from AHBLite slave:%0d at: %0d ns." dtmp[j] i $TIME
readcheck b BASE atmp dtmp[j]
endloop
wait 8
// write/read 32-bit word 0xaaaaaaaa
set atmp i * slot_incr + 0x0
set dtmp[0] 0xaaaaaaaa
print "Master 0 writes:%08x to AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
write w BASE atmp dtmp[0]
print "Master 0 verifying (reading):%08x from AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
readcheck w BASE atmp dtmp[0]
wait 8
// write/read 32-bit word 0x55555555
set atmp i * slot_incr + 0x0
set dtmp[0] 0x55555555
print "Master 0 writes:%08x to AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
write w BASE atmp dtmp[0]
print "Master 0 verifying (reading):%08x from AHBLite slave:%0d at: %0d ns." dtmp[0] i $TIME
readcheck w BASE atmp dtmp[0]
wait 8
print "Master 0 done testing AHBLite slot:%0d at: %0d ns." i $TIME
call pr_underscores
else
call pr_underscores
print "Master 0 skipping test of AHBLite slot:%0d at: %0d ns." i $TIME
call pr_underscores
endif
else
call pr_underscores
print "Master 0 skipping test of AHBLite slot:%0d at: %0d ns." i $TIME
call pr_underscores
endif
// wait here between loops
endloop
//=========================================================================
# Wait until other masters have finished
iowaitbit 24 1
iowaitbit 25 1
iowaitbit 26 1
# Clear write indication bits for all slaves
iowrite 0x0001ffff
iowrite 0x00000000
# Check that bits are clear
iomask 0x00000000 0x0001ffff
# If MEMSPACE = 0, check access to huge slot
if MEMSPACE == 0
if M0_AHBSLOT16ENABLE == 1
print "Master 0 checking access to huge slot."
set atmp 0x00000000
set dtmp 0x11223344
write w 0x80000000 atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w 0x80000000 atmp dtmp
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
endif
endif
set M0_S0_IN_COMBINED M0_AHBSLOT16ENABLE and SC_0
set M0_S1_IN_COMBINED M0_AHBSLOT16ENABLE and SC_1
set M0_S2_IN_COMBINED M0_AHBSLOT16ENABLE and SC_2
set M0_S3_IN_COMBINED M0_AHBSLOT16ENABLE and SC_3
set M0_S4_IN_COMBINED M0_AHBSLOT16ENABLE and SC_4
set M0_S5_IN_COMBINED M0_AHBSLOT16ENABLE and SC_5
set M0_S6_IN_COMBINED M0_AHBSLOT16ENABLE and SC_6
set M0_S7_IN_COMBINED M0_AHBSLOT16ENABLE and SC_7
set M0_S8_IN_COMBINED M0_AHBSLOT16ENABLE and SC_8
set M0_S9_IN_COMBINED M0_AHBSLOT16ENABLE and SC_9
set M0_S10_IN_COMBINED M0_AHBSLOT16ENABLE and SC_10
set M0_S11_IN_COMBINED M0_AHBSLOT16ENABLE and SC_11
set M0_S12_IN_COMBINED M0_AHBSLOT16ENABLE and SC_12
set M0_S13_IN_COMBINED M0_AHBSLOT16ENABLE and SC_13
set M0_S14_IN_COMBINED M0_AHBSLOT16ENABLE and SC_14
set M0_S15_IN_COMBINED M0_AHBSLOT16ENABLE and SC_15
set M0_S0_ACTIVE M0_AHBSLOT0ENABLE or M0_S0_IN_COMBINED
set M0_S1_ACTIVE M0_AHBSLOT1ENABLE or M0_S1_IN_COMBINED
set M0_S2_ACTIVE M0_AHBSLOT2ENABLE or M0_S2_IN_COMBINED
set M0_S3_ACTIVE M0_AHBSLOT3ENABLE or M0_S3_IN_COMBINED
set M0_S4_ACTIVE M0_AHBSLOT4ENABLE or M0_S4_IN_COMBINED
set M0_S5_ACTIVE M0_AHBSLOT5ENABLE or M0_S5_IN_COMBINED
set M0_S6_ACTIVE M0_AHBSLOT6ENABLE or M0_S6_IN_COMBINED
set M0_S7_ACTIVE M0_AHBSLOT7ENABLE or M0_S7_IN_COMBINED
set M0_S8_ACTIVE M0_AHBSLOT8ENABLE or M0_S8_IN_COMBINED
set M0_S9_ACTIVE M0_AHBSLOT9ENABLE or M0_S9_IN_COMBINED
set M0_S10_ACTIVE M0_AHBSLOT10ENABLE or M0_S10_IN_COMBINED
set M0_S11_ACTIVE M0_AHBSLOT11ENABLE or M0_S11_IN_COMBINED
set M0_S12_ACTIVE M0_AHBSLOT12ENABLE or M0_S12_IN_COMBINED
set M0_S13_ACTIVE M0_AHBSLOT13ENABLE or M0_S13_IN_COMBINED
set M0_S14_ACTIVE M0_AHBSLOT14ENABLE or M0_S14_IN_COMBINED
set M0_S15_ACTIVE M0_AHBSLOT15ENABLE or M0_S15_IN_COMBINED
# If MEMSPACE != 0, check access to combined region
if MEMSPACE != 0
# Slot 0
if M0_S0_ACTIVE
set atmp 0 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_0 == 1
print "Slot 0 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT0ENABLE == 1
# Check that an access to slave 0 has occurred
iomask 0x00000001 0x0001ffff
print "Write to slave 0 detected."
# Clear slave 0 access indication
iosetbit 0
ioclrbit 0
iotstbit 0 0
endif
endif
endif
# Slot 1
if M0_S1_ACTIVE
set atmp 1 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_1 == 1
print "Slot 1 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT1ENABLE == 1
# Check that an access to slave 1 has occurred
iomask 0x00000002 0x0001ffff
print "Write to slave 1 detected."
# Clear slave 1 access indication
iosetbit 1
ioclrbit 1
iotstbit 1 0
endif
endif
endif
# Slot 2
if M0_S2_ACTIVE
set atmp 2 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_2 == 1
print "Slot 2 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT2ENABLE == 1
# Check that an access to slave 2 has occurred
iomask 0x00000004 0x0001ffff
print "Write to slave 2 detected."
# Clear slave 2 access indication
iosetbit 2
ioclrbit 2
iotstbit 2 0
endif
endif
endif
# Slot 3
if M0_S3_ACTIVE
set atmp 3 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_3 == 1
print "Slot 3 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT3ENABLE == 1
# Check that an access to slave 3 has occurred
iomask 0x00000008 0x0001ffff
print "Write to slave 3 detected."
# Clear slave 3 access indication
iosetbit 3
ioclrbit 3
iotstbit 3 0
endif
endif
endif
# Slot 4
if M0_S4_ACTIVE
set atmp 4 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_4 == 1
print "Slot 4 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT4ENABLE == 1
# Check that an access to slave 4 has occurred
iomask 0x00000010 0x0001ffff
print "Write to slave 4 detected."
# Clear slave 4 access indication
iosetbit 4
ioclrbit 4
iotstbit 4 0
endif
endif
endif
# Slot 5
if M0_S5_ACTIVE
set atmp 5 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_5 == 1
print "Slot 5 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT5ENABLE == 1
# Check that an access to slave 5 has occurred
iomask 0x00000020 0x0001ffff
print "Write to slave 5 detected."
# Clear slave 5 access indication
iosetbit 5
ioclrbit 5
iotstbit 5 0
endif
endif
endif
# Slot 6
if M0_S6_ACTIVE
set atmp 6 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_6 == 1
print "Slot 6 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT6ENABLE == 1
# Check that an access to slave 6 has occurred
iomask 0x00000040 0x0001ffff
print "Write to slave 6 detected."
# Clear slave 6 access indication
iosetbit 6
ioclrbit 6
iotstbit 6 0
endif
endif
endif
# Slot 7
if M0_S7_ACTIVE
set atmp 7 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_7 == 1
print "Slot 7 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT7ENABLE == 1
# Check that an access to slave 7 has occurred
iomask 0x00000080 0x0001ffff
print "Write to slave 7 detected."
# Clear slave 7 access indication
iosetbit 7
ioclrbit 7
iotstbit 7 0
endif
endif
endif
# Slot 8
if M0_S8_ACTIVE
set atmp 8 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_8 == 1
print "Slot 8 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT8ENABLE == 1
# Check that an access to slave 8 has occurred
iomask 0x00000100 0x0001ffff
print "Write to slave 8 detected."
# Clear slave 8 access indication
iosetbit 8
ioclrbit 8
iotstbit 8 0
endif
endif
endif
# Slot 9
if M0_S9_ACTIVE
set atmp 9 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_9 == 1
print "Slot 9 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT9ENABLE == 1
# Check that an access to slave 9 has occurred
iomask 0x00000200 0x0001ffff
print "Write to slave 9 detected."
# Clear slave 9 access indication
iosetbit 9
ioclrbit 9
iotstbit 9 0
endif
endif
endif
# Slot 10
if M0_S10_ACTIVE
set atmp 10 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_10 == 1
print "Slot 10 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT10ENABLE == 1
# Check that an access to slave 10 has occurred
iomask 0x00000400 0x0001ffff
print "Write to slave 10 detected."
# Clear slave 10 access indication
iosetbit 10
ioclrbit 10
iotstbit 10 0
endif
endif
endif
# Slot 11
if M0_S11_ACTIVE
set atmp 11 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_11 == 1
print "Slot 11 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT11ENABLE == 1
# Check that an access to slave 11 has occurred
iomask 0x00000800 0x0001ffff
print "Write to slave 11 detected."
# Clear slave 11 access indication
iosetbit 11
ioclrbit 11
iotstbit 11 0
endif
endif
endif
# Slot 12
if M0_S12_ACTIVE
set atmp 12 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_12 == 1
print "Slot 12 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT12ENABLE == 1
# Check that an access to slave 12 has occurred
iomask 0x00001000 0x0001ffff
print "Write to slave 12 detected."
# Clear slave 12 access indication
iosetbit 12
ioclrbit 12
iotstbit 12 0
endif
endif
endif
# Slot 13
if M0_S13_ACTIVE
set atmp 13 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_13 == 1
print "Slot 13 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT13ENABLE == 1
# Check that an access to slave 13 has occurred
iomask 0x00002000 0x0001ffff
print "Write to slave 13 detected."
# Clear slave 13 access indication
iosetbit 13
ioclrbit 13
iotstbit 13 0
endif
endif
endif
# Slot 14
if M0_S14_ACTIVE
set atmp 14 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_14 == 1
print "Slot 14 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT14ENABLE == 1
# Check that an access to slave 14 has occurred
iomask 0x00004000 0x0001ffff
print "Write to slave 14 detected."
# Clear slave 14 access indication
iosetbit 14
ioclrbit 14
iotstbit 14 0
endif
endif
endif
# Slot 15
if M0_S15_ACTIVE
set atmp 15 * slot_incr
set dtmp 0xaabbccdd
write w BASE atmp dtmp
print "Master 0 writes %08x to address %08x at: %0d ns." dtmp atmp $TIME
readcheck w BASE atmp dtmp
if SC_15 == 1
print "Slot 15 assigned to combined region."
# Check that an access to slave 16 has occurred
iomask 0x00010000 0x0001ffff
print "Write to slave 16 detected."
# Clear slave 16 access indication
iosetbit 16
ioclrbit 16
iotstbit 16 0
else
if M0_AHBSLOT15ENABLE == 1
# Check that an access to slave 15 has occurred
iomask 0x00008000 0x0001ffff
print "Write to slave 15 detected."
# Clear slave 15 access indication
iosetbit 15
ioclrbit 15
iotstbit 15 0
endif
endif
endif
endif
return