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[/] [ahbmaster/] [trunk/] [test79_AHBmaster/] [synthesis/] [synlog/] [report/] [AHBMASTER_FIC_fpga_mapper_warnings.txt] - Rev 3
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@W: MO160 :"c:\actelprj\test79_ahbmaster\hdl\ahbmaster_fic.vhd":106:2:106:3|Register bit HSIZE[2] (in view view:work.AHBMASTER_FIC(rtl)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.@W: MO161 :"c:\actelprj\test79_ahbmaster\hdl\ahbmaster_fic.vhd":106:2:106:3|Register bit HSIZE[1] (in view view:work.AHBMASTER_FIC(rtl)) is always 1. To keep the instance, apply syn_preserve=1 on the instance.@W: MO160 :"c:\actelprj\test79_ahbmaster\hdl\ahbmaster_fic.vhd":106:2:106:3|Register bit HSIZE[0] (in view view:work.AHBMASTER_FIC(rtl)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.@W: MT420 |Found inferred clock AHBMASTER_FIC|HCLK with period 10.00ns. Please declare a user-defined clock on object "p:HCLK"