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https://opencores.org/ocsvn/am9080_cpu_based_on_microcoded_am29xx_bit-slices/am9080_cpu_based_on_microcoded_am29xx_bit-slices/trunk
Subversion Repositories am9080_cpu_based_on_microcoded_am29xx_bit-slices
[/] [am9080_cpu_based_on_microcoded_am29xx_bit-slices/] [trunk/] [ipcore_dir/] [rom4kx8/] [implement/] [implement.bat] - Rev 6
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rem Clean up the results directory
rmdir /S /Q results
mkdir results
rem Synthesize the VHDL Wrapper Files
echo 'Synthesizing example design with XST';
xst -ifn xst.scr
copy rom4kx8_exdes.ngc .\results\
rem Copy the netlist generated by Coregen
echo 'Copying files from the netlist directory to the results directory'
copy ..\..\rom4kx8.ngc results\
rem Copy the constraints files generated by Coregen
echo 'Copying files from constraints directory to results directory'
copy ..\example_design\rom4kx8_exdes.ucf results\
cd results
echo 'Running ngdbuild'
ngdbuild -p xc3s200a-vq100-4 rom4kx8_exdes
echo 'Running map'
map rom4kx8_exdes -o mapped.ncd -pr i
echo 'Running par'
par mapped.ncd routed.ncd
echo 'Running trce'
trce -e 10 routed.ncd mapped.pcf -o routed
echo 'Running design through bitgen'
bitgen -w routed
echo 'Running netgen to create gate level VHDL model'
netgen -ofmt vhdl -sim -tm rom4kx8_exdes -pcf mapped.pcf -w routed.ncd routed.vhd