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[/] [amber/] [trunk/] [hw/] [tests/] [ldm2.S] - Rev 32
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/*****************************************************************// //// Amber 2 Core Instruction Test //// //// This file is part of the Amber project //// http://www.opencores.org/project,amber //// //// Description //// Tests ldm where the user mode registers are loaded //// whilst in a privileged mode. //// //// Author(s): //// - Conor Santifort, csantifort.amber@gmail.com //// ////////////////////////////////////////////////////////////////////// //// Copyright (C) 2010 Authors and OPENCORES.ORG //// //// This source file may be used and distributed without //// restriction provided that this copyright statement is not //// removed from the file and that any derivative work contains //// the original copyright notice and the associated disclaimer. //// //// This source file is free software; you can redistribute it //// and/or modify it under the terms of the GNU Lesser General //// Public License as published by the Free Software Foundation; //// either version 2.1 of the License, or (at your option) any //// later version. //// //// This source is distributed in the hope that it will be //// useful, but WITHOUT ANY WARRANTY; without even the implied //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// PURPOSE. See the GNU Lesser General Public License for more //// details. //// //// You should have received a copy of the GNU Lesser General //// Public License along with this source; if not, download it //// from http://www.opencores.org/lgpl.shtml //// //*****************************************************************/#include "amber_registers.h".section .text.globl mainmain:@ Start in Supervisor Mode@ Load values directly into the two dedicated supervisor mode registers@ and then check they are unaffected by the ldm instructionmov r13, #17mov r14, #34@ Load user mode registers with some values from memoryldr r3, StaticBaseldmia r3, {r0-r14}^cmp r13, #17movne r10, #200bne testfailcmp r14, #34movne r10, #210bne testfail@ Jump into user mode@ and check that the user mode registers@ were all loadedmov r2, #0x00000000teqp pc, r2nop@ the value 14 comes from the dataset below@ thats used by ldm abovecmp r14, #0xemovne r10, #10bne testfailcmp r13, #0xdmovne r10, #20bne testfailcmp r12, #0xcmovne r10, #30bne testfailcmp r11, #0xbmovne r10, #40bne testfailcmp r10, #0xamovne r10, #40bne testfailcmp r9, #0x9movne r10, #50bne testfailcmp r8, #0x8movne r10, #60bne testfailcmp r7, #0x7movne r10, #70bne testfailcmp r6, #0x6movne r10, #80bne testfailcmp r5, #0x5movne r10, #90bne testfailcmp r4, #0x4movne r10, #100bne testfailcmp r3, #0x3movne r10, #110bne testfailcmp r1, #0x1movne r10, #130bne testfailcmp r0, #0x0movne r10, #140bne testfail@ ------------------------------------------@ ------------------------------------------b testpasstestfail:ldr r11, AdrTestStatusstr r10, [r11]b testfailtestpass:ldr r11, AdrTestStatusmov r10, #17str r10, [r11]b testpass/* Write 17 to this address to generate a Test Passed message */AdrTestStatus: .word ADR_AMBER_TEST_STATUSStoreBase: .word 0x800StaticBase: .word Data1StaticEnd: .word Data18Data1: .word 0x00.word 0x01.word 0x02.word 0x03.word 0x04.word 0x05.word 0x06.word 0x07.word 0x08.word 0x09.word 0x0a.word 0x0b.word 0x0c.word 0x0d.word 0x0e.word 0x0f.word 0x10Data18: .word 0x11/* ========================================================================= *//* ========================================================================= */
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