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/*****************************************************************// //// Amber 2 Core Instruction Test //// //// This file is part of the Amber project //// http://www.opencores.org/project,amber //// //// Description //// Tests lrd and ldrb //// //// Author(s): //// - Conor Santifort, csantifort.amber@gmail.com //// ////////////////////////////////////////////////////////////////////// //// Copyright (C) 2010 Authors and OPENCORES.ORG //// //// This source file may be used and distributed without //// restriction provided that this copyright statement is not //// removed from the file and that any derivative work contains //// the original copyright notice and the associated disclaimer. //// //// This source file is free software; you can redistribute it //// and/or modify it under the terms of the GNU Lesser General //// Public License as published by the Free Software Foundation; //// either version 2.1 of the License, or (at your option) any //// later version. //// //// This source is distributed in the hope that it will be //// useful, but WITHOUT ANY WARRANTY; without even the implied //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// PURPOSE. See the GNU Lesser General Public License for more //// details. //// //// You should have received a copy of the GNU Lesser General //// Public License along with this source; if not, download it //// from http://www.opencores.org/lgpl.shtml //// //*****************************************************************/#include "amber_registers.h".section .text.globl mainmain:/* Load Byte 0 */ldr r0, AdrData1ldrb r1, [r0]ldr r2, Data2cmp r1, r2movne r10, #10bne testfail/* Load Byte 1 */add r0, r0, #1ldrb r3, [r0]ldr r4, Data3cmp r3, r4movne r10, #20bne testfail/* Load Byte 2 */add r0, r0, #1ldrb r5, [r0]ldr r6, Data4cmp r5, r6movne r10, #30bne testfail/* Load Byte 3 */add r0, r0, #1ldrb r7, [r0]ldr r8, Data5cmp r7, r8movne r10, #40bne testfail/* Immediate offset */ldr r0, AdrData1ldr r1, [r0, #4]ldr r3, Data2cmp r1, r3movne r10, #50bne testfail@ Check that r0 is not alteredldr r8, AdrData1cmp r0, r8movne r10, #60bne testfail/* test negative offset */ldr r0, AdrData8ldr r2, [r0, #-12]ldr r3, Data5cmp r2, r3movne r10, #70bne testfail@ Check that r0 is not alteredldr r8, AdrData8cmp r0, r8movne r10, #80bne testfail/* Immediate pre-indexed */ldr r0, AdrData1ldr r1, [r0, #4]!@ check that r0 was incremented correctlyldr r8, AdrData1add r8, r8, #4cmp r0, r8movne r10, #90bne testfail@ check that correct value was loaded into r1ldr r2, Data2cmp r1, r2movne r10, #100bne testfail/* Immediate post-indexed */ldr r0, AdrData1ldr r1, [r0], #4ldr r2, [r0], #4ldr r3, Data1cmp r1, r3movne r10, #110bne testfailldr r4, Data2cmp r2, r4movne r10, #120bne testfailldr r8, AdrData1add r8, r8, #8cmp r0, r8movne r10, #130bne testfail/* Register offset */ldr r0, AdrData1mov r1, #1ldr r2, [r0, r1]ldr r3, Data7cmp r2, r3movne r10, #140bne testfail/* Register offset pre-indexed */ldr r0, AdrData1mov r1, #3ldr r2, [r0, r1]!ldr r3, Data8cmp r2, r3movne r10, #150bne testfailldr r4, AdrData1add r4, r4, #3cmp r0, r4/* Register offset post-indexed */ldr r5, AdrData1mov r6, #2ldr r7, [r5], -r6ldr r8, Data1cmp r7, r8movne r10, #160bne testfailldr r9, AdrData1sub r9, r9, #2cmp r5, r9bne testfail/* Scaled Register offset */ldr r0, AdrData1mov r1, #2/* r2 <- contents of 'AdrData1 + 8' */ldr r2, [r0, r1, lsl #2]ldr r3, Data3cmp r2, r3movne r10, #170bne testfail/* Scaled Register offset pre-indexed */ldr r4, AdrData1mov r5, #8/* r6 <- contents of 'AdrData1 + 4' *//* r4 <- AdrData1 + 4 */ldr r6, [r4, r5, lsr #1]!ldr r8, Data2cmp r6, r8movne r10, #180bne testfailldr r7, AdrData1add r7, r7, #4cmp r4, r7movne r10, #190bne testfail/* Scaled Register offset post-indexed */ldr r0, AdrData8mov r1, #1ldr r2, [r0], -r1, ror #28ldr r3, Data8cmp r2, r3movne r10, #200bne testfailldr r4, AdrData8sub r4, r4, #16cmp r0, r4movne r10, #210bne testfail/* Test unaligned word loads */ldr r0, Data9mov r1, #0x200str r0, [r1]ldr r2, [r1], #1ldr r3, [r1], #1ldr r4, [r1], #1ldr r5, [r1], #1cmp r2, r0movne r10, #220bne testfailmov r6, r0, ror #8cmp r6, r3movne r10, #230bne testfailmov r7, r0, ror #16cmp r7, r4movne r10, #240bne testfailmov r8, r0, ror #24cmp r8, r5movne r10, #250bne testfailb testpasstestfail:ldr r11, AdrTestStatusstr r10, [r11]b testfailtestpass:ldr r11, AdrTestStatusmov r10, #17str r10, [r11]b testpass/* Write 17 to this address to generate a Test Passed message */AdrTestStatus: .word ADR_AMBER_TEST_STATUSAdrData1: .word Data1AdrData8: .word Data8Data1: .word 0x12345678Data2: .word 0x00000078Data3: .word 0x00000056Data4: .word 0x00000034Data5: .word 0x00000012Data6: .word 0xfecba987Data7: .word 0x78123456Data8: .word 0x34567812Data9: .word 0x33221100/* ========================================================================= *//* ========================================================================= */