URL
https://opencores.org/ocsvn/amber/amber/trunk
Subversion Repositories amber
[/] [amber/] [trunk/] [hw/] [tests/] [stm1.S] - Rev 15
Go to most recent revision | Compare with Previous | Blame | View Log
/*****************************************************************// //// Amber 2 Core Instruction Test //// //// This file is part of the Amber project //// http://www.opencores.org/project,amber //// //// Description //// Tests stm //// //// Author(s): //// - Conor Santifort, csantifort.amber@gmail.com //// ////////////////////////////////////////////////////////////////////// //// Copyright (C) 2010 Authors and OPENCORES.ORG //// //// This source file may be used and distributed without //// restriction provided that this copyright statement is not //// removed from the file and that any derivative work contains //// the original copyright notice and the associated disclaimer. //// //// This source file is free software; you can redistribute it //// and/or modify it under the terms of the GNU Lesser General //// Public License as published by the Free Software Foundation; //// either version 2.1 of the License, or (at your option) any //// later version. //// //// This source is distributed in the hope that it will be //// useful, but WITHOUT ANY WARRANTY; without even the implied //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// PURPOSE. See the GNU Lesser General Public License for more //// details. //// //// You should have received a copy of the GNU Lesser General //// Public License along with this source; if not, download it //// from http://www.opencores.org/lgpl.shtml //// //*****************************************************************/#include "amber_registers.h".section .text.globl mainmain:@ ------------------------------------------@ 1. stmia r14!, {r0-r13}@ ------------------------------------------mov r0, #0mov r1, #1mov r2, #2mov r3, #3mov r4, #4mov r5, #5mov r6, #6mov r7, #7mov r8, #8mov r9, #9mov r10, #10mov r11, #11mov r12, #12mov r13, #13ldr r14, StoreBasestmia r14!, {r0-r13}@ Check that r14 was updated correctlyldr r0, StoreBaseadd r0, r0, #56 @ 14 x 4cmp r14, r0movne r10, #20bne testfail@ Check that all values were saved to memory correctlymov r2, #0ldr r0, StoreBaseloop1: ldr r1, [r0], #4cmp r1, r2movne r10, #30bne testfailcmp r2, #13beq start2add r2, r2, #1b loop1@ ------------------------------------------@ 2. stmib r14!, {r0-r13}@ ------------------------------------------start2:mov r0, #0mov r1, #1mov r2, #2mov r3, #3mov r4, #4mov r5, #5mov r6, #6mov r7, #7mov r8, #8mov r9, #9mov r10, #10mov r11, #11mov r12, #12mov r13, #13ldr r14, StoreBasestmib r14!, {r0-r13}@ Check that r14 was updated correctlyldr r0, StoreBaseadd r0, r0, #56 @ 14 x 4cmp r14, r0movne r10, #40bne testfail@ Check that all values were saved to memory correctlymov r2, #0ldr r0, StoreBaseadd r0, r0, #4loop2: ldr r1, [r0], #4cmp r1, r2movne r10, #50bne testfailcmp r2, #13beq start3add r2, r2, #1b loop2@ ------------------------------------------@ 3. stmib r14!, {r14}@ Test that the starting value of r14 is stored@ Test that storing a single register works correctly@ ------------------------------------------start3:ldr r14, StoreBasestmib r14!, {r14}@ check that r14 got updated with a new valueldr r0, StoreBaseadd r1, r0, #4cmp r14, r1movne r10, #60bne testfail@ check that the old value in r14 was storedldr r2, [r1]cmp r2, r0movne r10, #70bne testfail@ ------------------------------------------@ 4. stmda r0, {r14, pc}@ Test that r0 is not updated@ Test that the correct pc value is stored@ Test that Descending works@ ------------------------------------------start4:mov r14, #97ldr r0, StoreBasemov r2, pc @ NB this must be immediately before@ the stm instruction to capture the@ correct pc value for checking belowstmda r0, {lr, pc}@ check that r0 did not get updatedldr r1, StoreBasecmp r0, r1movne r10, #70bne testfail@ check that the correct pc value was stored@ The value of the pc is 12 bytes after the address of the stm instructionadd r2, r2, #8ldr r3, [r1]cmp r2, r3movne r10, #80bne testfail@ check that r14 was stored in the correct placeldr r1, StoreBasesub r1, r1, #4ldr r4, [r1]cmp r4, #97movne r10, #90bne testfail@ ------------------------------------------@ 5. stmdb r9!, {r0, r9, r10}@ Test non-continuous range of registers@ Test that r9 is updated correctly@ ------------------------------------------mov r0, #17ldr r9, StoreBasemov r10, #18stmdb r9!, {r0, r9, r10}ldr r3, StoreBasesub r3, r3, #12ldr r4, [r3], #4cmp r4, #17movne r10, #100bne testfail@ r9 is the second register on the list, so the updated@ value gets stored in StoreBase - 8ldr r4, [r3] @ r3 points to StoreBase - 8ldr r3, StoreBasesub r3, r3, #12cmp r3, r4movne r10, #110bne testfailldr r3, StoreBasesub r3, r3, #4ldr r4, [r3]cmp r4, #18movne r10, #120bne testfail@ ------------------------------------------@ ------------------------------------------b testpasstestfail:ldr r11, AdrTestStatusstr r10, [r11]b testfailtestpass:ldr r11, AdrTestStatusmov r10, #17str r10, [r11]b testpass/* Write 17 to this address to generate a Test Passed message */AdrTestStatus: .word ADR_AMBER_TEST_STATUSAdrData1: .word Data1AdrData2: .word Data2StoreBase: .word 0x800Data1: .word 0x12345678Data2: .word 0xffccbbaaData3: .word 0x12345600/* ========================================================================= *//* ========================================================================= */
Go to most recent revision | Compare with Previous | Blame | View Log