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[/] [amber/] [trunk/] [hw/] [tests/] [uart_reg.S] - Rev 32
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/*****************************************************************// //// Amber 2 System UART Test //// //// This file is part of the Amber project //// http://www.opencores.org/project,amber //// //// Description //// Tests wishbone read and write access to the Amber UART //// registers. //// //// Author(s): //// - Conor Santifort, csantifort.amber@gmail.com //// ////////////////////////////////////////////////////////////////////// //// Copyright (C) 2010 Authors and OPENCORES.ORG //// //// This source file may be used and distributed without //// restriction provided that this copyright statement is not //// removed from the file and that any derivative work contains //// the original copyright notice and the associated disclaimer. //// //// This source file is free software; you can redistribute it //// and/or modify it under the terms of the GNU Lesser General //// Public License as published by the Free Software Foundation; //// either version 2.1 of the License, or (at your option) any //// later version. //// //// This source is distributed in the hope that it will be //// useful, but WITHOUT ANY WARRANTY; without even the implied //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// PURPOSE. See the GNU Lesser General Public License for more //// details. //// //// You should have received a copy of the GNU Lesser General //// Public License along with this source; if not, download it //// from http://www.opencores.org/lgpl.shtml //// //*****************************************************************/#include "amber_registers.h".section .text.globl mainmain:@ -------------------------------------------@ Write to and read back from UART0 registersldr r0, AdrUart0LCRHldr r1, AdrUart0LCRMldr r2, AdrUart0LCRLmov r7, #0x80mov r8, #0x0fmov r9, #0xccstr r7, [r0]str r8, [r1]str r9, [r2]@ Read Backldr r4, [r0]ldr r5, [r1]ldr r6, [r2]@ Check values read backcmp r4, r7movne r10, #10bne testfailcmp r5, r8movne r10, #20bne testfailcmp r6, r9movne r10, #30bne testfail@ -------------------------------------------@ Write to and read back from UART1 registersldr r0, AdrUart1LCRHldr r1, AdrUart1LCRMldr r2, AdrUart1LCRLmov r7, #0x44mov r8, #0x22mov r9, #0x55str r7, [r0]str r8, [r1]str r9, [r2]@ Read Backldr r4, [r0]ldr r5, [r1]ldr r6, [r2]@ Check values read backcmp r4, r7movne r10, #40bne testfailcmp r5, r8movne r10, #50bne testfailcmp r6, r9movne r10, #60bne testfail@ ------------------------------------------@ ------------------------------------------b testpasstestfail:ldr r11, AdrTestStatusstr r10, [r11]b testfailtestpass:ldr r11, AdrTestStatusmov r10, #17str r10, [r11]b testpass@ ------------------------------------------@ ------------------------------------------/* Write 17 to this address to generate a Test Passed message */AdrTestStatus: .word ADR_AMBER_TEST_STATUSAdrUart0LCRH: .word ADR_AMBER_UART0_LCRHAdrUart0LCRM: .word ADR_AMBER_UART0_LCRMAdrUart0LCRL: .word ADR_AMBER_UART0_LCRLAdrUart1LCRH: .word ADR_AMBER_UART1_LCRHAdrUart1LCRM: .word ADR_AMBER_UART1_LCRMAdrUart1LCRL: .word ADR_AMBER_UART1_LCRL
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