Subversion Repositories amber

# Date: Sun Apr 28 11:01:18 2013

SET addpads = false
SET asysymbol = true
SET busformat = BusFormatAngleBracketNotRipped
SET createndf = false
SET designentry = Verilog
SET device = xc6slx45t
SET devicefamily = spartan6
SET flowvendor = Other
SET formalverification = false
SET foundationsym = false
SET implementationfiletype = Ngc
SET package = fgg484
SET removerpms = false
SET simulationfiles = Structural
SET speedgrade = -3
SET verilogsim = true
SET vhdlsim = false
SET workingdirectory = ./tmp/

# CRC: 78bed5b0