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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [ip/] [Processor/] [aeMB.IP] - Rev 40
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#######################################################################
## File: aeMB.IP
##
## Copyright (C) 2014-2016 Alireza Monemi
##
## This file is part of ProNoC 1.7.0
##
## WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT
## MAY CAUSE UNEXPECTED BEHAIVOR.
################################################################################
$ipgen = bless( {
'unused' => undef,
'parameters' => {
'AEMB_DWB' => {
'redefine_param' => 1,
'info' => undef,
'default' => ' 32',
'content' => '',
'global_param' => 'Localparam',
'type' => 'Fixed'
},
'AEMB_BSF' => {
'default' => ' 1',
'content' => '',
'redefine_param' => 1,
'info' => undef,
'global_param' => 'Localparam',
'type' => 'Fixed'
},
'AEMB_IWB' => {
'global_param' => 'Localparam',
'type' => 'Fixed',
'content' => '',
'default' => ' 32',
'redefine_param' => 1,
'info' => undef
},
'AEMB_XWB' => {
'type' => 'Fixed',
'global_param' => 'Localparam',
'content' => '',
'default' => ' 7',
'info' => undef,
'redefine_param' => 1
},
'HEAP_SIZE' => {
'info' => undef,
'redefine_param' => 0,
'content' => '',
'default' => '0x400',
'type' => 'Entry',
'global_param' => 'Don\'t include'
},
'AEMB_MUL' => {
'default' => ' 1',
'content' => '',
'info' => undef,
'redefine_param' => 1,
'type' => 'Fixed',
'global_param' => 'Localparam'
},
'AEMB_IDX' => {
'info' => undef,
'redefine_param' => 1,
'default' => ' 6',
'content' => '',
'type' => 'Fixed',
'global_param' => 'Localparam'
},
'AEMB_ICH' => {
'global_param' => 'Localparam',
'type' => 'Fixed',
'content' => '',
'default' => ' 11',
'redefine_param' => 1,
'info' => undef
},
'STACK_SIZE' => {
'type' => 'Entry',
'global_param' => 'Don\'t include',
'default' => '0x400',
'content' => '',
'info' => 'The stack size in hex',
'redefine_param' => 0
}
},
'hdl_files' => [
'/mpsoc/src_processor/aeMB/verilog/aemb.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB_core.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB_xecu.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB_sim.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB_bpcu.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB_edk32.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_xslif.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB_ctrl.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB_ibuf.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_tpsram.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB_regf.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_exec.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_sparam.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_intu.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_regs.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_spsram.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_memif.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_mult.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_gprf.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_pipe.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_brcc.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_dparam.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_edk63.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_bsft.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_ctrl.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_dwbif.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_edk62.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_sim.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_iche.v',
'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_iwbif.v'
],
'file_name' => '/home/alireza/Mywork/mpsoc/src_processor/aeMB/verilog/aemb.v',
'module_name' => 'aeMB_top',
'sockets' => {
'interrupt_cpu' => {
'connection_num' => 'single connection',
'type' => 'num',
'0' => {
'name' => 'interrupt_cpu'
},
'value' => 1
}
},
'version' => 2,
'description' => 'AEMB 32-bit Microprocessor Core
For more information check http://opencores.org/project,aemb',
'gen_sw_files' => [
'/mpsoc/src_processor/aeMB/sw/compile/gccromfrename_sep_tcompile/gccrom',
'/mpsoc/src_processor/aeMB/sw/Makefilefrename_sep_tMakefile'
],
'plugs' => {
'enable' => {
'type' => 'num',
'0' => {
'name' => 'enable'
},
'value' => 1,
'enable' => {}
},
'clk' => {
'clk' => {},
'value' => 1,
'0' => {
'name' => 'clk'
},
'type' => 'num'
},
'wb_master' => {
'wb_master' => {},
'1' => {
'name' => 'dwb'
},
'value' => 2,
'type' => 'num',
'0' => {
'name' => 'iwb'
}
},
'reset' => {
'reset' => {},
'0' => {
'name' => 'reset'
},
'type' => 'num',
'value' => 1
}
},
'ports' => {
'iwb_tag_o' => {
'type' => 'output',
'intfc_name' => 'plug:wb_master[0]',
'intfc_port' => 'tag_o',
'range' => '2:0'
},
'iwb_adr_o' => {
'type' => 'output',
'intfc_name' => 'plug:wb_master[0]',
'intfc_port' => 'adr_o',
'range' => '31:0'
},
'clk' => {
'range' => '',
'intfc_port' => 'clk_i',
'type' => 'input',
'intfc_name' => 'plug:clk[0]'
},
'dwb_rty_i' => {
'type' => 'input',
'intfc_name' => 'plug:wb_master[1]',
'intfc_port' => 'rty_i',
'range' => ''
},
'dwb_stb_o' => {
'range' => '',
'intfc_port' => 'stb_o',
'type' => 'output',
'intfc_name' => 'plug:wb_master[1]'
},
'dwb_wre_o' => {
'range' => '',
'intfc_port' => 'we_o',
'intfc_name' => 'plug:wb_master[1]',
'type' => 'output'
},
'iwb_stb_o' => {
'range' => '',
'intfc_port' => 'stb_o',
'type' => 'output',
'intfc_name' => 'plug:wb_master[0]'
},
'reset' => {
'intfc_name' => 'plug:reset[0]',
'type' => 'input',
'intfc_port' => 'reset_i',
'range' => ''
},
'dwb_bte_o' => {
'type' => 'output',
'intfc_name' => 'plug:wb_master[1]',
'intfc_port' => 'bte_o',
'range' => '1:0'
},
'dwb_dat_i' => {
'range' => '31:0',
'intfc_port' => 'dat_i',
'intfc_name' => 'plug:wb_master[1]',
'type' => 'input'
},
'dwb_dat_o' => {
'range' => '31:0',
'intfc_port' => 'dat_o',
'type' => 'output',
'intfc_name' => 'plug:wb_master[1]'
},
'iwb_rty_i' => {
'range' => '',
'intfc_port' => 'rty_i',
'type' => 'input',
'intfc_name' => 'plug:wb_master[0]'
},
'iwb_cyc_o' => {
'intfc_port' => 'cyc_o',
'range' => '',
'intfc_name' => 'plug:wb_master[0]',
'type' => 'output'
},
'dwb_cyc_o' => {
'intfc_name' => 'plug:wb_master[1]',
'type' => 'output',
'range' => '',
'intfc_port' => 'cyc_o'
},
'dwb_sel_o' => {
'intfc_port' => 'sel_o',
'range' => '3:0',
'type' => 'output',
'intfc_name' => 'plug:wb_master[1]'
},
'sys_int_i' => {
'intfc_port' => 'int_i',
'range' => '',
'type' => 'input',
'intfc_name' => 'socket:interrupt_cpu[0]'
},
'iwb_dat_i' => {
'intfc_port' => 'dat_i',
'range' => '31:0',
'intfc_name' => 'plug:wb_master[0]',
'type' => 'input'
},
'dwb_err_i' => {
'intfc_port' => 'err_i',
'range' => '',
'type' => 'input',
'intfc_name' => 'plug:wb_master[1]'
},
'iwb_sel_o' => {
'type' => 'output',
'intfc_name' => 'plug:wb_master[0]',
'intfc_port' => 'sel_o',
'range' => '3:0'
},
'iwb_wre_o' => {
'intfc_port' => 'we_o',
'range' => '',
'type' => 'output',
'intfc_name' => 'plug:wb_master[0]'
},
'dwb_adr_o' => {
'intfc_name' => 'plug:wb_master[1]',
'type' => 'output',
'intfc_port' => 'adr_o',
'range' => '31:0'
},
'iwb_cti_o' => {
'range' => '2:0',
'intfc_port' => 'cti_o',
'type' => 'output',
'intfc_name' => 'plug:wb_master[0]'
},
'iwb_err_i' => {
'intfc_port' => 'err_i',
'range' => '',
'intfc_name' => 'plug:wb_master[0]',
'type' => 'input'
},
'dwb_tag_o' => {
'type' => 'output',
'intfc_name' => 'plug:wb_master[1]',
'intfc_port' => 'tag_o',
'range' => '2:0'
},
'sys_ena_i' => {
'intfc_name' => 'plug:enable[0]',
'type' => 'input',
'intfc_port' => 'enable_i',
'range' => ''
},
'dwb_ack_i' => {
'range' => '',
'intfc_port' => 'ack_i',
'intfc_name' => 'plug:wb_master[1]',
'type' => 'input'
},
'iwb_bte_o' => {
'range' => '1:0',
'intfc_port' => 'bte_o',
'intfc_name' => 'plug:wb_master[0]',
'type' => 'output'
},
'iwb_dat_o' => {
'intfc_name' => 'plug:wb_master[0]',
'type' => 'output',
'intfc_port' => 'dat_o',
'range' => '31:0'
},
'dwb_cti_o' => {
'type' => 'output',
'intfc_name' => 'plug:wb_master[1]',
'range' => '2:0',
'intfc_port' => 'cti_o'
},
'iwb_ack_i' => {
'intfc_name' => 'plug:wb_master[0]',
'type' => 'input',
'intfc_port' => 'ack_i',
'range' => ''
}
},
'gui_status' => {
'status' => 'ideal',
'timeout' => 0
},
'modules' => {
'aeMB_top' => {}
},
'ip_name' => 'aeMB',
'system_h' => ' #include <stdio.h>
#include <stdlib.h>
#include "aemb/core.hh"
inline void nop (void) {
asm volatile ("nop");
}',
'ports_order' => [
'dwb_adr_o',
'dwb_cyc_o',
'dwb_dat_o',
'dwb_sel_o',
'dwb_stb_o',
'dwb_tag_o',
'dwb_wre_o',
'dwb_cti_o',
'dwb_bte_o',
'dwb_ack_i',
'dwb_dat_i',
'dwb_err_i',
'dwb_rty_i',
'iwb_adr_o',
'iwb_cyc_o',
'iwb_sel_o',
'iwb_stb_o',
'iwb_tag_o',
'iwb_wre_o',
'iwb_dat_o',
'iwb_cti_o',
'iwb_bte_o',
'iwb_ack_i',
'iwb_dat_i',
'iwb_err_i',
'iwb_rty_i',
'clk',
'reset',
'sys_int_i',
'sys_ena_i'
],
'category' => 'Processor',
'sw_files' => [
'/mpsoc/src_processor/aeMB/sw/aemb',
'/mpsoc/src_processor/aeMB/sw/compile',
'/mpsoc/src_processor/aeMB/sw/program',
'/mpsoc/src_processor/program.sh',
'/mpsoc/src_processor/aeMB/sw/define_printf.h'
],
'parameters_order' => [
'AEMB_IWB',
'AEMB_DWB',
'AEMB_XWB',
'AEMB_ICH',
'AEMB_IDX',
'AEMB_BSF',
'AEMB_MUL',
'STACK_SIZE',
'HEAP_SIZE'
]
}, 'ip_gen' );
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