URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc
[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [script/] [split] - Rev 34
Go to most recent revision | Compare with Previous | Blame | View Log
#!/usr/bin/perl
use Verilog::EditFiles;
my $split = Verilog::EditFiles->new
(outdir => "processed_rtl",
translate_synthesis => 0,
# lint_header =>" `include \"define.v\" \n ",
celldefine => 0,
);
$split->read_and_split(glob("rtl_work/*.v"));
$split->write_files();
$split->edit_file(filename=>"foo", cb => sub { return $_[0]; });
Go to most recent revision | Compare with Previous | Blame | View Log