OpenCores
URL https://opencores.org/ocsvn/ao486/ao486/trunk

Subversion Repositories ao486

[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_CPUID.txt] - Rev 6

Go to most recent revision | Compare with Previous | Blame | View Log


<defines>
`define CMD_CPUID           #AUTOGEN_NEXT_CMD

`define CMDEX_CPUID_STEP_LAST   4'd0
</defines>

<decode>
dec_ready_2byte_one && decoder[7:0] == 8'hA2
`CMD_CPUID
SET(dec_cmdex, `CMDEX_CPUID_STEP_LAST);
SET(consume_one);
SET(dec_is_complex);
</decode>

<microcode>
LOOP(`CMDEX_CPUID_STEP_LAST);
</microcode>

<read>
IF(rd_cmd == `CMD_CPUID);
    
    SET(rd_req_eax);
    SET(rd_req_ebx);
    SET(rd_req_ecx);
    SET(rd_req_edx);

    IF(rd_mutex_busy_eax); SET(rd_waiting); ENDIF();
ENDIF();
</read>

<write>
IF(wr_cmd == `CMD_CPUID);
    
    IF(eax == 32'd0);
        SAVE(eax, 32'd1);
        SAVE(ebx, "ineG");
        SAVE(edx, "Aenu");
        SAVE(ecx, "684O");
    ENDIF();
    
    IF(eax != 32'd0);
        SAVE(eax, `CPUID_MODEL_FAMILY_STEPPING);
        SAVE(ebx, 32'h00010000);
        SAVE(ecx, 32'd0);
        SAVE(edx, 32'd0);
    ENDIF();
    
    //reset pipeline
    SET(wr_req_reset_micro);
    SET(wr_req_reset_rd);
    SET(wr_req_reset_exe);
ENDIF();  
</write>

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.