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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_MOVS.txt] - Rev 2

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<defines>
`define CMD_MOVS        #AUTOGEN_NEXT_CMD

`define CMDEX_MOVS_STEP_0   4'd0
</defines>

<decode>
dec_ready_one && { decoder[7:1], 1'b0 } == 8'hA4
`CMD_MOVS
SET(dec_cmdex, `CMDEX_MOVS_STEP_0);
IF(decoder[0] == 1'b0); SET(dec_is_8bit); ENDIF();
SET(consume_one);
IF(dec_prefix_group_1_rep != 2'd0); SET(dec_is_complex); ENDIF();
</decode>

<microcode>
//complex instruction only if: dec_prefix_group_1_rep != 2'd0
LOOP(`CMDEX_MOVS_STEP_0);
</microcode>

<read>
IF(rd_cmd == `CMD_MOVS);
            
    SET(address_esi); // 5 cycle delay

    //waiting for esi in 'address_waiting'
    
    IF(rd_mutex_busy_memory || (rd_mutex_busy_ecx && rd_prefix_group_1_rep != 2'd0)); SET(rd_waiting); //waiting for ecx for rd_string_ignore
    ELSE();
        
        IF(~(rd_string_ignore)); 
            SET(rd_src_is_memory);
            
            SET(rd_req_memory);
            SET(rd_req_esi);
            SET(rd_req_edi);
            //not needed -- reset after finish //IF(rd_prefix_group_1_rep != 2'd0); SET(rd_req_ecx); ENDIF();
            
            SET(read_virtual);

            IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
        ENDIF();
    ENDIF();
ENDIF();
</read>

<execute>
IF(exe_cmd == `CMD_MOVS);
    SET(exe_result_push, src);
ENDIF();
</execute>

<write>
IF(wr_cmd == `CMD_MOVS);
    
    SET(wr_string_gp_fault_check);
    
    IF(~(wr_string_ignore));
        SET(wr_one_cycle_wait);
        
        IF(~(wr_string_es_fault));
            SET(write_string_es_virtual);
        ENDIF();
        
        IF(~(write_for_wr_ready)); SET(wr_waiting);
        ELSE();
            SAVE(esi, wr_esi_final);
            SAVE(edi, wr_edi_final);
            IF(wr_prefix_group_1_rep != 2'd0); SAVE(ecx, wr_ecx_final); ENDIF();
                
            IF(wr_string_finish);
                SET(wr_req_reset_micro);
                SET(wr_req_reset_rd);
                SET(wr_req_reset_exe);
            ELSE();
                IF(wr_prefix_group_1_rep != 2'd0);
                    SET(wr_not_finished);

                    SET(wr_string_in_progress);
                ENDIF();
            ENDIF();
        ENDIF();
    ENDIF();

    IF(wr_string_ignore);
        SET(wr_req_reset_micro);
        SET(wr_req_reset_rd);
        SET(wr_req_reset_exe);
    ENDIF();
ENDIF();  
</write>

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