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[/] [ao486/] [trunk/] [rtl/] [ao486/] [commands/] [CMD_SHxD.txt] - Rev 2
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<defines>
`define CMD_SHxD #AUTOGEN_NEXT_CMD_MOD2
`define CMD_SHLD #AUTOGEN_NEXT_CMD_LIKE_PREV
`define CMD_SHRD #AUTOGEN_NEXT_CMD
`define CMDEX_SHxD_implicit 4'd0
`define CMDEX_SHxD_modregrm_imm 4'd1
</defines>
<decode>
(dec_ready_2byte_modregrm && decoder[7:0] == 8'hA5) || (dec_ready_2byte_modregrm_imm && decoder[7:0] == 8'hA4)
`CMD_SHLD
IF(decoder[0]); SET(dec_cmdex, `CMDEX_SHxD_implicit); ELSE(); SET(dec_cmdex, `CMDEX_SHxD_modregrm_imm); ENDIF();
IF(decoder[0] == 1'b0); SET(consume_modregrm_imm); ELSE(); SET(consume_modregrm_one); ENDIF();
</decode>
<decode>
(dec_ready_2byte_modregrm && decoder[7:0] == 8'hAD) || (dec_ready_2byte_modregrm_imm && decoder[7:0] == 8'hAC)
`CMD_SHRD
IF(decoder[0]); SET(dec_cmdex, `CMDEX_SHxD_implicit); ELSE(); SET(dec_cmdex, `CMDEX_SHxD_modregrm_imm); ENDIF();
IF(decoder[0] == 1'b0); SET(consume_modregrm_imm); ELSE(); SET(consume_modregrm_one); ENDIF();
</decode>
<read>
IF({ rd_cmd[6:1], 1'd0 } == `CMD_SHxD && rd_cmdex != `CMDEX_SHxD_implicit);
SET(rd_src_is_reg);
SET(rd_req_eflags);
// dst: reg, src: imm
IF(rd_modregrm_mod == 2'b11);
SET(rd_dst_is_rm);
SET(rd_req_rm);
IF(rd_mutex_busy_modregrm_rm || rd_mutex_busy_modregrm_reg); SET(rd_waiting); ENDIF();
ENDIF();
// dst: memory, src: imm or 1
IF(rd_modregrm_mod != 2'b11);
SET(rd_dst_is_memory);
SET(rd_req_memory);
IF(rd_mutex_busy_memory || rd_mutex_busy_modregrm_reg); SET(rd_waiting);
ELSE();
SET(read_rmw_virtual);
IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
ENDIF();
ENDIF();
ENDIF();
</read>
<read>
IF({ rd_cmd[6:1], 1'd0 } == `CMD_SHxD && rd_cmdex == `CMDEX_SHxD_implicit);
SET(rd_src_is_reg);
SET(rd_req_eflags);
// dst: reg, src: CL
IF(rd_modregrm_mod == 2'b11);
SET(rd_dst_is_rm);
SET(rd_req_rm);
IF(rd_mutex_busy_modregrm_rm || rd_mutex_busy_ecx || rd_mutex_busy_modregrm_reg); SET(rd_waiting); ENDIF();
ENDIF();
// dst: memory, src: imm or 1
IF(rd_modregrm_mod != 2'b11);
SET(rd_dst_is_memory);
SET(rd_req_memory);
IF(rd_mutex_busy_memory || rd_mutex_busy_ecx || rd_mutex_busy_modregrm_reg); SET(rd_waiting);
ELSE();
SET(read_rmw_virtual);
IF(~(read_for_rd_ready)); SET(rd_waiting); ENDIF();
ENDIF();
ENDIF();
ENDIF();
</read>
<execute>
IF({ exe_cmd[6:1], 1'd0 } == `CMD_SHxD);
SET(exe_result, e_shift_result);
SET(exe_result_signals, { e_shift_no_write, e_shift_oszapc_update, e_shift_cf_of_update, e_shift_oflag, e_shift_cflag });
ENDIF();
</execute>
<write>
IF({ wr_cmd[6:1], 1'd0 } == `CMD_SHxD);
// result_signals
// { e_shift_no_write, e_shift_oszapc_update, e_shift_cf_of_update, e_shift_oflag, e_shift_cflag }
IF(~(result_signals[4])); //e_shift_no_write
IF(wr_dst_is_memory && ~(write_for_wr_ready)); SET(wr_waiting); ENDIF();
SET(write_regrm, wr_dst_is_rm);
SET(write_rmw_virtual, wr_dst_is_memory);
ENDIF();
IF(result_signals[3]); //e_shift_oszapc_update
SAVE(zflag, zflag_result);
SAVE(sflag, sflag_result);
SAVE(pflag, pflag_result);
SAVE(aflag, aflag_arith);
ENDIF();
IF(result_signals[2]); //e_shift_cf_of_update
SAVE(cflag, result_signals[0]);
SAVE(oflag, result_signals[1]);
ENDIF();
ENDIF();
</write>