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<h1>memory_registers Member List</h1> </div>
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This is the complete list of members for <a class="el" href="classmemory__registers.html">memory_registers</a>, including all inherited members.<table>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a06690d046213efc68334643946af2b16">clock</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a52bffc13966ddfc557c3c3a2cece1d97">reset_n</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a8a67810353708d3652f619623692a545">An_address</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a8e3deabb065d3e6aaaf647a83e7c84e9">An_input</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#af97dfc643a2fa9ae191cb68acb23ea91">An_write_enable</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a806c8f12e4600aa02e87d61e072eb6e4">An_output</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Output]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a736b71ba5d8851ef8e883408751c9380">usp</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Output]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a3faa61795c758b3d444c082be9ac5758">Dn_address</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a87f20385b6a12cc8249588a492930b31">Dn_input</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a04d4474459a5b178f532443990dc10ed">Dn_write_enable</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#aa007104c0e9ef230ac07ad5b242ca8b5">Dn_size</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a2c906a8760a85b5370b8c7f56dc4e6f3">Dn_output</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Output]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#ac8716768ab1d64ea847be358444da7ee">micro_pc</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#ad13be4dbb1d8afc5ea1f9b5e8bb80e3c">micro_data</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Output]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a2d55f5fd1b27c45d04af9b19559c2ae9">An_ram_write_enable</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Signal]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a49af6a7e50d837d339f79765aa2b9ee7">An_ram_output</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Signal]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a6d1775137e4a2f6a96e0cf49b76dc524">dn_byteena</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Signal]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Module Instance]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a5b0f1fb5a259a06899ac6ac3b52835e0">altsyncram</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Module Instance]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#afc54073a43b749eb1f1376c4b31cd1e3">altsyncram</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Module Instance]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a09281e3224878c570c81844785844fe0">ALWAYS_29</a>clock, reset_n</td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Always Construct]</code></td></tr>
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