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<h1>memory_registers Member List</h1> </div>
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This is the complete list of members for <a class="el" href="classmemory__registers.html">memory_registers</a>, including all inherited members.<table>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a4d664c63ba14fa2b1664eb44203191fa">clock</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a431adf2f23f5aaf563824a502920385e">reset_n</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a8d14d4f6f8c5706382c7f69b9e372660">An_address</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#ada61c344785639f1dff0853342ffc0e2">An_input</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a388c5aa2ed803d7f8fe0de1afc4ce0b3">An_write_enable</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#ad83e80e6d6181078383f523cd155b88d">An_output</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Output]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#aa2114065af0aee3f968f55ab8d0cdd32">usp</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Output]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a452091de9055b5a8c4b3a24f832bbff4">Dn_address</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a648512e0b41016edfe8de5136ddd1c06">Dn_input</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#afca18b6c4dc049b6c423a8bec09d6d76">Dn_write_enable</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a71a1a19e94fca451263e5f59daf32bbc">Dn_size</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a992b24ce3987b39fc0bd77a602b8501c">Dn_output</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Output]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a9d473ab60fc9c54280c725306fd4a60e">micro_pc</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Input]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a6b80d6fab3ba246fa01c780bd1754229">micro_data</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Output]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a6b262496d8e72511014d422843dc16cb">An_ram_write_enable</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Signal]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a3d04ddf3e78cabbf0585da3688abb8b1">An_ram_output</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Signal]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#af880499b12dc0f4afad0fdf7500bc3bf">dn_byteena</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Signal]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Module Instance]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a5b0f1fb5a259a06899ac6ac3b52835e0">altsyncram</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Module Instance]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#afc54073a43b749eb1f1376c4b31cd1e3">altsyncram</a></td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Module Instance]</code></td></tr>
<tr class="memlist"><td><a class="el" href="classmemory__registers.html#a833db0d5eda614d712b846b259c0f4d3">ALWAYS_30</a>clock, reset_n</td><td><a class="el" href="classmemory__registers.html">memory_registers</a></td><td><code> [Always Construct]</code></td></tr>
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