OpenCores
URL https://opencores.org/ocsvn/aoocs/aoocs/trunk

Subversion Repositories aoocs

[/] [aoocs/] [trunk/] [doc/] [doxygen/] [html/] [classbus__ssram-members.html] - Rev 2

Compare with Previous | Blame | View Log

<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<title>aoOCS: Member List</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<link href="doxygen.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<!-- Generated by Doxygen 1.7.2 -->
<div class="navigation" id="top">
  <div class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
      <li class="current"><a href="annotated.html"><span>Design&#160;Unit&#160;List</span></a></li>
      <li><a href="files.html"><span>Files</span></a></li>
    </ul>
  </div>
  <div class="tabs2">
    <ul class="tablist">
      <li><a href="annotated.html"><span>Class&#160;List</span></a></li>
      <li><a href="hierarchy.html"><span>Design&#160;Unit&#160;Hierarchy</span></a></li>
      <li><a href="functions.html"><span>Design&#160;Unit&#160;Members</span></a></li>
    </ul>
  </div>
</div>
<div class="header">
  <div class="headertitle">
<h1>bus_ssram Member List</h1>  </div>
</div>
<div class="contents">
This is the complete list of members for <a class="el" href="classbus__ssram.html">bus_ssram</a>, including all inherited members.<table>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#adf48cd47cdb3d0ab37c4f679d47b3ece">clk_30</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#af7d17848e6f2da5ae9db4a6072dfb9a9">reset_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a56b6627a4fb74424900848ab0d094141">ADR_I</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a8ec0e74cb4fdeeff97eb86626b94e3af">CYC_I</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a88849a8c056fffdad33d71b2abaa0f03">WE_I</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ae4f1b8a90123ceac3fded15df24e3bd3">SEL_I</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#adae0a05e495069a4351965372c3634c8">STB_I</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ad83abd19cd21950a7e5abcd0068463a5">DAT_I</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a78163aefbe6bb0d6f809c7e01b93967b">DAT_O</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#af87a2d46e88cd2ccf90487f261366aba">ACK_O</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ad29520a0905218b5c01253c99b6791a3">burst_read_vga_request</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ae9ae32b3d42fa1482fa788059b4b65df">burst_read_vga_address</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ae9dc8c4cc4309b39f5d1aebaeded912a">burst_read_vga_ready</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a2cc4e33e7bd7ee3d0ad1ac0a743bead3">burst_read_video_request</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ab4c5fe3d23c0df0ab43247a1639d8fef">burst_read_video_address</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a838aea80fed0e9a079d844ffd8ce3d12">burst_read_video_ready</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ae09f95f879e5dbaeaf569cd7b7949acd">burst_read_data</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a41716375d8a472181176cfe136044168">burst_write_request</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a2c671a3dc4da1d00f8a48ae8ed545934">burst_write_address</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a871283df0cea2c85cbe78c9a3f0b0e7f">burst_write_ready</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a6a47c16f84aa2e8aafcf02afbc52b57b">burst_write_data</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Input]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a28c27b19916c54b3e868369aac6f6b9a">ssram_address</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ac105e20d6da178b2822b3e87238ae6dc">ssram_oe_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a99f42b3013302ad54129da325e2c0410">ssram_writeen_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a66f9e3c03173432f2950e141e42e47ee">ssram_byteen_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a1e624978ad4e4f2149e7980d65b0612d">ssram_adsp_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a6e1a75c4a8c1c0a94bd2ec20430a56d3">ssram_clk</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a71ea972c05cab98195ec72ed2bce3b7f">ssram_globalw_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#acea0b5e48c266c75112e372048947204">ssram_advance_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a21d0bd68b7b790eb45a03c6992c92a9f">ssram_adsc_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a908103f5f1aafa62a9fdcebc83094ebc">ssram_ce1_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#abc78633b174512e8f12168c05d6484b4">ssram_ce2</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a926a811b6e4121644e869fe13899b4c5">ssram_ce3_n</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Output]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ad69f5f977e8c5fb7875d1a69fee22d72">ssram_data</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Inout]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#af1d128d90eced18c7e7f2789ac9046a9">ssram_data_oe</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Signal]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a3493866f2c0fa328bc914ee77192bf2e">ssram_data_reg</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Signal]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a535aefa25808f58b42ac5a1654d56610">burst_address</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Signal]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a63750a3306096cd8e7076802d4eb57dd">burst_read_select</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Signal]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a129b5bd32f618b59b3e59264de9726e5">burst_read_ready</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Signal]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ac5e689c9e42fe9b1335117fd5df37775">burst_read_low_address</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Signal]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a4bb8b3742d85ee88a72833d1facf6d4f">burst_read_one_loop</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Signal]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a4ec3a06c44c4a4bd8f83b27bce22cc6a">burst_read_request</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Signal]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a07ff3477e013ed4dfa2439589c118202">state</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Signal]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a858c46d836e9106fd17cfcae0529039e">S_IDLE</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ae3aad805c7623cf48b1dc1b34dd51dbd">S_VW0</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ade6dc31a79364db517a437bd49aca37a">S_VW1</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#aae5c7e4b75f892c0a2ef5ef414122afd">S_VW2</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a0f8b50cc59bc0120ac7813e85d4d0ca0">S_VW3</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a11872fcb25d808ba613e41904ff6e066">S_VW4</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a28d6f7425ce6a8a65e69440ea64a4c29">S_VR1</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#affffa409ed1f21ffe63f23c683eba531">S_VR2</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a087aee8fa77cb6c2f662118321e09871">S_VR3</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a007e4900fdab9ae822d87670bdebfb0a">S_VR4</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a90be4e0d49e4873179cfef106dfca57b">S_R1</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#ae6ed87aa25e02712ed883f69c55a5c08">S_R2</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#aa5e59d0bad76d805d61cfcd307af35f8">S_R3</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a70126e90d300698baa7aac32dbb7bdc0">S_PRE_IDLE</a></td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Parameter]</code></td></tr>
  <tr class="memlist"><td><a class="el" href="classbus__ssram.html#a6f9c73deb7569c415de5ce9593a44a79">ALWAYS_61</a>clk_30, reset_n</td><td><a class="el" href="classbus__ssram.html">bus_ssram</a></td><td><code> [Always Construct]</code></td></tr>
</table></div>
<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:20 for aoOCS by&#160;
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
</body>
</html>
 

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.