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<h1>control_osd Module Reference</h1> </div>
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<p><p>On-Screen-Display and overall system management. </p>
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<p><a href="classcontrol__osd-members.html">List of all members.</a></p>
<table class="memberdecls">
<tr><td colspan="2"><h2><a name="Always Constructs"></a>
Always Constructs</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a51312022ad3e3d47d4febf6c4d57397f">ALWAYS_36</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classcontrol__osd.html#a6196377a3ab5559a513854cf1c3497b1">CLK_I</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classcontrol__osd.html#ae2085dff5bb31a3a9900c6835b2910b6">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
<tr><td colspan="2"><h2><a name="Inputs"></a>
Inputs</h2></td></tr>
<tr><td colspan="2"><div class="groupHeader">Clock and reset</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a6196377a3ab5559a513854cf1c3497b1">CLK_I</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ae2085dff5bb31a3a9900c6835b2910b6">reset_n</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><div class="groupHeader">WISHBONE master</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a707c517dd2008bcd9a9b9be97c940a9d">master_DAT_I</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ad11d60e20f113040178c94dcea38789c">ACK_I</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><div class="groupHeader">WISHBONE slave</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a56bc5b958a26c2c44973bd0ccaea78e6">ADR_I</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a0dfc269f92968a047cbffc059139de0a">CYC_I</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ac824a485e6b902923401ab73c7f03841">WE_I</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a13f03a265712c279b320063a9e70bf4c">STB_I</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a3f273553f9b5411f23b32b87bdf44e05">SEL_I</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a0f8f6133735ab74bebd3fa658840dd5b">slave_DAT_I</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td colspan="2"><div class="groupHeader">On-Screen-Display management interface</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a630825280ca4da6c00f576507ad14bee">request_osd</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ae8b5fe5aa092efbbfac575c43d80c928">osd_line</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ae5ebacc470598b8ba116db8eda10fddd">osd_column</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a3f1812f10b7c24cabb4180272ae408ab">keyboard_select</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a30d42e8e9807db20a9955dcc733278e6">keyboard_up</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a4cc4f2acf479b53f39e86fd22e1e0fbd">keyboard_down</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><div class="groupHeader">On-Screen-Display floppy management interface</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a8d108655097a93e09690cd77d840fca4">floppy_error</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><h2><a name="Outputs"></a>
Outputs</h2></td></tr>
<tr><td colspan="2"><div class="groupHeader">Clock and reset</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a8223f70b4b426d3e77f515261e41ab8a">reset_request</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a6ce16bde3a7e3ca98e9f6f52f1d54b01">management_mode</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td colspan="2"><div class="groupHeader">WISHBONE master</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a4217691e3bbe7442766824a66c9c6061">CYC_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a9729f8e99e6215f16d487c9edc3bf8b5">STB_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ac02fbf6de142f70d423487e5eebbf41e">WE_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a4f40e02634efce8e877f05af30970b5a">ADR_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a24402c2d7a2fc1858fe167338cc9acfe">SEL_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ad3aa3632307fea5a411e849d00b16b6c">master_DAT_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td colspan="2"><div class="groupHeader">WISHBONE slave</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a9d424067b4ef414ecd8af6b01181d6de">slave_DAT_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#af54eb8eee839999c0d1ec81f4ee83f05">ACK_O</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a7f8c8eee4fb11fb7be802f5ddd0bb23a">RTY_O</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a11c3ffc3667be7727fd18c8cd214f446">ERR_O</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><div class="groupHeader">On-Screen-Display management interface</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a118dcc09c5966614c035a6fb16e232d8">on_screen_display</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a47650aa230d01c3de6c7ff983c26f563">character</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#aedcadd537ead33021c07902d18675670">joystick_enable</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td colspan="2"><div class="groupHeader">On-Screen-Display floppy management interface</div></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#adf38e4a4a873d67cdd788060a408493f">floppy_inserted</a>  </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a184b1277f2f2aaa469a1e45f183bf0b5">floppy_sector</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a1599e7ad96018cb8119f148f15f41e33">floppy_write_enabled</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> </td></tr>
<tr><td colspan="2"><h2><a name="Parameters"></a>
Parameters</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a68452c642ded0928e1066ce36355cce6">S_SD_CHECK_INIT</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd0</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ac89da3651617178f73dc266c04cfe961">S_SD_ERROR</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">4'd1</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a9703e01c4d6ed52e7ade167591a8e0aa">S_READ_INTRO</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">4'd2</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ab970a1e9b2c49dc913acce5c19eaf35b">S_READ_INTRO_WAIT</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">4'd3</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a16c08146ee965b70f1bed7159d3ea03b">S_READ_HEADER</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">4'd4</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#ac9549cc9fb4eece3f79c77944c37e938">S_READ_HEADER_WAIT</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">4'd5</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a0dff34146b98847c6f0e497e8a896d60">S_SELECT_ROM</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">4'd6</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a1bd013f7937fd22f51d13505d6973260">S_COPY_ROM</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">4'd7</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a4f25c53f35d7e5deef6a1895ee61fc01">S_RUNNING</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">4'd8</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classcontrol__osd.html#a95fed56ef6e96e6f9f32ddc7d5c536bb">S_ON_SCREEN_DISPLAY</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdldigit">4'd9</span><span class="vhdlchar"> </span></b></td></tr>
<tr><td colspan="2"><h2><a name="Module Instances"></a>
Module Instances</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classcontrol__osd.html#a78d1a7d8f835fc539c7891680342c962">altsyncram::display_ram_inst</a> </b> </td><td class="memItemRight" valign="bottom"></td></tr>
<tr><td colspan="2"><h2><a name="Signals"></a>
Signals</h2></td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#ac91d851e4665fdea7402fb9d4f5eab33">char</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a97e6cd0c742309422092a0f0d423c924">display_q</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a2cfa2074ced6af38b56ca2228b433a1a">final_char</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a11dbc96f56067e875dcb44927dfcc10f">pointer</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#ae5f31d2e616c0e1c35a0658a7ab32529">selected_floppy_pointer</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a5f8c80324e4819532079fe69ba4ec7b7">value_a</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#af65347dfddd6e44e81f3cf90ec9e8272">value_b</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#aeda541622c7c8f2260aa315647b95a5a">value_counter</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#aa0a936aa1855900564c1b2ee7afc90ff">last_osd_column</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#acf827f8c96b7f380c7e206e0acea7d90">last_keyboard_up</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a5c8253fd8c2a8af87cf2f934901cfbcd">last_keyboard_down</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a575867013a3e21f25b0474e77038da8a">last_keyboard_select</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a89fd67f1b7e8dbdf703c0834a6478f6a">last_request_osd</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">22</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#ae06410c715ba2a8e8f68f72dc7ab7ac5">keyboard_counter</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a894a5810810119333b0eabcaa639edde">keyboard_repeating</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a5095fdef3b874b500ff5283c5b5affe8">keyboard_repeat</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">12</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a38a43a0a1f75c353e09c64016295c584">current_addr</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">12</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#aafca92500170023ab7131e886a5f726e">selected_floppy_addr</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">11</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#ac03af5be4e21a2e147581ea0aaffa7ae">char_addr</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#a501cecb223ff8ac6940e3885dc86bd9f">state</a> </td></tr>
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classcontrol__osd.html#aab6f880274ec3ca14f88705143726620">substate</a> </td></tr>
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<hr/><a name="_details"></a><h2>Detailed Description</h2>
<p>On-Screen-Display and overall system management. </p>
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00031">31</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
<hr/><h2>Member Function Documentation</h2>
<a class="anchor" id="a51312022ad3e3d47d4febf6c4d57397f"></a><!-- doxytag: member="control_osd::ALWAYS_36" ref="a51312022ad3e3d47d4febf6c4d57397f" args="CLK_I, reset_n" -->
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<td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_36 <td></td>
<td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classcontrol__osd.html#a6196377a3ab5559a513854cf1c3497b1">CLK_I</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td>
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<td class="paramkey"></td>
<td></td>
<td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classcontrol__osd.html#ae2085dff5bb31a3a9900c6835b2910b6">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td>
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<code> [Always Construct]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00215">215</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<hr/><h2>Member Data Documentation</h2>
<a class="anchor" id="a6196377a3ab5559a513854cf1c3497b1"></a><!-- doxytag: member="control_osd::CLK_I" ref="a6196377a3ab5559a513854cf1c3497b1" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a6196377a3ab5559a513854cf1c3497b1">CLK_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00034">34</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="ae2085dff5bb31a3a9900c6835b2910b6"></a><!-- doxytag: member="control_osd::reset_n" ref="ae2085dff5bb31a3a9900c6835b2910b6" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ae2085dff5bb31a3a9900c6835b2910b6">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00035">35</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a8223f70b4b426d3e77f515261e41ab8a"></a><!-- doxytag: member="control_osd::reset_request" ref="a8223f70b4b426d3e77f515261e41ab8a" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a8223f70b4b426d3e77f515261e41ab8a">reset_request</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00036">36</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a6ce16bde3a7e3ca98e9f6f52f1d54b01"></a><!-- doxytag: member="control_osd::management_mode" ref="a6ce16bde3a7e3ca98e9f6f52f1d54b01" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a6ce16bde3a7e3ca98e9f6f52f1d54b01">management_mode</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00037">37</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a4217691e3bbe7442766824a66c9c6061"></a><!-- doxytag: member="control_osd::CYC_O" ref="a4217691e3bbe7442766824a66c9c6061" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a4217691e3bbe7442766824a66c9c6061">CYC_O</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00042">42</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a9729f8e99e6215f16d487c9edc3bf8b5"></a><!-- doxytag: member="control_osd::STB_O" ref="a9729f8e99e6215f16d487c9edc3bf8b5" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a9729f8e99e6215f16d487c9edc3bf8b5">STB_O</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00043">43</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="ac02fbf6de142f70d423487e5eebbf41e"></a><!-- doxytag: member="control_osd::WE_O" ref="ac02fbf6de142f70d423487e5eebbf41e" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ac02fbf6de142f70d423487e5eebbf41e">WE_O</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00044">44</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a4f40e02634efce8e877f05af30970b5a"></a><!-- doxytag: member="control_osd::ADR_O" ref="a4f40e02634efce8e877f05af30970b5a" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a4f40e02634efce8e877f05af30970b5a">ADR_O</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00045">45</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a24402c2d7a2fc1858fe167338cc9acfe"></a><!-- doxytag: member="control_osd::SEL_O" ref="a24402c2d7a2fc1858fe167338cc9acfe" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a24402c2d7a2fc1858fe167338cc9acfe">SEL_O</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00046">46</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="ad3aa3632307fea5a411e849d00b16b6c"></a><!-- doxytag: member="control_osd::master_DAT_O" ref="ad3aa3632307fea5a411e849d00b16b6c" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ad3aa3632307fea5a411e849d00b16b6c">master_DAT_O</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00047">47</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a707c517dd2008bcd9a9b9be97c940a9d"></a><!-- doxytag: member="control_osd::master_DAT_I" ref="a707c517dd2008bcd9a9b9be97c940a9d" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a707c517dd2008bcd9a9b9be97c940a9d">master_DAT_I</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00048">48</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="ad11d60e20f113040178c94dcea38789c"></a><!-- doxytag: member="control_osd::ACK_I" ref="ad11d60e20f113040178c94dcea38789c" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ad11d60e20f113040178c94dcea38789c">ACK_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00049">49</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a56bc5b958a26c2c44973bd0ccaea78e6"></a><!-- doxytag: member="control_osd::ADR_I" ref="a56bc5b958a26c2c44973bd0ccaea78e6" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a56bc5b958a26c2c44973bd0ccaea78e6">ADR_I</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00054">54</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a0dfc269f92968a047cbffc059139de0a"></a><!-- doxytag: member="control_osd::CYC_I" ref="a0dfc269f92968a047cbffc059139de0a" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a0dfc269f92968a047cbffc059139de0a">CYC_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00055">55</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="ac824a485e6b902923401ab73c7f03841"></a><!-- doxytag: member="control_osd::WE_I" ref="ac824a485e6b902923401ab73c7f03841" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ac824a485e6b902923401ab73c7f03841">WE_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00056">56</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a13f03a265712c279b320063a9e70bf4c">STB_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00057">57</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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</div>
<a class="anchor" id="a3f273553f9b5411f23b32b87bdf44e05"></a><!-- doxytag: member="control_osd::SEL_I" ref="a3f273553f9b5411f23b32b87bdf44e05" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a3f273553f9b5411f23b32b87bdf44e05">SEL_I</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00058">58</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a0f8f6133735ab74bebd3fa658840dd5b"></a><!-- doxytag: member="control_osd::slave_DAT_I" ref="a0f8f6133735ab74bebd3fa658840dd5b" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a0f8f6133735ab74bebd3fa658840dd5b">slave_DAT_I</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00059">59</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a9d424067b4ef414ecd8af6b01181d6de"></a><!-- doxytag: member="control_osd::slave_DAT_O" ref="a9d424067b4ef414ecd8af6b01181d6de" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a9d424067b4ef414ecd8af6b01181d6de">slave_DAT_O</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00060">60</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="af54eb8eee839999c0d1ec81f4ee83f05"></a><!-- doxytag: member="control_osd::ACK_O" ref="af54eb8eee839999c0d1ec81f4ee83f05" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#af54eb8eee839999c0d1ec81f4ee83f05">ACK_O</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00061">61</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a7f8c8eee4fb11fb7be802f5ddd0bb23a"></a><!-- doxytag: member="control_osd::RTY_O" ref="a7f8c8eee4fb11fb7be802f5ddd0bb23a" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a7f8c8eee4fb11fb7be802f5ddd0bb23a">RTY_O</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00062">62</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a11c3ffc3667be7727fd18c8cd214f446"></a><!-- doxytag: member="control_osd::ERR_O" ref="a11c3ffc3667be7727fd18c8cd214f446" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a11c3ffc3667be7727fd18c8cd214f446">ERR_O</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00063">63</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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</div>
<a class="anchor" id="a630825280ca4da6c00f576507ad14bee"></a><!-- doxytag: member="control_osd::request_osd" ref="a630825280ca4da6c00f576507ad14bee" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a630825280ca4da6c00f576507ad14bee">request_osd</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00068">68</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a118dcc09c5966614c035a6fb16e232d8"></a><!-- doxytag: member="control_osd::on_screen_display" ref="a118dcc09c5966614c035a6fb16e232d8" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a118dcc09c5966614c035a6fb16e232d8">on_screen_display</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00069">69</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="ae8b5fe5aa092efbbfac575c43d80c928"></a><!-- doxytag: member="control_osd::osd_line" ref="ae8b5fe5aa092efbbfac575c43d80c928" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ae8b5fe5aa092efbbfac575c43d80c928">osd_line</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00071">71</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="ae5ebacc470598b8ba116db8eda10fddd"></a><!-- doxytag: member="control_osd::osd_column" ref="ae5ebacc470598b8ba116db8eda10fddd" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ae5ebacc470598b8ba116db8eda10fddd">osd_column</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">4</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00072">72</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a47650aa230d01c3de6c7ff983c26f563"></a><!-- doxytag: member="control_osd::character" ref="a47650aa230d01c3de6c7ff983c26f563" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a47650aa230d01c3de6c7ff983c26f563">character</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00073">73</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="aedcadd537ead33021c07902d18675670"></a><!-- doxytag: member="control_osd::joystick_enable" ref="aedcadd537ead33021c07902d18675670" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#aedcadd537ead33021c07902d18675670">joystick_enable</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00075">75</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a3f1812f10b7c24cabb4180272ae408ab"></a><!-- doxytag: member="control_osd::keyboard_select" ref="a3f1812f10b7c24cabb4180272ae408ab" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a3f1812f10b7c24cabb4180272ae408ab">keyboard_select</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00076">76</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a30d42e8e9807db20a9955dcc733278e6"></a><!-- doxytag: member="control_osd::keyboard_up" ref="a30d42e8e9807db20a9955dcc733278e6" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a30d42e8e9807db20a9955dcc733278e6">keyboard_up</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00077">77</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a4cc4f2acf479b53f39e86fd22e1e0fbd"></a><!-- doxytag: member="control_osd::keyboard_down" ref="a4cc4f2acf479b53f39e86fd22e1e0fbd" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a4cc4f2acf479b53f39e86fd22e1e0fbd">keyboard_down</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00078">78</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="adf38e4a4a873d67cdd788060a408493f"></a><!-- doxytag: member="control_osd::floppy_inserted" ref="adf38e4a4a873d67cdd788060a408493f" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#adf38e4a4a873d67cdd788060a408493f">floppy_inserted</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00083">83</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a184b1277f2f2aaa469a1e45f183bf0b5"></a><!-- doxytag: member="control_osd::floppy_sector" ref="a184b1277f2f2aaa469a1e45f183bf0b5" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a184b1277f2f2aaa469a1e45f183bf0b5">floppy_sector</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00084">84</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a1599e7ad96018cb8119f148f15f41e33"></a><!-- doxytag: member="control_osd::floppy_write_enabled" ref="a1599e7ad96018cb8119f148f15f41e33" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a1599e7ad96018cb8119f148f15f41e33">floppy_write_enabled</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00085">85</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a8d108655097a93e09690cd77d840fca4"></a><!-- doxytag: member="control_osd::floppy_error" ref="a8d108655097a93e09690cd77d840fca4" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a8d108655097a93e09690cd77d840fca4">floppy_error</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00086">86</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="ac91d851e4665fdea7402fb9d4f5eab33"></a><!-- doxytag: member="control_osd::char" ref="ac91d851e4665fdea7402fb9d4f5eab33" args="wire[31:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ac91d851e4665fdea7402fb9d4f5eab33">char</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00095">95</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a97e6cd0c742309422092a0f0d423c924"></a><!-- doxytag: member="control_osd::display_q" ref="a97e6cd0c742309422092a0f0d423c924" args="wire[31:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a97e6cd0c742309422092a0f0d423c924">display_q</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00096">96</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a78d1a7d8f835fc539c7891680342c962"></a><!-- doxytag: member="control_osd::altsyncram" ref="a78d1a7d8f835fc539c7891680342c962" args="" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a78d1a7d8f835fc539c7891680342c962">altsyncram</a></span> <b><span class="vhdlchar">display_ram_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00099">99</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a2cfa2074ced6af38b56ca2228b433a1a"></a><!-- doxytag: member="control_osd::final_char" ref="a2cfa2074ced6af38b56ca2228b433a1a" args="wire[7:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a2cfa2074ced6af38b56ca2228b433a1a">final_char</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[7:0]]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00118">118</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="a11dbc96f56067e875dcb44927dfcc10f"></a><!-- doxytag: member="control_osd::pointer" ref="a11dbc96f56067e875dcb44927dfcc10f" args="reg[7:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a11dbc96f56067e875dcb44927dfcc10f">pointer</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[7:0]]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00128">128</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="ae5f31d2e616c0e1c35a0658a7ab32529"></a><!-- doxytag: member="control_osd::selected_floppy_pointer" ref="ae5f31d2e616c0e1c35a0658a7ab32529" args="reg[7:0]" -->
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<table class="memname">
<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ae5f31d2e616c0e1c35a0658a7ab32529">selected_floppy_pointer</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[7:0]]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00129">129</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a5f8c80324e4819532079fe69ba4ec7b7"></a><!-- doxytag: member="control_osd::value_a" ref="a5f8c80324e4819532079fe69ba4ec7b7" args="reg[31:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a5f8c80324e4819532079fe69ba4ec7b7">value_a</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[31:0]]</code></td>
</tr>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00131">131</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="af65347dfddd6e44e81f3cf90ec9e8272"></a><!-- doxytag: member="control_osd::value_b" ref="af65347dfddd6e44e81f3cf90ec9e8272" args="reg[31:0]" -->
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<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#af65347dfddd6e44e81f3cf90ec9e8272">value_b</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[31:0]]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00132">132</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="aeda541622c7c8f2260aa315647b95a5a"></a><!-- doxytag: member="control_osd::value_counter" ref="aeda541622c7c8f2260aa315647b95a5a" args="reg[1:0]" -->
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<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#aeda541622c7c8f2260aa315647b95a5a">value_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[1:0]]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00134">134</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="aa0a936aa1855900564c1b2ee7afc90ff"></a><!-- doxytag: member="control_osd::last_osd_column" ref="aa0a936aa1855900564c1b2ee7afc90ff" args="reg[4:0]" -->
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<table class="memname">
<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#aa0a936aa1855900564c1b2ee7afc90ff">last_osd_column</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[4:0]]</code></td>
</tr>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00135">135</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="acf827f8c96b7f380c7e206e0acea7d90"></a><!-- doxytag: member="control_osd::last_keyboard_up" ref="acf827f8c96b7f380c7e206e0acea7d90" args="reg" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#acf827f8c96b7f380c7e206e0acea7d90">last_keyboard_up</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00137">137</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a5c8253fd8c2a8af87cf2f934901cfbcd"></a><!-- doxytag: member="control_osd::last_keyboard_down" ref="a5c8253fd8c2a8af87cf2f934901cfbcd" args="reg" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a5c8253fd8c2a8af87cf2f934901cfbcd">last_keyboard_down</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
</tr>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00138">138</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a575867013a3e21f25b0474e77038da8a"></a><!-- doxytag: member="control_osd::last_keyboard_select" ref="a575867013a3e21f25b0474e77038da8a" args="reg" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a575867013a3e21f25b0474e77038da8a">last_keyboard_select</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00139">139</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a89fd67f1b7e8dbdf703c0834a6478f6a"></a><!-- doxytag: member="control_osd::last_request_osd" ref="a89fd67f1b7e8dbdf703c0834a6478f6a" args="reg" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a89fd67f1b7e8dbdf703c0834a6478f6a">last_request_osd</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00140">140</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="ae06410c715ba2a8e8f68f72dc7ab7ac5"></a><!-- doxytag: member="control_osd::keyboard_counter" ref="ae06410c715ba2a8e8f68f72dc7ab7ac5" args="reg[22:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ae06410c715ba2a8e8f68f72dc7ab7ac5">keyboard_counter</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[22:0]]</code></td>
</tr>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00142">142</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a894a5810810119333b0eabcaa639edde"></a><!-- doxytag: member="control_osd::keyboard_repeating" ref="a894a5810810119333b0eabcaa639edde" args="reg" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a894a5810810119333b0eabcaa639edde">keyboard_repeating</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00143">143</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a5095fdef3b874b500ff5283c5b5affe8"></a><!-- doxytag: member="control_osd::keyboard_repeat" ref="a5095fdef3b874b500ff5283c5b5affe8" args="wire" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a5095fdef3b874b500ff5283c5b5affe8">keyboard_repeat</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00144">144</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a38a43a0a1f75c353e09c64016295c584"></a><!-- doxytag: member="control_osd::current_addr" ref="a38a43a0a1f75c353e09c64016295c584" args="wire[12:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a38a43a0a1f75c353e09c64016295c584">current_addr</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[12:0]]</code></td>
</tr>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00147">147</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="aafca92500170023ab7131e886a5f726e"></a><!-- doxytag: member="control_osd::selected_floppy_addr" ref="aafca92500170023ab7131e886a5f726e" args="wire[12:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#aafca92500170023ab7131e886a5f726e">selected_floppy_addr</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[12:0]]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00149">149</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="ac03af5be4e21a2e147581ea0aaffa7ae"></a><!-- doxytag: member="control_osd::char_addr" ref="ac03af5be4e21a2e147581ea0aaffa7ae" args="wire[11:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ac03af5be4e21a2e147581ea0aaffa7ae">char_addr</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[11:0]]</code></td>
</tr>
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</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00152">152</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a501cecb223ff8ac6940e3885dc86bd9f"></a><!-- doxytag: member="control_osd::state" ref="a501cecb223ff8ac6940e3885dc86bd9f" args="reg[3:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a501cecb223ff8ac6940e3885dc86bd9f">state</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[3:0]]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00200">200</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a68452c642ded0928e1066ce36355cce6"></a><!-- doxytag: member="control_osd::S_SD_CHECK_INIT" ref="a68452c642ded0928e1066ce36355cce6" args="4'd0" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a68452c642ded0928e1066ce36355cce6">S_SD_CHECK_INIT</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd0</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="ac89da3651617178f73dc266c04cfe961"></a><!-- doxytag: member="control_osd::S_SD_ERROR" ref="ac89da3651617178f73dc266c04cfe961" args="4'd1" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ac89da3651617178f73dc266c04cfe961">S_SD_ERROR</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd1</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
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<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a9703e01c4d6ed52e7ade167591a8e0aa"></a><!-- doxytag: member="control_osd::S_READ_INTRO" ref="a9703e01c4d6ed52e7ade167591a8e0aa" args="4'd2" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a9703e01c4d6ed52e7ade167591a8e0aa">S_READ_INTRO</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd2</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
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</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="ab970a1e9b2c49dc913acce5c19eaf35b"></a><!-- doxytag: member="control_osd::S_READ_INTRO_WAIT" ref="ab970a1e9b2c49dc913acce5c19eaf35b" args="4'd3" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ab970a1e9b2c49dc913acce5c19eaf35b">S_READ_INTRO_WAIT</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd3</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
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</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a16c08146ee965b70f1bed7159d3ea03b"></a><!-- doxytag: member="control_osd::S_READ_HEADER" ref="a16c08146ee965b70f1bed7159d3ea03b" args="4'd4" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a16c08146ee965b70f1bed7159d3ea03b">S_READ_HEADER</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd4</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="ac9549cc9fb4eece3f79c77944c37e938"></a><!-- doxytag: member="control_osd::S_READ_HEADER_WAIT" ref="ac9549cc9fb4eece3f79c77944c37e938" args="4'd5" -->
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#ac9549cc9fb4eece3f79c77944c37e938">S_READ_HEADER_WAIT</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd5</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a0dff34146b98847c6f0e497e8a896d60"></a><!-- doxytag: member="control_osd::S_SELECT_ROM" ref="a0dff34146b98847c6f0e497e8a896d60" args="4'd6" -->
<div class="memitem">
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<table class="memname">
<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a0dff34146b98847c6f0e497e8a896d60">S_SELECT_ROM</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd6</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a1bd013f7937fd22f51d13505d6973260"></a><!-- doxytag: member="control_osd::S_COPY_ROM" ref="a1bd013f7937fd22f51d13505d6973260" args="4'd7" -->
<div class="memitem">
<div class="memproto">
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<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a1bd013f7937fd22f51d13505d6973260">S_COPY_ROM</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd7</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a4f25c53f35d7e5deef6a1895ee61fc01"></a><!-- doxytag: member="control_osd::S_RUNNING" ref="a4f25c53f35d7e5deef6a1895ee61fc01" args="4'd8" -->
<div class="memitem">
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<table class="memname">
<tr>
<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a4f25c53f35d7e5deef6a1895ee61fc01">S_RUNNING</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd8</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
</tr>
</table>
</div>
<div class="memdoc">
<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
</div>
</div>
<a class="anchor" id="a95fed56ef6e96e6f9f32ddc7d5c536bb"></a><!-- doxytag: member="control_osd::S_ON_SCREEN_DISPLAY" ref="a95fed56ef6e96e6f9f32ddc7d5c536bb" args="4'd9" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#a95fed56ef6e96e6f9f32ddc7d5c536bb">S_ON_SCREEN_DISPLAY</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdldigit">4'd9</span><span class="vhdlchar"> </span></b> <code> [Parameter]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00201">201</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<a class="anchor" id="aab6f880274ec3ca14f88705143726620"></a><!-- doxytag: member="control_osd::substate" ref="aab6f880274ec3ca14f88705143726620" args="reg[1:0]" -->
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<td class="memname"><span class="stringliteral"><a class="el" href="classcontrol__osd.html#aab6f880274ec3ca14f88705143726620">substate</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[1:0]]</code></td>
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<p>Definition at line <a class="el" href="control__osd_8v_source.html#l00213">213</a> of file <a class="el" href="control__osd_8v_source.html">control_osd.v</a>.</p>
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<hr/>The documentation for this class was generated from the following file:<ul>
<li><a class="el" href="control__osd_8v_source.html">control_osd.v</a></li>
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<hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:20 for aoOCS by 
<a href="http://www.doxygen.org/index.html">
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
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