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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> <html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> <title>aoOCS: drv_debug Module Reference</title> <link href="tabs.css" rel="stylesheet" type="text/css"/> <link href="doxygen.css" rel="stylesheet" type="text/css"/> </head> <body> <!-- Generated by Doxygen 1.7.2 --> <div class="navigation" id="top"> <div class="tabs"> <ul class="tablist"> <li><a href="index.html"><span>Main Page</span></a></li> <li class="current"><a href="annotated.html"><span>Design Unit List</span></a></li> <li><a href="files.html"><span>Files</span></a></li> </ul> </div> <div class="tabs2"> <ul class="tablist"> <li><a href="annotated.html"><span>Class List</span></a></li> <li><a href="hierarchy.html"><span>Design Unit Hierarchy</span></a></li> <li><a href="functions.html"><span>Design Unit Members</span></a></li> </ul> </div> </div> <div class="header"> <div class="summary"> <a href="#Inputs">Inputs</a> | <a href="#Outputs">Outputs</a> | <a href="#Signals">Signals</a> | <a href="#Always Constructs">Always Constructs</a> </div> <div class="headertitle"> <h1>drv_debug Module Reference</h1> </div> </div> <div class="contents"> <!-- doxytag: class="drv_debug" --> <p><p>Switches and hex leds driver for debug purposes. </p> <a href="#_details">More...</a></p> <!-- startSectionHeader --><div class="dynheader"> Inheritance diagram for drv_debug:<!-- endSectionHeader --></div> <!-- startSectionSummary --><!-- endSectionSummary --><!-- startSectionContent --><div class="dyncontent"> <div class="center"> <img src="classdrv__debug.png" usemap="#drv_debug_map" alt=""/> <map id="drv_debug_map" name="drv_debug_map"> <area href="classaoOCS.html" alt="aoOCS" shape="rect" coords="0,56,73,80"/> </map> </div><!-- endSectionContent --></div> <p><a href="classdrv__debug-members.html">List of all members.</a></p> <table class="memberdecls"> <tr><td colspan="2"><h2><a name="Always Constructs"></a> Always Constructs</h2></td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a4d3363cafc055d3a43d966b389c9e1eb">ALWAYS_67</a> </td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classdrv__debug.html#a7e36153a71f34792696d16581a6d5f67">CLK_I</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classdrv__debug.html#acd52a7205cfc84d2188f33227e734941">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr> <tr><td colspan="2"><h2><a name="Inputs"></a> Inputs</h2></td></tr> <tr><td colspan="2"><div class="groupHeader">Clock and reset</div></td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a7e36153a71f34792696d16581a6d5f67">CLK_I</a>  </td><td class="memItemRight" valign="bottom"></td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#acd52a7205cfc84d2188f33227e734941">reset_n</a>  </td><td class="memItemRight" valign="bottom"></td></tr> <tr><td colspan="2"><div class="groupHeader">Internal debug signals</div></td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#abea03e7c35c90ebd53d600056c06cbb5">master_adr_o</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a458757362a58ddbbe763586cb38419d0">debug_pc</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a406932e72315d7f81c77d0179d3d564f">debug_syscon</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#ad91c26028449d56aa73ee49500f7bce6">debug_track</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td colspan="2"><div class="groupHeader">Switches and hex leds hardware interface</div></td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#aa62d2fc6402d3c48aec2b7b2a149c3e0">debug_sw_pc</a>  </td><td class="memItemRight" valign="bottom"></td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#aaffc08056af623227f58da61300c029d">debug_sw_adr</a>  </td><td class="memItemRight" valign="bottom"></td></tr> <tr><td colspan="2"><h2><a name="Outputs"></a> Outputs</h2></td></tr> <tr><td colspan="2"><div class="groupHeader">Switches and hex leds hardware interface</div></td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a29bb4486ae47a83ce0124a170b51ff67">hex0</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a14cf02ea6548d1bae7a012fb5b5b3714">hex1</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a95201ed0da47b8059f4497af75f757c7">hex2</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a0d10bdcabc692b98cd821650ff11e3b1">hex3</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a86293bf7d1b5f04ce39148ba97d526a9">hex4</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#a3c2a491bb10a7c7b9f16724f53f99930">hex5</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#aefbfeea8e3202f7af9e2d7ba54561fba">hex6</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classdrv__debug.html#aa6a37e7b63418b1b3e51094f3f432908">hex7</a>  </td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> </td></tr> <tr><td colspan="2"><h2><a name="Signals"></a> Signals</h2></td></tr> <tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td><td class="memItemRight" valign="bottom"><a class="el" href="classdrv__debug.html#a63597b1cee1d4cf7b6c83630c231baa5">display</a> </td></tr> </table> <hr/><a name="_details"></a><h2>Detailed Description</h2> <p>Switches and hex leds driver for debug purposes. </p> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00031">31</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> <hr/><h2>Member Function Documentation</h2> <a class="anchor" id="a4d3363cafc055d3a43d966b389c9e1eb"></a><!-- doxytag: member="drv_debug::ALWAYS_67" ref="a4d3363cafc055d3a43d966b389c9e1eb" args="CLK_I, reset_n" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_67 <td></td> <td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classdrv__debug.html#a7e36153a71f34792696d16581a6d5f67">CLK_I</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> , </td> </tr> <tr> <td class="paramkey"></td> <td></td> <td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classdrv__debug.html#acd52a7205cfc84d2188f33227e734941">reset_n</a></b> <span class="vhdlchar"> </span></b> <em><span class="vhdlkeyword"></span></em> ) </td> </tr> <code> [Always Construct]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00201">201</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <hr/><h2>Member Data Documentation</h2> <a class="anchor" id="a7e36153a71f34792696d16581a6d5f67"></a><!-- doxytag: member="drv_debug::CLK_I" ref="a7e36153a71f34792696d16581a6d5f67" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a7e36153a71f34792696d16581a6d5f67">CLK_I</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00034">34</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="acd52a7205cfc84d2188f33227e734941"></a><!-- doxytag: member="drv_debug::reset_n" ref="acd52a7205cfc84d2188f33227e734941" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#acd52a7205cfc84d2188f33227e734941">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00035">35</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="abea03e7c35c90ebd53d600056c06cbb5"></a><!-- doxytag: member="drv_debug::master_adr_o" ref="abea03e7c35c90ebd53d600056c06cbb5" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#abea03e7c35c90ebd53d600056c06cbb5">master_adr_o</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">2</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00040">40</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="a458757362a58ddbbe763586cb38419d0"></a><!-- doxytag: member="drv_debug::debug_pc" ref="a458757362a58ddbbe763586cb38419d0" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a458757362a58ddbbe763586cb38419d0">debug_pc</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00041">41</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="a406932e72315d7f81c77d0179d3d564f"></a><!-- doxytag: member="drv_debug::debug_syscon" ref="a406932e72315d7f81c77d0179d3d564f" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a406932e72315d7f81c77d0179d3d564f">debug_syscon</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00042">42</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="ad91c26028449d56aa73ee49500f7bce6"></a><!-- doxytag: member="drv_debug::debug_track" ref="ad91c26028449d56aa73ee49500f7bce6" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#ad91c26028449d56aa73ee49500f7bce6">debug_track</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00043">43</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="a29bb4486ae47a83ce0124a170b51ff67"></a><!-- doxytag: member="drv_debug::hex0" ref="a29bb4486ae47a83ce0124a170b51ff67" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a29bb4486ae47a83ce0124a170b51ff67">hex0</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00049">49</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="a14cf02ea6548d1bae7a012fb5b5b3714"></a><!-- doxytag: member="drv_debug::hex1" ref="a14cf02ea6548d1bae7a012fb5b5b3714" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a14cf02ea6548d1bae7a012fb5b5b3714">hex1</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00050">50</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="a95201ed0da47b8059f4497af75f757c7"></a><!-- doxytag: member="drv_debug::hex2" ref="a95201ed0da47b8059f4497af75f757c7" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a95201ed0da47b8059f4497af75f757c7">hex2</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00051">51</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="a0d10bdcabc692b98cd821650ff11e3b1"></a><!-- doxytag: member="drv_debug::hex3" ref="a0d10bdcabc692b98cd821650ff11e3b1" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a0d10bdcabc692b98cd821650ff11e3b1">hex3</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00052">52</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="a86293bf7d1b5f04ce39148ba97d526a9"></a><!-- doxytag: member="drv_debug::hex4" ref="a86293bf7d1b5f04ce39148ba97d526a9" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a86293bf7d1b5f04ce39148ba97d526a9">hex4</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00053">53</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="a3c2a491bb10a7c7b9f16724f53f99930"></a><!-- doxytag: member="drv_debug::hex5" ref="a3c2a491bb10a7c7b9f16724f53f99930" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a3c2a491bb10a7c7b9f16724f53f99930">hex5</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00054">54</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="aefbfeea8e3202f7af9e2d7ba54561fba"></a><!-- doxytag: member="drv_debug::hex6" ref="aefbfeea8e3202f7af9e2d7ba54561fba" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#aefbfeea8e3202f7af9e2d7ba54561fba">hex6</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00055">55</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="aa6a37e7b63418b1b3e51094f3f432908"></a><!-- doxytag: member="drv_debug::hex7" ref="aa6a37e7b63418b1b3e51094f3f432908" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#aa6a37e7b63418b1b3e51094f3f432908">hex7</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">7</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00056">56</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="aa62d2fc6402d3c48aec2b7b2a149c3e0"></a><!-- doxytag: member="drv_debug::debug_sw_pc" ref="aa62d2fc6402d3c48aec2b7b2a149c3e0" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#aa62d2fc6402d3c48aec2b7b2a149c3e0">debug_sw_pc</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00058">58</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="aaffc08056af623227f58da61300c029d"></a><!-- doxytag: member="drv_debug::debug_sw_adr" ref="aaffc08056af623227f58da61300c029d" args="" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#aaffc08056af623227f58da61300c029d">debug_sw_adr</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00059">59</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <a class="anchor" id="a63597b1cee1d4cf7b6c83630c231baa5"></a><!-- doxytag: member="drv_debug::display" ref="a63597b1cee1d4cf7b6c83630c231baa5" args="reg[31:0]" --> <div class="memitem"> <div class="memproto"> <table class="memname"> <tr> <td class="memname"><span class="stringliteral"><a class="el" href="classdrv__debug.html#a63597b1cee1d4cf7b6c83630c231baa5">display</a></span> <b><span class="vhdlchar"> </span></b> <code> [reg[31:0]]</code></td> </tr> </table> </div> <div class="memdoc"> <p>Definition at line <a class="el" href="drv__debug_8v_source.html#l00199">199</a> of file <a class="el" href="drv__debug_8v_source.html">drv_debug.v</a>.</p> </div> </div> <hr/>The documentation for this class was generated from the following file:<ul> <li><a class="el" href="drv__debug_8v_source.html">drv_debug.v</a></li> </ul> </div> <hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:20 for aoOCS by  <a href="http://www.doxygen.org/index.html"> <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address> </body> </html>