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<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> <html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> <title>aoOCS: ocs_floppy.v Source File</title> <link href="tabs.css" rel="stylesheet" type="text/css"/> <link href="doxygen.css" rel="stylesheet" type="text/css"/> </head> <body> <!-- Generated by Doxygen 1.7.2 --> <div class="navigation" id="top"> <div class="tabs"> <ul class="tablist"> <li><a href="index.html"><span>Main Page</span></a></li> <li><a href="annotated.html"><span>Design Unit List</span></a></li> <li class="current"><a href="files.html"><span>Files</span></a></li> </ul> </div> <div class="tabs2"> <ul class="tablist"> <li><a href="files.html"><span>File List</span></a></li> <li><a href="globals.html"><span>File Members</span></a></li> </ul> </div> <div class="header"> <div class="headertitle"> <h1>ocs_floppy.v</h1> </div> </div> <div class="contents"> <a href="ocs__floppy_8v.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001 <span class="keyword">/*</span> <a name="l00002"></a>00002 <span class="keyword"> Copyright 2010, Aleksander Osman, alfik@poczta.fm. All rights reserved.</span> <a name="l00003"></a>00003 <span class="keyword"> </span> <a name="l00004"></a>00004 <span class="keyword"> Redistribution and use in source and binary forms, with or without modification, are</span> <a name="l00005"></a>00005 <span class="keyword"> permitted provided that the following conditions are met:</span> <a name="l00006"></a>00006 <span class="keyword"> </span> <a name="l00007"></a>00007 <span class="keyword"> 1. Redistributions of source code must retain the above copyright notice, this list of</span> <a name="l00008"></a>00008 <span class="keyword"> conditions and the following disclaimer.</span> <a name="l00009"></a>00009 <span class="keyword"> </span> <a name="l00010"></a>00010 <span class="keyword"> 2. Redistributions in binary form must reproduce the above copyright notice, this list</span> <a name="l00011"></a>00011 <span class="keyword"> of conditions and the following disclaimer in the documentation and/or other materials</span> <a name="l00012"></a>00012 <span class="keyword"> provided with the distribution.</span> <a name="l00013"></a>00013 <span class="keyword"> </span> <a name="l00014"></a>00014 <span class="keyword"> THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED</span> <a name="l00015"></a>00015 <span class="keyword"> WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND</span> <a name="l00016"></a>00016 <span class="keyword"> FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR</span> <a name="l00017"></a>00017 <span class="keyword"> CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</span> <a name="l00018"></a>00018 <span class="keyword"> CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR</span> <a name="l00019"></a>00019 <span class="keyword"> SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON</span> <a name="l00020"></a>00020 <span class="keyword"> ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING</span> <a name="l00021"></a>00021 <span class="keyword"> NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF</span> <a name="l00022"></a>00022 <span class="keyword"> ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</span> <a name="l00023"></a>00023 <span class="keyword"> */</span> <a name="l00024"></a>00024 <a name="l00025"></a>00025 <span class="keyword">/*! \file</span> <a name="l00026"></a>00026 <span class="keyword"> \brief OCS floppy implementation with WISHBONE master and slave interface.</span> <a name="l00027"></a>00027 <span class="keyword"> */</span> <a name="l00028"></a>00028 <a name="l00029"></a>00029 <span class="keyword">/*! \brief \copybrief ocs_floppy.v</span> <a name="l00030"></a>00030 <span class="keyword"></span> <a name="l00031"></a>00031 <span class="keyword">List of floppy registers:</span> <a name="l00032"></a>00032 <span class="keyword">\verbatim</span> <a name="l00033"></a>00033 <span class="keyword">Implemented:</span> <a name="l00034"></a>00034 <span class="keyword"> [SERDATR *018 R P Serial port data and status read read not implemented here]</span> <a name="l00035"></a>00035 <span class="keyword"> DSKBYTR *01A R P Disk data byte and status read read not implemented here</span> <a name="l00036"></a>00036 <span class="keyword"></span> <a name="l00037"></a>00037 <span class="keyword"> DSKPTH + *020 W A( E ) Disk pointer (high 3 bits, 5 bits if ECS)</span> <a name="l00038"></a>00038 <span class="keyword"> DSKPTL + *022 W A Disk pointer (low 15 bits)</span> <a name="l00039"></a>00039 <span class="keyword"> DSKLEN *024 W P Disk length</span> <a name="l00040"></a>00040 <span class="keyword"> DSKDAT & *026 W P Disk DMA data write</span> <a name="l00041"></a>00041 <span class="keyword"> </span> <a name="l00042"></a>00042 <span class="keyword"> [not used 07C]</span> <a name="l00043"></a>00043 <span class="keyword"> DSKSYNC ~07E W P Disk sync pattern register for disk read</span> <a name="l00044"></a>00044 <span class="keyword"></span> <a name="l00045"></a>00045 <span class="keyword">Not implemented:</span> <a name="l00046"></a>00046 <span class="keyword"> DSKDATR & *008 ER P Disk data early read (dummy address) not implemented</span> <a name="l00047"></a>00047 <span class="keyword"> [JOY0DAT *00A R D Joystick-mouse 0 data (vert,horiz) read not implemented here]</span> <a name="l00048"></a>00048 <span class="keyword">\endverbatim</span> <a name="l00049"></a>00049 <span class="keyword">*/</span> <a name="l00050"></a><a class="code" href="classocs__floppy.html">00050</a> <span class="vhdlkeyword">module</span> <a class="code" href="classocs__floppy.html">ocs_floppy</a>( <a name="l00051"></a>00051 <span class="keyword">//% \name Clock and reset </span> <a name="l00052"></a>00052 <span class="keyword">//% @{</span> <a name="l00053"></a><a class="code" href="classocs__floppy.html#aa59dd5f9a7196661777b60e06cf878f9">00053</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#aa59dd5f9a7196661777b60e06cf878f9">CLK_I</a>, <a name="l00054"></a><a class="code" href="classocs__floppy.html#a3bc40dbbffe5810c22c38f0a2bc1854a">00054</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a3bc40dbbffe5810c22c38f0a2bc1854a">reset_n</a>, <a name="l00055"></a>00055 <span class="keyword">//% @}</span> <a name="l00056"></a>00056 <a name="l00057"></a>00057 <span class="keyword">//% \name On-Screen-Display floppy management interface </span> <a name="l00058"></a>00058 <span class="keyword">//% @{</span> <a name="l00059"></a><a class="code" href="classocs__floppy.html#a278d37dd050c6db2ea87c024a4093712">00059</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a278d37dd050c6db2ea87c024a4093712">floppy_inserted</a>, <a name="l00060"></a><a class="code" href="classocs__floppy.html#a29358756464d3d7daa31c2bdfc03e423">00060</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a29358756464d3d7daa31c2bdfc03e423">floppy_sector</a>, <a name="l00061"></a><a class="code" href="classocs__floppy.html#a32a40e587785665b2ce894ad323dd512">00061</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a32a40e587785665b2ce894ad323dd512">floppy_write_enabled</a>, <a name="l00062"></a><a class="code" href="classocs__floppy.html#a2795ec2c9748257e1892f6bdcbdab1a7">00062</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a2795ec2c9748257e1892f6bdcbdab1a7">floppy_error</a>, <a name="l00063"></a>00063 <span class="keyword">//% @}</span> <a name="l00064"></a>00064 <a name="l00065"></a>00065 <span class="keyword">//% \name WISHBONE master </span> <a name="l00066"></a>00066 <span class="keyword">//% @{</span> <a name="l00067"></a><a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">00067</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a>, <a name="l00068"></a><a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">00068</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a>, <a name="l00069"></a><a class="code" href="classocs__floppy.html#a1f985010285312b1615d8f7d2a5e9b35">00069</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a1f985010285312b1615d8f7d2a5e9b35">WE_O</a>, <a name="l00070"></a><a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">00070</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>] <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a>, <a name="l00071"></a><a class="code" href="classocs__floppy.html#ac3fb5d485e04699de5ba746c40df0b72">00071</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ac3fb5d485e04699de5ba746c40df0b72">SEL_O</a>, <a name="l00072"></a><a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">00072</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a>, <a name="l00073"></a><a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">00073</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>, <a name="l00074"></a><a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">00074</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a>, <a name="l00075"></a>00075 <span class="keyword">//% @}</span> <a name="l00076"></a>00076 <a name="l00077"></a>00077 <span class="keyword">//% \name WISHBONE slave for OCS registers </span> <a name="l00078"></a>00078 <span class="keyword">//% @{</span> <a name="l00079"></a><a class="code" href="classocs__floppy.html#a983e19413188cc770cb065317d223c6b">00079</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a983e19413188cc770cb065317d223c6b">CYC_I</a>, <a name="l00080"></a><a class="code" href="classocs__floppy.html#a1a6040dd02f4cf32512df0583c28ee27">00080</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a1a6040dd02f4cf32512df0583c28ee27">STB_I</a>, <a name="l00081"></a><a class="code" href="classocs__floppy.html#a7be863139d9642bebbea1a694a19b6d9">00081</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a7be863139d9642bebbea1a694a19b6d9">WE_I</a>, <a name="l00082"></a><a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">00082</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">2</span>] <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <a name="l00083"></a><a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">00083</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>, <a name="l00084"></a><a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">00084</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">slave_DAT_I</a>, <a name="l00085"></a><a class="code" href="classocs__floppy.html#a6f126d6f47e96fb78fcbbb5592e9c044">00085</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a6f126d6f47e96fb78fcbbb5592e9c044">ACK_O</a>, <a name="l00086"></a>00086 <span class="keyword">//% @}</span> <a name="l00087"></a>00087 <a name="l00088"></a>00088 <span class="keyword">//% \name WISHBONE slave for floppy buffer </span> <a name="l00089"></a>00089 <span class="keyword">//% @{</span> <a name="l00090"></a><a class="code" href="classocs__floppy.html#a190cac9b83d7cda20fc7a3ddc1a72811">00090</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a190cac9b83d7cda20fc7a3ddc1a72811">buffer_CYC_I</a>, <a name="l00091"></a><a class="code" href="classocs__floppy.html#a907005a287840bef9da5ecec7d6880b6">00091</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a907005a287840bef9da5ecec7d6880b6">buffer_STB_I</a>, <a name="l00092"></a><a class="code" href="classocs__floppy.html#af09603d9f53c9c4e291d9cd8fa2bd396">00092</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#af09603d9f53c9c4e291d9cd8fa2bd396">buffer_WE_I</a>, <a name="l00093"></a><a class="code" href="classocs__floppy.html#a6e66fa1737be20eda12ac5df6b481e23">00093</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">13</span>:<span class="vhdllogic">2</span>] <a class="code" href="classocs__floppy.html#a6e66fa1737be20eda12ac5df6b481e23">buffer_ADR_I</a>, <a name="l00094"></a><a class="code" href="classocs__floppy.html#ae75b119e0e63da16afe8187a7e40fc7c">00094</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ae75b119e0e63da16afe8187a7e40fc7c">buffer_SEL_I</a>, <a name="l00095"></a><a class="code" href="classocs__floppy.html#a8896214391dbbd9c138ac7ef968417ea">00095</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a8896214391dbbd9c138ac7ef968417ea">buffer_DAT_I</a>, <a name="l00096"></a><a class="code" href="classocs__floppy.html#a3a1505ffbef65484cae1097d3a11ebdd">00096</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a3a1505ffbef65484cae1097d3a11ebdd">buffer_DAT_O</a>, <a name="l00097"></a><a class="code" href="classocs__floppy.html#ad1d05202ceb7b4804abb769d0c970f4b">00097</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#ad1d05202ceb7b4804abb769d0c970f4b">buffer_ACK_O</a>, <a name="l00098"></a>00098 <span class="keyword">//% @}</span> <a name="l00099"></a>00099 <a name="l00100"></a>00100 <span class="keyword">//% \name Not aligned register access on a 32-bit WISHBONE bus </span> <a name="l00101"></a>00101 <span class="keyword">//% @{</span> <a name="l00102"></a>00102 <span class="keyword">// DSKBYTR read not implemented here</span> <a name="l00103"></a><a class="code" href="classocs__floppy.html#a74e8dc8342f7b2f66fcac28ff789ed24">00103</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a74e8dc8342f7b2f66fcac28ff789ed24">na_dskbytr_read</a>, <a name="l00104"></a><a class="code" href="classocs__floppy.html#ae66e3f35772968f283c67ebf13dcad1c">00104</a> <span class="vhdlkeyword">output</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ae66e3f35772968f283c67ebf13dcad1c">na_dskbytr</a>, <a name="l00105"></a>00105 <span class="keyword">//% @}</span> <a name="l00106"></a>00106 <a name="l00107"></a>00107 <span class="keyword">//% \name Internal OCS ports </span> <a name="l00108"></a>00108 <span class="keyword">//% @{</span> <a name="l00109"></a><a class="code" href="classocs__floppy.html#abcb7397c7e851ddacb24be02c39fa842">00109</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#abcb7397c7e851ddacb24be02c39fa842">line_start</a>, <a name="l00110"></a>00110 <a name="l00111"></a><a class="code" href="classocs__floppy.html#aee11ed79f33e9d4a8288ffa91f4b7657">00111</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">10</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#aee11ed79f33e9d4a8288ffa91f4b7657">dma_con</a>, <a name="l00112"></a><a class="code" href="classocs__floppy.html#a6ffc455dd98f4c81dd4185a7db2589fd">00112</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">14</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a6ffc455dd98f4c81dd4185a7db2589fd">adk_con</a>, <a name="l00113"></a>00113 <a name="l00114"></a><a class="code" href="classocs__floppy.html#aae7a1c46c55664f93d5e2290af2cd649">00114</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#aae7a1c46c55664f93d5e2290af2cd649">floppy_syn_irq</a>, <a name="l00115"></a><a class="code" href="classocs__floppy.html#a6da684cd8a2642a5ce53cdfe7838583c">00115</a> <span class="vhdlkeyword">output</span> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a6da684cd8a2642a5ce53cdfe7838583c">floppy_blk_irq</a>, <a name="l00116"></a>00116 <span class="keyword">//% @}</span> <a name="l00117"></a>00117 <a name="l00118"></a>00118 <span class="keyword">//% \name Floppy CIA interface </span> <a name="l00119"></a>00119 <span class="keyword">//% @{</span> <a name="l00120"></a><a class="code" href="classocs__floppy.html#a27d2b7f381c56360248760ce751b397e">00120</a> <span class="vhdlkeyword">output</span> <a class="code" href="classocs__floppy.html#a27d2b7f381c56360248760ce751b397e">fl_rdy_n</a>, <a name="l00121"></a><a class="code" href="classocs__floppy.html#abea81bafad5afe28e0047b9ed47f2907">00121</a> <span class="vhdlkeyword">output</span> <a class="code" href="classocs__floppy.html#abea81bafad5afe28e0047b9ed47f2907">fl_tk0_n</a>, <a name="l00122"></a><a class="code" href="classocs__floppy.html#a098f578b23d7b89225cf8f860884f4c2">00122</a> <span class="vhdlkeyword">output</span> <a class="code" href="classocs__floppy.html#a098f578b23d7b89225cf8f860884f4c2">fl_wpro_n</a>, <a name="l00123"></a><a class="code" href="classocs__floppy.html#a62cc09e2539c911b9b65397125241579">00123</a> <span class="vhdlkeyword">output</span> <a class="code" href="classocs__floppy.html#a62cc09e2539c911b9b65397125241579">fl_chng_n</a>, <a name="l00124"></a><a class="code" href="classocs__floppy.html#a471f82561af3d45590ce23f34f622c10">00124</a> <span class="vhdlkeyword">output</span> <a class="code" href="classocs__floppy.html#a471f82561af3d45590ce23f34f622c10">fl_index_n</a>, <a name="l00125"></a>00125 <a name="l00126"></a><a class="code" href="classocs__floppy.html#a5fc0bcaad87e96bb5d4d33841cbe7329">00126</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#a5fc0bcaad87e96bb5d4d33841cbe7329">fl_mtr_n</a>, <a name="l00127"></a><a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">00127</a> <span class="vhdlkeyword">input</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a>, <a name="l00128"></a><a class="code" href="classocs__floppy.html#ad36319f3a04a8db854d5c2cbc4b794b3">00128</a> <span class="vhdlkeyword">input</span> <a class="code" href="classocs__floppy.html#ad36319f3a04a8db854d5c2cbc4b794b3">fl_side_n</a>, <a name="l00129"></a><a class="code" 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href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">11</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">9</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">9</span>], <a name="l00154"></a>00154 ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">9</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">7</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">7</span>], ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">7</span>] & ~<a class="code" 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href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">28</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">26</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">26</span>], ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">26</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">24</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">24</span>], <a name="l00158"></a>00158 ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">24</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">22</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">22</span>], ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">22</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">20</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">20</span>], <a name="l00159"></a>00159 ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">20</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">18</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">18</span>], ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">18</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">16</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">16</span>], <a name="l00160"></a>00160 ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">16</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">14</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">14</span>], ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">14</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">12</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">12</span>], <a name="l00161"></a>00161 ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">12</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">10</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">10</span>], ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">10</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">8</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">8</span>], <a name="l00162"></a>00162 ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">8</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">6</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">6</span>], ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">6</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">4</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">4</span>], <a name="l00163"></a>00163 ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">4</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">2</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">2</span>], ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">2</span>] & ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">0</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">0</span>] <a name="l00164"></a>00164 }; <a name="l00165"></a>00165 <a name="l00166"></a><a class="code" href="classocs__floppy.html#a135d2386844e80446d28eb10a881dfd2">00166</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a135d2386844e80446d28eb10a881dfd2">header</a> = <a name="l00167"></a>00167 { <span class="vhdllogic">8'hFF</span>, {<a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a>, <span class="vhdllogic">1'b0</span>} + {<span class="vhdllogic">7'b0</span>, ~<a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">last_fl_side_n</a>}, {<span class="vhdllogic">4'b0</span>, <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a>}, <span class="vhdllogic">8'd11</span> - {<span class="vhdllogic">4'b0</span>, <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a>} }; <a name="l00168"></a>00168 <a name="l00169"></a><a class="code" href="classocs__floppy.html#a34b11c99814b7279498909176ccc6f6d">00169</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a34b11c99814b7279498909176ccc6f6d">masked_checksum</a> = <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a> & <span class="vhdllogic">32'h55555555</span>; <a name="l00170"></a>00170 <a name="l00171"></a><a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">00171</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">47</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a>; <a name="l00172"></a><a class="code" href="classocs__floppy.html#a5875e29134221bd91bb5b87bc0521817">00172</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a5875e29134221bd91bb5b87bc0521817">output_first_word</a>; <a name="l00173"></a><a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">00173</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a>; <a name="l00174"></a><a class="code" href="classocs__floppy.html#ac29cdd4b7f3ca059f4a0175c88ed0fab">00174</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ac29cdd4b7f3ca059f4a0175c88ed0fab">last_output_line_cnt</a>; <a name="l00175"></a><a class="code" href="classocs__floppy.html#ac11b338c914d9358945342519a33c208">00175</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">4</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ac11b338c914d9358945342519a33c208">output_shift_cnt</a>; <a name="l00176"></a>00176 <a name="l00177"></a><a class="code" href="classocs__floppy.html#ad508b48342f6baafb3e7be4f7c59a700">00177</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#ad508b48342f6baafb3e7be4f7c59a700">output_shifting</a> = (<a class="code" href="classocs__floppy.html#ac29cdd4b7f3ca059f4a0175c88ed0fab">last_output_line_cnt</a> != <span class="vhdllogic">6'd0</span>); <a name="l00178"></a><a class="code" href="classocs__floppy.html#ac8de88f8da01e1e1704d4c184524378d">00178</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#ac8de88f8da01e1e1704d4c184524378d">output_shifted</a> = (<a class="code" href="classocs__floppy.html#a1df5f86e2cf0e712ef91aae6923127ab">last_dsksync_halt</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#ac29cdd4b7f3ca059f4a0175c88ed0fab">last_output_line_cnt</a> != <span class="vhdllogic">6'd0</span> && <a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> == <span class="vhdllogic">6'd0</span>); <a name="l00179"></a><a class="code" href="classocs__floppy.html#aeedd5e31546527cd82c463fa90b36db6">00179</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#aeedd5e31546527cd82c463fa90b36db6">output_index</a> = (<a class="code" href="classocs__floppy.html#ac64f5017b9b43b6df5fa1c0e8c4c8b8f">last_buffer_addr</a> == <span class="vhdllogic">12'd3124</span> && <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> == <span class="vhdllogic">12'd0</span>); <a name="l00180"></a><a class="code" href="classocs__floppy.html#a30fd713045ce1c717f1681cc371c610d">00180</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#a30fd713045ce1c717f1681cc371c610d">write_sector_ready</a> = (<a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> == <span class="vhdllogic">12'd127</span>); <a name="l00181"></a><a class="code" href="classocs__floppy.html#a4ae6c1edab9d5c6d4dc4c4fa5dda8e98">00181</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a4ae6c1edab9d5c6d4dc4c4fa5dda8e98">output_long_word</a> = { <a class="code" href="classocs__floppy.html#a5875e29134221bd91bb5b87bc0521817">output_first_word</a>, <a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a>[<span class="vhdllogic">47</span>:<span class="vhdllogic">32</span>] }; <a name="l00182"></a>00182 <a name="l00183"></a>00183 <span class="keyword">//*********************************** FLOPPY BUFFER start</span> <a name="l00184"></a><a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">00184</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">11</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a>; <a name="l00185"></a><a class="code" href="classocs__floppy.html#ac64f5017b9b43b6df5fa1c0e8c4c8b8f">00185</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">11</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ac64f5017b9b43b6df5fa1c0e8c4c8b8f">last_buffer_addr</a>; <a name="l00186"></a><a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">00186</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">8</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a>; <a name="l00187"></a><a class="code" href="classocs__floppy.html#abe99cb1ee3292e2b42a47e7d13bb2fd5">00187</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#abe99cb1ee3292e2b42a47e7d13bb2fd5">last_buffer_ACK_O</a>; <a name="l00188"></a>00188 <a name="l00189"></a><a class="code" href="classocs__floppy.html#ab21adffb7f5927effac270ca550f5f10">00189</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#ab21adffb7f5927effac270ca550f5f10">buffer_write_cycle</a> = <a name="l00190"></a>00190 (<a class="code" href="classocs__floppy.html#a190cac9b83d7cda20fc7a3ddc1a72811">buffer_CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a907005a287840bef9da5ecec7d6880b6">buffer_STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#af09603d9f53c9c4e291d9cd8fa2bd396">buffer_WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ae75b119e0e63da16afe8187a7e40fc7c">buffer_SEL_I</a> == <span class="vhdllogic">4'b1111</span> && <a class="code" href="classocs__floppy.html#ad1d05202ceb7b4804abb769d0c970f4b">buffer_ACK_O</a> == <span class="vhdllogic">1'b0</span>); <a name="l00191"></a><a class="code" href="classocs__floppy.html#a5fa18399ef0b9b7e3fb70028e3206a53">00191</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#a5fa18399ef0b9b7e3fb70028e3206a53">buffer_read_cycle</a> = <a name="l00192"></a>00192 (<a class="code" href="classocs__floppy.html#a190cac9b83d7cda20fc7a3ddc1a72811">buffer_CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a907005a287840bef9da5ecec7d6880b6">buffer_STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#af09603d9f53c9c4e291d9cd8fa2bd396">buffer_WE_I</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#ae75b119e0e63da16afe8187a7e40fc7c">buffer_SEL_I</a> == <span class="vhdllogic">4'b1111</span> && <a class="code" href="classocs__floppy.html#ad1d05202ceb7b4804abb769d0c970f4b">buffer_ACK_O</a> == <span class="vhdllogic">1'b0</span>); <a name="l00193"></a>00193 <a name="l00194"></a><a class="code" href="classocs__floppy.html#a86b2cfa95617f3c4e11298ea45bea779">00194</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#a86b2cfa95617f3c4e11298ea45bea779">buffer_wren</a> = <a name="l00195"></a>00195 (<a class="code" href="classocs__floppy.html#a1d13e3c8171d7e774d3a372d14f8860f">enable_write</a> == <span class="vhdllogic">1'b1</span>)? <span class="vhdllogic">1'b1</span> : <a name="l00196"></a>00196 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd1</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd14</span>)? <span class="vhdllogic">1'b1</span> : <a name="l00197"></a>00197 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd16</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd271</span> && (<a class="code" href="classocs__floppy.html#ad1d05202ceb7b4804abb769d0c970f4b">buffer_ACK_O</a> == <span class="vhdllogic">1'b1</span> || <a class="code" href="classocs__floppy.html#abe99cb1ee3292e2b42a47e7d13bb2fd5">last_buffer_ACK_O</a> == <span class="vhdllogic">1'b1</span>))? <span class="vhdllogic">1'b1</span> : <a name="l00198"></a>00198 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd272</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd275</span>)? <span class="vhdllogic">1'b1</span> : <a name="l00199"></a>00199 <span class="vhdllogic">1'b0</span>; <a name="l00200"></a>00200 <a name="l00201"></a><a class="code" href="classocs__floppy.html#ad0d3781589cf837abb3f9f7a1523f7e0">00201</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ad0d3781589cf837abb3f9f7a1523f7e0">buffer_data</a> = <a name="l00202"></a>00202 (<a class="code" href="classocs__floppy.html#a1d13e3c8171d7e774d3a372d14f8860f">enable_write</a> == <span class="vhdllogic">1'b1</span>)? <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a> : <a name="l00203"></a>00203 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd1</span>)? <span class="vhdllogic">32'hAAAAAAAA</span> : <a name="l00204"></a>00204 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd2</span>)? <span class="vhdllogic">32'h44894489</span> : <a name="l00205"></a>00205 <span class="keyword">// insert header, insert header checksum</span> <a name="l00206"></a>00206 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd3</span> || <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd13</span>)? <a class="code" href="classocs__floppy.html#a68a29a64f100896fe3e2bd310bc7e942">mfm_output</a>[<span class="vhdllogic">63</span>:<span class="vhdllogic">32</span>] : <a name="l00207"></a>00207 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd4</span> || <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd14</span>)? <a class="code" href="classocs__floppy.html#a68a29a64f100896fe3e2bd310bc7e942">mfm_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] : <a name="l00208"></a>00208 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd5</span>)? { ~<a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span>, <span class="vhdllogic">2'b10</span>, <span class="vhdllogic">28'hAAAAAAA</span> } : <a name="l00209"></a>00209 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd14</span>)? <span class="vhdllogic">32'hAAAAAAAA</span> : <a name="l00210"></a>00210 <span class="keyword">// insert data, count data checksum</span> <a name="l00211"></a>00211 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd16</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd270</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span>)? <a name="l00212"></a>00212 <a class="code" href="classocs__floppy.html#a68a29a64f100896fe3e2bd310bc7e942">mfm_output</a>[<span class="vhdllogic">63</span>:<span class="vhdllogic">32</span>] : <a name="l00213"></a>00213 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd17</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd271</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>)? <a name="l00214"></a>00214 <a class="code" href="classocs__floppy.html#a68a29a64f100896fe3e2bd310bc7e942">mfm_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] : <a name="l00215"></a>00215 <span class="keyword">// fix first and middle bit</span> <a name="l00216"></a>00216 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd272</span> || <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd274</span>)? <a class="code" href="classocs__floppy.html#a68a29a64f100896fe3e2bd310bc7e942">mfm_output</a>[<span class="vhdllogic">63</span>:<span class="vhdllogic">32</span>] : <a name="l00217"></a>00217 <span class="keyword">// write checksum</span> <a name="l00218"></a>00218 (<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd273</span> || <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd275</span>)? <a class="code" href="classocs__floppy.html#a68a29a64f100896fe3e2bd310bc7e942">mfm_output</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] : <a name="l00219"></a>00219 <span class="vhdllogic">32'd0</span>; <a name="l00220"></a><a class="code" href="classocs__floppy.html#a21a96aaa5fc048db5447abbd685faa8c">00220</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a21a96aaa5fc048db5447abbd685faa8c">buffer_q</a>; <a name="l00221"></a>00221 <a name="l00222"></a><a class="code" href="classocs__floppy.html#a513184694c0b1a7bf8baca239c68862f">00222</a> <a class="code" href="classocs__floppy.html#a513184694c0b1a7bf8baca239c68862f">altsyncram</a> <span class="vhdlchar">buffer_ram_inst</span>( <a name="l00223"></a>00223 .<span class="vhdlchar">clock0</span> (<a class="code" href="classocs__floppy.html#aa59dd5f9a7196661777b60e06cf878f9">CLK_I</a>), <a name="l00224"></a>00224 .<span class="vhdlchar">address_a</span> (<a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a>), <a name="l00225"></a>00225 .<span class="vhdlchar">wren_a</span> (<a class="code" href="classocs__floppy.html#a86b2cfa95617f3c4e11298ea45bea779">buffer_wren</a>), <a name="l00226"></a>00226 .<span class="vhdlchar">data_a</span> (<a class="code" href="classocs__floppy.html#ad0d3781589cf837abb3f9f7a1523f7e0">buffer_data</a>), <a name="l00227"></a>00227 .<span class="vhdlchar">q_a</span> (<a class="code" href="classocs__floppy.html#a21a96aaa5fc048db5447abbd685faa8c">buffer_q</a>), <a name="l00228"></a>00228 <a name="l00229"></a>00229 .<span class="vhdlchar">clock1</span> (<a class="code" href="classocs__floppy.html#aa59dd5f9a7196661777b60e06cf878f9">CLK_I</a>), <a name="l00230"></a>00230 .<span class="vhdlchar">address_b</span> (<a class="code" href="classocs__floppy.html#a6e66fa1737be20eda12ac5df6b481e23">buffer_ADR_I</a>), <a name="l00231"></a>00231 .<span class="vhdlchar">q_b</span> (<a class="code" href="classocs__floppy.html#a3a1505ffbef65484cae1097d3a11ebdd">buffer_DAT_O</a>) <a name="l00232"></a>00232 ); <a name="l00233"></a>00233 <span class="vhdlkeyword">defparam</span> <a name="l00234"></a>00234 <span class="vhdlchar">buffer_ram_inst</span>.<span class="vhdlchar">operation_mode</span> = <span class="keyword">"BIDIR_DUAL_PORT"</span>, <a name="l00235"></a>00235 <span class="vhdlchar">buffer_ram_inst</span>.<span class="vhdlchar">width_a</span> = <span class="vhdllogic">32</span>, <a name="l00236"></a>00236 <span class="vhdlchar">buffer_ram_inst</span>.<span class="vhdlchar">widthad_a</span> = <span class="vhdllogic">12</span>, <a name="l00237"></a>00237 <span class="vhdlchar">buffer_ram_inst</span>.<span class="vhdlchar">width_b</span> = <span class="vhdllogic">32</span>, <a name="l00238"></a>00238 <span class="vhdlchar">buffer_ram_inst</span>.<span class="vhdlchar">widthad_b</span> = <span class="vhdllogic">12</span>, <a name="l00239"></a>00239 <span class="vhdlchar">buffer_ram_inst</span>.<span class="vhdlchar">init_file</span> = <span class="keyword">"ocs_floppy.mif"</span>; <a name="l00240"></a>00240 <span class="keyword">/* </span> <a name="l00241"></a>00241 <span class="keyword"> buffer_counter</span> <a name="l00242"></a>00242 <span class="keyword"> 15->16: load mfm A, load addr A</span> <a name="l00243"></a>00243 <span class="keyword"> 16->17: store A, load addr A+128</span> <a name="l00244"></a>00244 <span class="keyword"> 17->18: load mfm A+1, store A+128, load addr A+1</span> <a name="l00245"></a>00245 <span class="keyword"> 18->19: store A+1, load addr A+129</span> <a name="l00246"></a>00246 <span class="keyword"> ......</span> <a name="l00247"></a>00247 <span class="keyword"> 269->270: load mfm A+127, store A+254, load addr A+127</span> <a name="l00248"></a>00248 <span class="keyword"> 270->271: store A+127, load addr A+255</span> <a name="l00249"></a>00249 <span class="keyword"> 271->272: store A+255</span> <a name="l00250"></a>00250 <span class="keyword">*/</span> <a name="l00251"></a>00251 <a name="l00252"></a><a class="code" href="classocs__floppy.html#aa58b536c7362d5a7acf55dc8667d3d21">00252</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classocs__floppy.html#aa59dd5f9a7196661777b60e06cf878f9">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classocs__floppy.html#a3bc40dbbffe5810c22c38f0a2bc1854a">reset_n</a>) <span class="vhdlkeyword">begin</span> <a name="l00253"></a>00253 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a3bc40dbbffe5810c22c38f0a2bc1854a">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00254"></a>00254 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <span class="vhdllogic">12'd0</span>; <a name="l00255"></a>00255 <a class="code" href="classocs__floppy.html#ac64f5017b9b43b6df5fa1c0e8c4c8b8f">last_buffer_addr</a> <= <span class="vhdllogic">12'd0</span>; <a name="l00256"></a>00256 <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd0</span>; <a name="l00257"></a>00257 <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a> <= <span class="vhdllogic">34'd0</span>; <a name="l00258"></a>00258 <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a> <= <span class="vhdllogic">32'd0</span>; <a name="l00259"></a>00259 <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00260"></a>00260 <a name="l00261"></a>00261 <a class="code" href="classocs__floppy.html#acdafde07f6705cb760251acdb7f57fcf">last_checksum_bit</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00262"></a>00262 <a class="code" href="classocs__floppy.html#a68341d2f4fcbf77473c7f9814381abdb">first_long_word</a> <= <span class="vhdllogic">32'd0</span>; <a name="l00263"></a>00263 <a name="l00264"></a>00264 <a class="code" href="classocs__floppy.html#ad1d05202ceb7b4804abb769d0c970f4b">buffer_ACK_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00265"></a>00265 <a class="code" href="classocs__floppy.html#abe99cb1ee3292e2b42a47e7d13bb2fd5">last_buffer_ACK_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00266"></a>00266 <a name="l00267"></a>00267 <a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a> <= <span class="vhdllogic">48'd0</span>; <a name="l00268"></a>00268 <a class="code" href="classocs__floppy.html#a5875e29134221bd91bb5b87bc0521817">output_first_word</a> <= <span class="vhdllogic">16'd0</span>; <a name="l00269"></a>00269 <a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> <= <span class="vhdllogic">6'd0</span>; <a name="l00270"></a>00270 <a class="code" href="classocs__floppy.html#ac29cdd4b7f3ca059f4a0175c88ed0fab">last_output_line_cnt</a> <= <span class="vhdllogic">6'd0</span>; <a name="l00271"></a>00271 <a class="code" href="classocs__floppy.html#ac11b338c914d9358945342519a33c208">output_shift_cnt</a> <= <span class="vhdllogic">5'd0</span>; <a name="l00272"></a>00272 <span class="vhdlkeyword">end</span> <a name="l00273"></a>00273 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span> <a name="l00274"></a>00274 <a class="code" href="classocs__floppy.html#abe99cb1ee3292e2b42a47e7d13bb2fd5">last_buffer_ACK_O</a> <= <a class="code" href="classocs__floppy.html#ad1d05202ceb7b4804abb769d0c970f4b">buffer_ACK_O</a>; <a name="l00275"></a>00275 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#ab21adffb7f5927effac270ca550f5f10">buffer_write_cycle</a> == <span class="vhdllogic">1'b1</span> || <a class="code" href="classocs__floppy.html#a5fa18399ef0b9b7e3fb70028e3206a53">buffer_read_cycle</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#ad1d05202ceb7b4804abb769d0c970f4b">buffer_ACK_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00276"></a>00276 <span class="vhdlkeyword">else</span> <a class="code" href="classocs__floppy.html#ad1d05202ceb7b4804abb769d0c970f4b">buffer_ACK_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00277"></a>00277 <a name="l00278"></a>00278 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd3</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd12</span>) <a name="l00279"></a>00279 <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a> <= <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a> ^ <a class="code" href="classocs__floppy.html#ad0d3781589cf837abb3f9f7a1523f7e0">buffer_data</a>; <a name="l00280"></a>00280 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd14</span>) <a name="l00281"></a>00281 <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a> <= <span class="vhdllogic">32'd0</span>; <a name="l00282"></a>00282 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd16</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd271</span> && <a class="code" href="classocs__floppy.html#a86b2cfa95617f3c4e11298ea45bea779">buffer_wren</a> == <span class="vhdllogic">1'b1</span>) <a name="l00283"></a>00283 <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a> <= <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a> ^ <a class="code" href="classocs__floppy.html#ad0d3781589cf837abb3f9f7a1523f7e0">buffer_data</a>; <a name="l00284"></a>00284 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd275</span>) <a name="l00285"></a>00285 <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a> <= <span class="vhdllogic">32'd0</span>; <a name="l00286"></a>00286 <a name="l00287"></a>00287 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd14</span>) <a class="code" href="classocs__floppy.html#acdafde07f6705cb760251acdb7f57fcf">last_checksum_bit</a> <= <a class="code" href="classocs__floppy.html#ad0d3781589cf837abb3f9f7a1523f7e0">buffer_data</a>[<span class="vhdllogic">0</span>]; <a name="l00288"></a>00288 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd15</span>) <a class="code" href="classocs__floppy.html#a68341d2f4fcbf77473c7f9814381abdb">first_long_word</a> <= <a class="code" href="classocs__floppy.html#a8896214391dbbd9c138ac7ef968417ea">buffer_DAT_I</a>; <a name="l00289"></a>00289 <a name="l00290"></a>00290 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd275</span> && <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a> < <span class="vhdllogic">4'd10</span>) <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a> <= <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a> + <span class="vhdllogic">4'd1</span>; <a name="l00291"></a>00291 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd275</span>) <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00292"></a>00292 <a name="l00293"></a>00293 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aaa387cff72e383297a6bffbf2b6ac93c">start_read</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00294"></a>00294 <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd1</span>; <a name="l00295"></a>00295 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <span class="vhdllogic">12'd0</span>; <a name="l00296"></a>00296 <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a> <= <span class="vhdllogic">32'd0</span>; <a name="l00297"></a>00297 <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00298"></a>00298 <span class="vhdlkeyword">end</span> <a name="l00299"></a>00299 <a name="l00300"></a>00300 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd1</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd14</span>) <a name="l00301"></a>00301 <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> + <span class="vhdllogic">9'd1</span>; <a name="l00302"></a>00302 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd15</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd269</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ab21adffb7f5927effac270ca550f5f10">buffer_write_cycle</a> == <span class="vhdllogic">1'b1</span>) <a name="l00303"></a>00303 <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> + <span class="vhdllogic">9'd1</span>; <a name="l00304"></a>00304 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd16</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd270</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span>) <a name="l00305"></a>00305 <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> + <span class="vhdllogic">9'd1</span>; <a name="l00306"></a>00306 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd271</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd274</span>) <a name="l00307"></a>00307 <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> + <span class="vhdllogic">9'd1</span>; <a name="l00308"></a>00308 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd275</span> && <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a> < <span class="vhdllogic">4'd10</span>) <a name="l00309"></a>00309 <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd1</span>; <a name="l00310"></a>00310 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd275</span>) <a name="l00311"></a>00311 <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd0</span>; <a name="l00312"></a>00312 <a name="l00313"></a>00313 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd1</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd13</span>) <a name="l00314"></a>00314 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> + <span class="vhdllogic">12'd1</span>; <a name="l00315"></a>00315 <span class="keyword">// skip data checksum</span> <a name="l00316"></a>00316 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd14</span>) <a name="l00317"></a>00317 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> + <span class="vhdllogic">12'd3</span>; <a name="l00318"></a>00318 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd17</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd269</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ab21adffb7f5927effac270ca550f5f10">buffer_write_cycle</a> == <span class="vhdllogic">1'b1</span>) <a name="l00319"></a>00319 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> - <span class="vhdllogic">12'd128</span> + <span class="vhdllogic">12'd1</span>; <a name="l00320"></a>00320 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd16</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd270</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span>) <a name="l00321"></a>00321 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> + <span class="vhdllogic">12'd128</span>; <a name="l00322"></a>00322 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd271</span>) <a name="l00323"></a>00323 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> - <span class="vhdllogic">12'd256</span> + <span class="vhdllogic">12'd1</span>; <a name="l00324"></a>00324 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd272</span>) <a name="l00325"></a>00325 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> + <span class="vhdllogic">12'd128</span>; <a name="l00326"></a>00326 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd273</span>) <a name="l00327"></a>00327 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> - <span class="vhdllogic">12'd128</span> - <span class="vhdllogic">12'd2</span>; <a name="l00328"></a>00328 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd274</span>) <a name="l00329"></a>00329 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> + <span class="vhdllogic">12'd1</span>; <a name="l00330"></a>00330 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd275</span> && <a class="code" href="classocs__floppy.html#a693d3515aba9165982ce2eb302aee095">sector</a> < <span class="vhdllogic">4'd10</span>) <a name="l00331"></a>00331 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> + <span class="vhdllogic">12'd1</span> + <span class="vhdllogic">12'd256</span>; <a name="l00332"></a>00332 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd275</span>) <a name="l00333"></a>00333 <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <span class="vhdllogic">12'd0</span>; <a name="l00334"></a>00334 <a name="l00335"></a>00335 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd2</span>) <a name="l00336"></a>00336 <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a> <= { <span class="vhdllogic">1'b1</span>, <a class="code" href="classocs__floppy.html#a135d2386844e80446d28eb10a881dfd2">header</a>[<span class="vhdllogic">1</span>], <a class="code" href="classocs__floppy.html#a135d2386844e80446d28eb10a881dfd2">header</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] }; <a name="l00337"></a>00337 <span class="keyword">// checksum</span> <a name="l00338"></a>00338 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd12</span>) <a name="l00339"></a>00339 <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a> <= { <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a34b11c99814b7279498909176ccc6f6d">masked_checksum</a>[<span class="vhdllogic">1</span>], <a class="code" href="classocs__floppy.html#a34b11c99814b7279498909176ccc6f6d">masked_checksum</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] }; <a name="l00340"></a>00340 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd15</span> && <a class="code" href="classocs__floppy.html#ab21adffb7f5927effac270ca550f5f10">buffer_write_cycle</a> == <span class="vhdllogic">1'b1</span>) <a name="l00341"></a>00341 <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a> <= { <span class="vhdllogic">1'b1</span>, <span class="vhdllogic">1'b1</span>, <a class="code" href="classocs__floppy.html#a8896214391dbbd9c138ac7ef968417ea">buffer_DAT_I</a> }; <a name="l00342"></a>00342 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> >= <span class="vhdllogic">9'd17</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> <= <span class="vhdllogic">9'd269</span> && <a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ab21adffb7f5927effac270ca550f5f10">buffer_write_cycle</a> == <span class="vhdllogic">1'b1</span>) <a name="l00343"></a>00343 <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a> <= { <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">1</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">0</span>], <a class="code" href="classocs__floppy.html#a8896214391dbbd9c138ac7ef968417ea">buffer_DAT_I</a>}; <a name="l00344"></a>00344 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd271</span>) <a name="l00345"></a>00345 <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a> <= { <a class="code" href="classocs__floppy.html#ac790d7b259d242165c0b9269f832e668">checksum</a>[<span class="vhdllogic">0</span>]^<a class="code" href="classocs__floppy.html#ad0d3781589cf837abb3f9f7a1523f7e0">buffer_data</a>[<span class="vhdllogic">0</span>], <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a>[<span class="vhdllogic">1</span>], <a class="code" href="classocs__floppy.html#a68341d2f4fcbf77473c7f9814381abdb">first_long_word</a> }; <a name="l00346"></a>00346 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd273</span>) <a name="l00347"></a>00347 <a class="code" href="classocs__floppy.html#a9a76ec82193f18d025dda7f1585c140d">mfm_encoder</a> <= { <a class="code" href="classocs__floppy.html#acdafde07f6705cb760251acdb7f57fcf">last_checksum_bit</a>, <a class="code" href="classocs__floppy.html#a34b11c99814b7279498909176ccc6f6d">masked_checksum</a>[<span class="vhdllogic">1</span>], <a class="code" href="classocs__floppy.html#a34b11c99814b7279498909176ccc6f6d">masked_checksum</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] }; <a name="l00348"></a>00348 <a name="l00349"></a>00349 <a class="code" href="classocs__floppy.html#ac29cdd4b7f3ca059f4a0175c88ed0fab">last_output_line_cnt</a> <= <a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a>; <a name="l00350"></a>00350 <a class="code" href="classocs__floppy.html#ac64f5017b9b43b6df5fa1c0e8c4c8b8f">last_buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a>; <a name="l00351"></a>00351 <a name="l00352"></a>00352 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> == <span class="vhdllogic">6'd16</span>) <a class="code" href="classocs__floppy.html#a5875e29134221bd91bb5b87bc0521817">output_first_word</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a>[<span class="vhdllogic">47</span>:<span class="vhdllogic">32</span>]; <a name="l00353"></a>00353 <a name="l00354"></a>00354 <span class="keyword">//if(output_shifted) $display("%08x ", output_long_word);</span> <a name="l00355"></a>00355 <a name="l00356"></a>00356 <span class="keyword">// read mfm data</span> <a name="l00357"></a>00357 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd0</span> && <a class="code" href="classocs__floppy.html#aaa387cff72e383297a6bffbf2b6ac93c">start_read</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#ae5a8face33fcca95a4d7115fd93435e5">active_write</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00358"></a>00358 <a name="l00359"></a>00359 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> != <span class="vhdllogic">6'd0</span> && <a class="code" href="classocs__floppy.html#a80c75bc69387e7c4c11e65dac539822b">dsksync_halt</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00360"></a>00360 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#ac11b338c914d9358945342519a33c208">output_shift_cnt</a> == <span class="vhdllogic">5'd0</span>) <a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a> <= { <a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a>[<span class="vhdllogic">46</span>:<span class="vhdllogic">32</span>], <a class="code" href="classocs__floppy.html#a21a96aaa5fc048db5447abbd685faa8c">buffer_q</a>, <span class="vhdllogic">1'b0</span> }; <a name="l00361"></a>00361 <span class="vhdlkeyword">else</span> <a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a> <= { <a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a>[<span class="vhdllogic">46</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span> }; <a name="l00362"></a>00362 <a name="l00363"></a>00363 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#ac11b338c914d9358945342519a33c208">output_shift_cnt</a> == <span class="vhdllogic">5'd0</span>) <span class="vhdlkeyword">begin</span> <a name="l00364"></a>00364 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> == <span class="vhdllogic">12'd3124</span>) <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <span class="vhdllogic">12'd0</span>; <a name="l00365"></a>00365 <span class="vhdlkeyword">else</span> <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> + <span class="vhdllogic">12'd1</span>; <a name="l00366"></a>00366 <span class="vhdlkeyword">end</span> <a name="l00367"></a>00367 <a class="code" href="classocs__floppy.html#ac11b338c914d9358945342519a33c208">output_shift_cnt</a> <= <a class="code" href="classocs__floppy.html#ac11b338c914d9358945342519a33c208">output_shift_cnt</a> - <span class="vhdllogic">5'd1</span>; <a name="l00368"></a>00368 <span class="vhdlkeyword">end</span> <a name="l00369"></a>00369 <a name="l00370"></a>00370 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> != <span class="vhdllogic">6'd0</span> && <a class="code" href="classocs__floppy.html#a80c75bc69387e7c4c11e65dac539822b">dsksync_halt</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00371"></a>00371 <a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> <= <span class="vhdllogic">6'd0</span>; <a name="l00372"></a>00372 <span class="vhdlkeyword">end</span> <a name="l00373"></a>00373 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> != <span class="vhdllogic">6'd0</span>) <span class="vhdlkeyword">begin</span> <a name="l00374"></a>00374 <a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> <= <a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> - <span class="vhdllogic">6'd1</span>; <a name="l00375"></a>00375 <span class="vhdlkeyword">end</span> <a name="l00376"></a>00376 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abcb7397c7e851ddacb24be02c39fa842">line_start</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00377"></a>00377 <a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> <= <span class="vhdllogic">6'd32</span>; <a name="l00378"></a>00378 <span class="vhdlkeyword">end</span> <a name="l00379"></a>00379 <span class="vhdlkeyword">end</span> <a name="l00380"></a>00380 <span class="keyword">// write data</span> <a name="l00381"></a>00381 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a4a9cbcff521512b43f34b3d32fc38bf7">buffer_counter</a> == <span class="vhdllogic">9'd0</span> && <a class="code" href="classocs__floppy.html#aaa387cff72e383297a6bffbf2b6ac93c">start_read</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#ae5a8face33fcca95a4d7115fd93435e5">active_write</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00382"></a>00382 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#ad2843a35c05f87938a92521aac7d8e05">start_write</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <span class="vhdllogic">12'd0</span>; <a name="l00383"></a>00383 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a1d13e3c8171d7e774d3a372d14f8860f">enable_write</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> <= <a class="code" href="classocs__floppy.html#a6387465b8aa0684a2c8df27375d335de">buffer_addr</a> + <span class="vhdllogic">12'd1</span>; <a name="l00384"></a>00384 <span class="vhdlkeyword">end</span> <a name="l00385"></a>00385 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span> <a name="l00386"></a>00386 <a class="code" href="classocs__floppy.html#ac11b338c914d9358945342519a33c208">output_shift_cnt</a> <= <span class="vhdllogic">5'd0</span>; <a name="l00387"></a>00387 <a class="code" href="classocs__floppy.html#a3d3e3794d685982c4f364fe00985306c">output_line_cnt</a> <= <span class="vhdllogic">6'd0</span>; <a name="l00388"></a>00388 <span class="vhdlkeyword">end</span> <a name="l00389"></a>00389 <a name="l00390"></a>00390 <span class="vhdlkeyword">end</span> <a name="l00391"></a>00391 <span class="vhdlkeyword">end</span> <a name="l00392"></a>00392 <a name="l00393"></a>00393 <span class="keyword">//*********************************** FLOPPY BUFFER end</span> <a name="l00394"></a>00394 <a name="l00395"></a>00395 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#ad3e6bb748265fb31ffdab5ac96ca67d6">debug_track</a> = { <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a> }; <a name="l00396"></a>00396 <a name="l00397"></a>00397 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#acaf2e3b11d3fba3dd68852f92dee46e4">debug_floppy</a> = { <a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">last_fl_side_n</a>, <a class="code" href="classocs__floppy.html#a6ffc455dd98f4c81dd4185a7db2589fd">adk_con</a>[<span class="vhdllogic">10</span>], <a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a>, <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> > <span class="vhdllogic">4'd7</span>, <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> }; <a name="l00398"></a>00398 <a name="l00399"></a>00399 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#abea81bafad5afe28e0047b9ed47f2907">fl_tk0_n</a> = (<a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a> == <span class="vhdllogic">4'b1110</span> && <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a> == <span class="vhdllogic">7'd0</span>)? <span class="vhdllogic">1'b0</span> : <span class="vhdllogic">1'b1</span>; <a name="l00400"></a>00400 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#a098f578b23d7b89225cf8f860884f4c2">fl_wpro_n</a> = (<a class="code" href="classocs__floppy.html#a278d37dd050c6db2ea87c024a4093712">floppy_inserted</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a> == <span class="vhdllogic">4'b1110</span>)? <a class="code" href="classocs__floppy.html#a32a40e587785665b2ce894ad323dd512">floppy_write_enabled</a> : <span class="vhdllogic">1'b1</span>; <a name="l00401"></a>00401 <span class="keyword">//id bit = 1 for internal drive</span> <a name="l00402"></a>00402 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#a27d2b7f381c56360248760ce751b397e">fl_rdy_n</a> = (<a class="code" href="classocs__floppy.html#a278d37dd050c6db2ea87c024a4093712">floppy_inserted</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a> == <span class="vhdllogic">4'b1110</span> && <a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">motor_spinup_delay</a> == <span class="vhdllogic">15'd32767</span>)? <span class="vhdllogic">1'b0</span> : <span class="vhdllogic">1'b1</span>; <a name="l00403"></a>00403 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#a62cc09e2539c911b9b65397125241579">fl_chng_n</a> = (<a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a> == <span class="vhdllogic">4'b1110</span>)? <a class="code" href="classocs__floppy.html#ad15c2c7904cd5e146c7b2653b1ac47e7">reg_fl_chng_n</a> : <span class="vhdllogic">1'b1</span>; <a name="l00404"></a>00404 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#a471f82561af3d45590ce23f34f622c10">fl_index_n</a> = (<a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a> == <span class="vhdllogic">4'b1110</span>)? <a class="code" href="classocs__floppy.html#ac60e4762354537959deff934d5b47b5d">reg_fl_index_n</a> : <span class="vhdllogic">1'b1</span>; <a name="l00405"></a>00405 <a name="l00406"></a><a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">00406</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">6</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a>; <a name="l00407"></a><a class="code" href="classocs__floppy.html#ab908766a662a04dd1df536e8546f7a81">00407</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#ab908766a662a04dd1df536e8546f7a81">last_fl_step_n</a>; <a name="l00408"></a><a class="code" href="classocs__floppy.html#a6b0af04627b737ff6a5f2c3683685500">00408</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a6b0af04627b737ff6a5f2c3683685500">floppy_pos_changed</a>; <a name="l00409"></a><a class="code" href="classocs__floppy.html#ae62020049c80e87422c424f55ca306e6">00409</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ae62020049c80e87422c424f55ca306e6">last_fl_sel_n</a>; <a name="l00410"></a><a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">00410</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">last_fl_side_n</a>; <a name="l00411"></a>00411 <a name="l00412"></a><a class="code" href="classocs__floppy.html#ad15c2c7904cd5e146c7b2653b1ac47e7">00412</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#ad15c2c7904cd5e146c7b2653b1ac47e7">reg_fl_chng_n</a>; <a name="l00413"></a><a class="code" href="classocs__floppy.html#ac60e4762354537959deff934d5b47b5d">00413</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#ac60e4762354537959deff934d5b47b5d">reg_fl_index_n</a>; <a name="l00414"></a><a class="code" href="classocs__floppy.html#a8aebbc5a05d9bb5f3a9854eec1912de7">00414</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a8aebbc5a05d9bb5f3a9854eec1912de7">reg_fl_mtr_n</a>; <a name="l00415"></a>00415 <a name="l00416"></a><a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">00416</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">14</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">motor_spinup_delay</a>; <a name="l00417"></a>00417 <a name="l00418"></a><a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">00418</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>; <a name="l00419"></a><a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">00419</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>; <a name="l00420"></a><a class="code" href="classocs__floppy.html#a086bf634a7352e7e6b86c9be625badbd">00420</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a086bf634a7352e7e6b86c9be625badbd">dsksync</a>; <a name="l00421"></a><a class="code" href="classocs__floppy.html#aa2700b6f02679a63ffc752ebd3554a09">00421</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#aa2700b6f02679a63ffc752ebd3554a09">last_dma_secondary</a>; <a name="l00422"></a><a class="code" href="classocs__floppy.html#a363e00f7dd9bb4da2ce9ce84fbe53415">00422</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a363e00f7dd9bb4da2ce9ce84fbe53415">dma_started</a>; <a name="l00423"></a>00423 <a name="l00424"></a><a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">00424</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a>; <a name="l00425"></a>00425 <a name="l00426"></a><a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">00426</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a>; <a name="l00427"></a>00427 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a> = <a name="l00428"></a>00428 <a class="code" href="classocs__floppy.html#aa2700b6f02679a63ffc752ebd3554a09">last_dma_secondary</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">15</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#aee11ed79f33e9d4a8288ffa91f4b7657">dma_con</a>[<span class="vhdllogic">9</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#aee11ed79f33e9d4a8288ffa91f4b7657">dma_con</a>[<span class="vhdllogic">4</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] != <span class="vhdllogic">14'd0</span>; <a name="l00429"></a>00429 <a name="l00430"></a><a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">00430</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">5</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">byte_dsksync</a>; <a name="l00431"></a><a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">00431</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">2</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a>; <a name="l00432"></a>00432 <a name="l00433"></a>00433 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#ae66e3f35772968f283c67ebf13dcad1c">na_dskbytr</a> = { <a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> != <span class="vhdllogic">3'd0</span>, <a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a>, <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">14</span>], <a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">byte_dsksync</a> != <span class="vhdllogic">6'd0</span>, <a name="l00434"></a>00434 (<a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> == <span class="vhdllogic">3'd1</span>)? <a class="code" href="classocs__floppy.html#a4ae6c1edab9d5c6d4dc4c4fa5dda8e98">output_long_word</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] : <a name="l00435"></a>00435 (<a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> == <span class="vhdllogic">3'd2</span>)? <a class="code" href="classocs__floppy.html#a4ae6c1edab9d5c6d4dc4c4fa5dda8e98">output_long_word</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] : <a name="l00436"></a>00436 (<a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> == <span class="vhdllogic">3'd3</span>)? <a class="code" href="classocs__floppy.html#a4ae6c1edab9d5c6d4dc4c4fa5dda8e98">output_long_word</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] : <a name="l00437"></a>00437 <a class="code" href="classocs__floppy.html#a4ae6c1edab9d5c6d4dc4c4fa5dda8e98">output_long_word</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <a name="l00438"></a>00438 }; <a name="l00439"></a>00439 <a name="l00440"></a><a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">00440</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a>; <a name="l00441"></a><a class="code" href="classocs__floppy.html#a4eaab0784ab9ad425f64da06cf414040">00441</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a4eaab0784ab9ad425f64da06cf414040">last_substate</a>; <a name="l00442"></a><a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">00442</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a>; <a name="l00443"></a><a class="code" href="classocs__floppy.html#a21462de16f63251af1d3057a9d742338">00443</a> <span class="vhdlkeyword">reg</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a21462de16f63251af1d3057a9d742338">last_state</a>; <a name="l00444"></a><a class="code" href="classocs__floppy.html#a8fff34ac85ed0dd22a4cfd53d0ae1491">00444</a> <span class="vhdlkeyword">parameter</span> [<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] <a name="l00445"></a>00445 <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a> = <span class="vhdllogic">4'd0</span>, <a name="l00446"></a>00446 <a class="code" href="classocs__floppy.html#af2086d1890f197bb0db796adcedc8072">S_READ_FROM_SD</a> = <span class="vhdllogic">4'd1</span>, <a name="l00447"></a>00447 <a class="code" href="classocs__floppy.html#ac751611aee7d65fe81b83bbb724c04ca">S_READ_READY_0</a> = <span class="vhdllogic">4'd2</span>, <a name="l00448"></a>00448 <a class="code" href="classocs__floppy.html#ab4e37f69fd3e043863c4ac49c56e9ba7">S_READ_READY_1</a> = <span class="vhdllogic">4'd3</span>, <a name="l00449"></a>00449 <a class="code" href="classocs__floppy.html#aebfce2c5aed1a61c1424dbeae8bbc84f">S_WRITE_CONVERT_0</a> = <span class="vhdllogic">4'd4</span>, <a name="l00450"></a>00450 <a class="code" href="classocs__floppy.html#a99474f073eb26c43bb8f6aad3487e62f">S_WRITE_CONVERT_1</a> = <span class="vhdllogic">4'd5</span>, <a name="l00451"></a>00451 <a class="code" href="classocs__floppy.html#aed2f3750f90dc2e3832a090ebad53d51">S_WRITE_CONVERT_2</a> = <span class="vhdllogic">4'd6</span>, <a name="l00452"></a>00452 <a class="code" href="classocs__floppy.html#a8fff34ac85ed0dd22a4cfd53d0ae1491">S_WRITE_TO_SD</a> = <span class="vhdllogic">4'd7</span>; <a name="l00453"></a>00453 <a name="l00454"></a>00454 <span class="keyword">// byte position: track*2*11*512 + side*11*512</span> <a name="l00455"></a>00455 <span class="keyword">// sector position: track*2*11 + side*11 = track*2*(8+2+1) + side*(8+2+1) = track*(16+4+2) + side*(8+2+1)</span> <a name="l00456"></a><a class="code" href="classocs__floppy.html#a670d1ce70aba473daf8e57784b5ff17a">00456</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a670d1ce70aba473daf8e57784b5ff17a">sd_track_address</a>; <a name="l00457"></a>00457 <span class="vhdlkeyword">assign</span> <a class="code" href="classocs__floppy.html#a670d1ce70aba473daf8e57784b5ff17a">sd_track_address</a> = <a name="l00458"></a>00458 <a class="code" href="classocs__floppy.html#a29358756464d3d7daa31c2bdfc03e423">floppy_sector</a> + <a name="l00459"></a>00459 { <span class="vhdllogic">21'b0</span>, <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a>, <span class="vhdllogic">4'b0</span> } + <a name="l00460"></a>00460 { <span class="vhdllogic">23'b0</span>, <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a>, <span class="vhdllogic">2'b0</span> } + <a name="l00461"></a>00461 { <span class="vhdllogic">24'b0</span>, <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a>, <span class="vhdllogic">1'b0</span> } + <a name="l00462"></a>00462 { <span class="vhdllogic">28'b0</span>, ~<a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">last_fl_side_n</a>, <span class="vhdllogic">3'b0</span> } + <a name="l00463"></a>00463 { <span class="vhdllogic">30'b0</span>, ~<a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">last_fl_side_n</a>, <span class="vhdllogic">1'b0</span> } + <a name="l00464"></a>00464 { <span class="vhdllogic">31'b0</span>, ~<a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">last_fl_side_n</a> }; <a name="l00465"></a>00465 <a name="l00466"></a><a class="code" href="classocs__floppy.html#a5ee89d2c675b03abc9a1179b2aff5bd2">00466</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a5ee89d2c675b03abc9a1179b2aff5bd2">mfm_decoder_odd_30_16</a> = { <a name="l00467"></a>00467 <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">30</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">28</span>], <span class="vhdllogic">1'b0</span>, <a name="l00468"></a>00468 <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">26</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">24</span>], <span class="vhdllogic">1'b0</span>, <a name="l00469"></a>00469 <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">22</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">20</span>], <span class="vhdllogic">1'b0</span>, <a name="l00470"></a>00470 <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">18</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">16</span>], <span class="vhdllogic">1'b0</span> <a name="l00471"></a>00471 }; <a name="l00472"></a><a class="code" href="classocs__floppy.html#ae2f27853b2e5e10509ac3f3d77a04fa9">00472</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#ae2f27853b2e5e10509ac3f3d77a04fa9">mfm_decoder_odd_14_0</a> = { <a name="l00473"></a>00473 <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">12</span>], <span class="vhdllogic">1'b0</span>, <a name="l00474"></a>00474 <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">10</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">8</span>], <span class="vhdllogic">1'b0</span>, <a name="l00475"></a>00475 <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">6</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">4</span>], <span class="vhdllogic">1'b0</span>, <a name="l00476"></a>00476 <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">2</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span> <a name="l00477"></a>00477 }; <a name="l00478"></a><a class="code" href="classocs__floppy.html#a153c1e8f95cb1deab856078ebf7e7886">00478</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a153c1e8f95cb1deab856078ebf7e7886">mfm_decoder_even_30_16</a> = { <a name="l00479"></a>00479 <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">30</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">28</span>], <a name="l00480"></a>00480 <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">26</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">24</span>], <a name="l00481"></a>00481 <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">22</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">20</span>], <a name="l00482"></a>00482 <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">18</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">16</span>] <a name="l00483"></a>00483 }; <a name="l00484"></a><a class="code" href="classocs__floppy.html#a3e771df09549c282051c064bf1aba67b">00484</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#a3e771df09549c282051c064bf1aba67b">mfm_decoder_even_14_0</a> = { <a name="l00485"></a>00485 <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">14</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">12</span>], <a name="l00486"></a>00486 <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">10</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">8</span>], <a name="l00487"></a>00487 <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">6</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">4</span>], <a name="l00488"></a>00488 <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">2</span>], <span class="vhdllogic">1'b0</span>, <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">0</span>] <a name="l00489"></a>00489 }; <a name="l00490"></a><a class="code" href="classocs__floppy.html#abf36e555d483fcbdcd5cad8989fcb186">00490</a> <span class="vhdlkeyword">wire</span> [<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] <a class="code" href="classocs__floppy.html#abf36e555d483fcbdcd5cad8989fcb186">dskptr_sum</a> = <a name="l00491"></a>00491 (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd0</span>)? <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd0</span> : <a name="l00492"></a>00492 (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd1</span>)? <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd2</span> : <a name="l00493"></a>00493 (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd2</span>)? <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd512</span> : <a name="l00494"></a>00494 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd514</span>; <a name="l00495"></a>00495 <a name="l00496"></a><a class="code" href="classocs__floppy.html#aaa387cff72e383297a6bffbf2b6ac93c">00496</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#aaa387cff72e383297a6bffbf2b6ac93c">start_read</a> = (<a class="code" href="classocs__floppy.html#a21462de16f63251af1d3057a9d742338">last_state</a> == <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a> && <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#af2086d1890f197bb0db796adcedc8072">S_READ_FROM_SD</a>); <a name="l00497"></a><a class="code" href="classocs__floppy.html#ad2843a35c05f87938a92521aac7d8e05">00497</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#ad2843a35c05f87938a92521aac7d8e05">start_write</a> = (<a class="code" href="classocs__floppy.html#a21462de16f63251af1d3057a9d742338">last_state</a> == <a class="code" href="classocs__floppy.html#a99474f073eb26c43bb8f6aad3487e62f">S_WRITE_CONVERT_1</a> && <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#aed2f3750f90dc2e3832a090ebad53d51">S_WRITE_CONVERT_2</a>); <a name="l00498"></a><a class="code" href="classocs__floppy.html#ae5a8face33fcca95a4d7115fd93435e5">00498</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#ae5a8face33fcca95a4d7115fd93435e5">active_write</a> = (<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#aed2f3750f90dc2e3832a090ebad53d51">S_WRITE_CONVERT_2</a> || <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#a8fff34ac85ed0dd22a4cfd53d0ae1491">S_WRITE_TO_SD</a>); <a name="l00499"></a><a class="code" href="classocs__floppy.html#a1d13e3c8171d7e774d3a372d14f8860f">00499</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#a1d13e3c8171d7e774d3a372d14f8860f">enable_write</a> = (<a class="code" href="classocs__floppy.html#a21462de16f63251af1d3057a9d742338">last_state</a> == <a class="code" href="classocs__floppy.html#aed2f3750f90dc2e3832a090ebad53d51">S_WRITE_CONVERT_2</a> && <a class="code" href="classocs__floppy.html#a4eaab0784ab9ad425f64da06cf414040">last_substate</a> == <span class="vhdllogic">4'd3</span> && <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd0</span>); <a name="l00500"></a><a class="code" href="classocs__floppy.html#a80c75bc69387e7c4c11e65dac539822b">00500</a> <span class="vhdlkeyword">wire</span> <a class="code" href="classocs__floppy.html#a80c75bc69387e7c4c11e65dac539822b">dsksync_halt</a> = (<a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a>[<span class="vhdllogic">47</span>:<span class="vhdllogic">32</span>] == <a class="code" href="classocs__floppy.html#a086bf634a7352e7e6b86c9be625badbd">dsksync</a> && <a class="code" href="classocs__floppy.html#a363e00f7dd9bb4da2ce9ce84fbe53415">dma_started</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#ad508b48342f6baafb3e7be4f7c59a700">output_shifting</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">14</span>] == <span class="vhdllogic">1'b0</span>); <a name="l00501"></a><a class="code" href="classocs__floppy.html#a1df5f86e2cf0e712ef91aae6923127ab">00501</a> <span class="vhdlkeyword">reg</span> <a class="code" href="classocs__floppy.html#a1df5f86e2cf0e712ef91aae6923127ab">last_dsksync_halt</a>; <a name="l00502"></a>00502 <a name="l00503"></a><a class="code" href="classocs__floppy.html#abd8dbc2c213ff4d398e86e76d688ac0c">00503</a> <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classocs__floppy.html#aa59dd5f9a7196661777b60e06cf878f9">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classocs__floppy.html#a3bc40dbbffe5810c22c38f0a2bc1854a">reset_n</a>) <span class="vhdlkeyword">begin</span> <a name="l00504"></a>00504 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a3bc40dbbffe5810c22c38f0a2bc1854a">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00505"></a>00505 <a class="code" href="classocs__floppy.html#a2795ec2c9748257e1892f6bdcbdab1a7">floppy_error</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00506"></a>00506 <a name="l00507"></a>00507 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00508"></a>00508 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00509"></a>00509 <a class="code" href="classocs__floppy.html#a1f985010285312b1615d8f7d2a5e9b35">WE_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00510"></a>00510 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <span class="vhdllogic">30'd0</span>; <a name="l00511"></a>00511 <a class="code" href="classocs__floppy.html#ac3fb5d485e04699de5ba746c40df0b72">SEL_O</a> <= <span class="vhdllogic">4'b0000</span>; <a name="l00512"></a>00512 <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a> <= <span class="vhdllogic">32'd0</span>; <a name="l00513"></a>00513 <a class="code" href="classocs__floppy.html#a6f126d6f47e96fb78fcbbb5592e9c044">ACK_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00514"></a>00514 <a name="l00515"></a>00515 <a class="code" href="classocs__floppy.html#aae7a1c46c55664f93d5e2290af2cd649">floppy_syn_irq</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00516"></a>00516 <a class="code" href="classocs__floppy.html#a6da684cd8a2642a5ce53cdfe7838583c">floppy_blk_irq</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00517"></a>00517 <a name="l00518"></a>00518 <a class="code" href="classocs__floppy.html#ad15c2c7904cd5e146c7b2653b1ac47e7">reg_fl_chng_n</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00519"></a>00519 <a class="code" href="classocs__floppy.html#ac60e4762354537959deff934d5b47b5d">reg_fl_index_n</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00520"></a>00520 <a class="code" href="classocs__floppy.html#a8aebbc5a05d9bb5f3a9854eec1912de7">reg_fl_mtr_n</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00521"></a>00521 <a name="l00522"></a>00522 <a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">motor_spinup_delay</a> <= <span class="vhdllogic">15'd0</span>; <a name="l00523"></a>00523 <a name="l00524"></a>00524 <a class="code" href="classocs__floppy.html#ab908766a662a04dd1df536e8546f7a81">last_fl_step_n</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00525"></a>00525 <a class="code" href="classocs__floppy.html#ae62020049c80e87422c424f55ca306e6">last_fl_sel_n</a> <= <span class="vhdllogic">4'b1111</span>; <a name="l00526"></a>00526 <a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">last_fl_side_n</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00527"></a>00527 <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a> <= <span class="vhdllogic">7'd0</span>; <a name="l00528"></a>00528 <a class="code" href="classocs__floppy.html#a6b0af04627b737ff6a5f2c3683685500">floppy_pos_changed</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00529"></a>00529 <a name="l00530"></a>00530 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <span class="vhdllogic">32'd0</span>; <a name="l00531"></a>00531 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a> <= <span class="vhdllogic">16'd0</span>; <a name="l00532"></a>00532 <a class="code" href="classocs__floppy.html#a086bf634a7352e7e6b86c9be625badbd">dsksync</a> <= <span class="vhdllogic">16'd0</span>; <a name="l00533"></a>00533 <a class="code" href="classocs__floppy.html#aa2700b6f02679a63ffc752ebd3554a09">last_dma_secondary</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00534"></a>00534 <a name="l00535"></a>00535 <a class="code" href="classocs__floppy.html#a363e00f7dd9bb4da2ce9ce84fbe53415">dma_started</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00536"></a>00536 <a class="code" href="classocs__floppy.html#a1df5f86e2cf0e712ef91aae6923127ab">last_dsksync_halt</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00537"></a>00537 <a name="l00538"></a>00538 <a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">byte_dsksync</a> <= <span class="vhdllogic">6'd0</span>; <a name="l00539"></a>00539 <a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> <= <span class="vhdllogic">3'd0</span>; <a name="l00540"></a>00540 <a name="l00541"></a>00541 <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a> <= <span class="vhdllogic">32'd0</span>; <a name="l00542"></a>00542 <a name="l00543"></a>00543 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00544"></a>00544 <a class="code" href="classocs__floppy.html#a4eaab0784ab9ad425f64da06cf414040">last_substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00545"></a>00545 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>; <a name="l00546"></a>00546 <a class="code" href="classocs__floppy.html#a21462de16f63251af1d3057a9d742338">last_state</a> <= <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>; <a name="l00547"></a>00547 <span class="vhdlkeyword">end</span> <a name="l00548"></a>00548 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span> <a name="l00549"></a>00549 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a278d37dd050c6db2ea87c024a4093712">floppy_inserted</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a> == <span class="vhdllogic">4'b1110</span> && <a class="code" href="classocs__floppy.html#a75c244d85a988aa2dbe994c3b2b72c49">fl_step_n</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classocs__floppy.html#ad15c2c7904cd5e146c7b2653b1ac47e7">reg_fl_chng_n</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00550"></a>00550 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a278d37dd050c6db2ea87c024a4093712">floppy_inserted</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classocs__floppy.html#ad15c2c7904cd5e146c7b2653b1ac47e7">reg_fl_chng_n</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00551"></a>00551 <a name="l00552"></a>00552 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4'b1110</span>) <span class="vhdlkeyword">begin</span> <a name="l00553"></a>00553 <a class="code" href="classocs__floppy.html#ab908766a662a04dd1df536e8546f7a81">last_fl_step_n</a> <= <a class="code" href="classocs__floppy.html#a75c244d85a988aa2dbe994c3b2b72c49">fl_step_n</a>; <a name="l00554"></a>00554 <a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">last_fl_side_n</a> <= <a class="code" href="classocs__floppy.html#ad36319f3a04a8db854d5c2cbc4b794b3">fl_side_n</a>; <a name="l00555"></a>00555 <span class="vhdlkeyword">end</span> <a name="l00556"></a>00556 <a class="code" href="classocs__floppy.html#ae62020049c80e87422c424f55ca306e6">last_fl_sel_n</a> <= <a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a>; <a name="l00557"></a>00557 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4'b1110</span> && <a class="code" href="classocs__floppy.html#ab908766a662a04dd1df536e8546f7a81">last_fl_step_n</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#a75c244d85a988aa2dbe994c3b2b72c49">fl_step_n</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00558"></a>00558 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a2b434d2dbc2cc270ea653a18f03ef61f">fl_dir</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a> < <span class="vhdllogic">7'd79</span>) <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a> <= <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a> + <span class="vhdllogic">7'd1</span>; <a name="l00559"></a>00559 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a2b434d2dbc2cc270ea653a18f03ef61f">fl_dir</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a> > <span class="vhdllogic">7'd0</span>) <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a> <= <a class="code" href="classocs__floppy.html#a23b3bf056cdad81f6be6f0c13c113e49">track</a> - <span class="vhdllogic">7'd1</span>; <a name="l00560"></a>00560 <span class="vhdlkeyword">end</span> <a name="l00561"></a>00561 <a name="l00562"></a>00562 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#ae62020049c80e87422c424f55ca306e6">last_fl_sel_n</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span>) <a class="code" href="classocs__floppy.html#a8aebbc5a05d9bb5f3a9854eec1912de7">reg_fl_mtr_n</a> <= <a class="code" href="classocs__floppy.html#a5fc0bcaad87e96bb5d4d33841cbe7329">fl_mtr_n</a>; <a name="l00563"></a>00563 <a name="l00564"></a>00564 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a8aebbc5a05d9bb5f3a9854eec1912de7">reg_fl_mtr_n</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">motor_spinup_delay</a> <= <span class="vhdllogic">15'd0</span>; <a name="l00565"></a>00565 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a8aebbc5a05d9bb5f3a9854eec1912de7">reg_fl_mtr_n</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">motor_spinup_delay</a> < <span class="vhdllogic">15'd32767</span>) <a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">motor_spinup_delay</a> <= <a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">motor_spinup_delay</a> + <span class="vhdllogic">15'd1</span>; <a name="l00566"></a>00566 <a name="l00567"></a>00567 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a>[<span class="vhdllogic">3</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">4'b1110</span> && ((<a class="code" href="classocs__floppy.html#ab908766a662a04dd1df536e8546f7a81">last_fl_step_n</a> == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#a75c244d85a988aa2dbe994c3b2b72c49">fl_step_n</a> == <span class="vhdllogic">1'b1</span>) || (<a class="code" href="classocs__floppy.html#a159309b86e1f9aacb0a0b8907d1999e8">last_fl_side_n</a> != <a class="code" href="classocs__floppy.html#ad36319f3a04a8db854d5c2cbc4b794b3">fl_side_n</a>))) <a name="l00568"></a>00568 <a class="code" href="classocs__floppy.html#a6b0af04627b737ff6a5f2c3683685500">floppy_pos_changed</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00569"></a>00569 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#ac751611aee7d65fe81b83bbb724c04ca">S_READ_READY_0</a>) <a class="code" href="classocs__floppy.html#a6b0af04627b737ff6a5f2c3683685500">floppy_pos_changed</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00570"></a>00570 <a name="l00571"></a>00571 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a363e00f7dd9bb4da2ce9ce84fbe53415">dma_started</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classocs__floppy.html#a363e00f7dd9bb4da2ce9ce84fbe53415">dma_started</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00572"></a>00572 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a2795ec2c9748257e1892f6bdcbdab1a7">floppy_error</a> == <span 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href="classocs__floppy.html#ac60e4762354537959deff934d5b47b5d">reg_fl_index_n</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classocs__floppy.html#ac60e4762354537959deff934d5b47b5d">reg_fl_index_n</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00576"></a>00576 <a name="l00577"></a>00577 <a name="l00578"></a>00578 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aae7a1c46c55664f93d5e2290af2cd649">floppy_syn_irq</a> == <span class="vhdllogic">1'b1</span>) <a name="l00579"></a>00579 <a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">byte_dsksync</a> <= <span class="vhdllogic">6'd1</span>; <a name="l00580"></a>00580 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">byte_dsksync</a> == <span class="vhdllogic">6'd61</span> || <a class="code" href="classocs__floppy.html#a278d37dd050c6db2ea87c024a4093712">floppy_inserted</a> == <span class="vhdllogic">1'b0</span> || <a class="code" href="classocs__floppy.html#a8aebbc5a05d9bb5f3a9854eec1912de7">reg_fl_mtr_n</a> == <span class="vhdllogic">1'b1</span> || <a class="code" href="classocs__floppy.html#af9d376edb999fa1d2707d3163090c348">fl_sel_n</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <a name="l00581"></a>00581 <a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">byte_dsksync</a> <= <span class="vhdllogic">6'd0</span>; <a name="l00582"></a>00582 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">byte_dsksync</a> != <span class="vhdllogic">6'd0</span>) <a name="l00583"></a>00583 <a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">byte_dsksync</a> <= <a class="code" href="classocs__floppy.html#ad98eb547b6b24ae45460548fd5d743cf">byte_dsksync</a> + <span class="vhdllogic">6'd1</span>; <a name="l00584"></a>00584 <a name="l00585"></a>00585 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a74e8dc8342f7b2f66fcac28ff789ed24">na_dskbytr_read</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> > <span class="vhdllogic">3'd0</span> && <a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> < <span class="vhdllogic">3'd4</span>) <a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> <= <a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> + <span class="vhdllogic">3'd1</span>; <a name="l00586"></a>00586 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a74e8dc8342f7b2f66fcac28ff789ed24">na_dskbytr_read</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> <= <span class="vhdllogic">3'd0</span>; <a name="l00587"></a>00587 <a name="l00588"></a>00588 <a class="code" href="classocs__floppy.html#a21462de16f63251af1d3057a9d742338">last_state</a> <= <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a>; <a name="l00589"></a>00589 <a class="code" href="classocs__floppy.html#a4eaab0784ab9ad425f64da06cf414040">last_substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a>; <a name="l00590"></a>00590 <a class="code" href="classocs__floppy.html#a1df5f86e2cf0e712ef91aae6923127ab">last_dsksync_halt</a> <= <a class="code" href="classocs__floppy.html#a80c75bc69387e7c4c11e65dac539822b">dsksync_halt</a>; <a name="l00591"></a>00591 <a name="l00592"></a>00592 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a983e19413188cc770cb065317d223c6b">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a1a6040dd02f4cf32512df0583c28ee27">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a6f126d6f47e96fb78fcbbb5592e9c044">ACK_O</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classocs__floppy.html#a6f126d6f47e96fb78fcbbb5592e9c044">ACK_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00593"></a>00593 <span class="vhdlkeyword">else</span> <a class="code" href="classocs__floppy.html#a6f126d6f47e96fb78fcbbb5592e9c044">ACK_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00594"></a>00594 <a name="l00595"></a>00595 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a983e19413188cc770cb065317d223c6b">CYC_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a1a6040dd02f4cf32512df0583c28ee27">STB_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a7be863139d9642bebbea1a694a19b6d9">WE_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a6f126d6f47e96fb78fcbbb5592e9c044">ACK_O</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00596"></a>00596 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h020</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">slave_DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>]; <a name="l00597"></a>00597 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h020</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">slave_DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>]; <a name="l00598"></a>00598 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h020</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] <= <a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">slave_DAT_I</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>]; <a name="l00599"></a>00599 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h020</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] <= <a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">slave_DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>]; <a name="l00600"></a>00600 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h024</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) ; <a name="l00601"></a>00601 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h024</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) ; <a name="l00602"></a>00602 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h024</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">slave_DAT_I</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>]; <a name="l00603"></a>00603 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h024</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">slave_DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>]; <a name="l00604"></a>00604 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h07C</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a086bf634a7352e7e6b86c9be625badbd">dsksync</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">slave_DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>]; <a name="l00605"></a>00605 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h07C</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#a086bf634a7352e7e6b86c9be625badbd">dsksync</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] <= <a class="code" href="classocs__floppy.html#a542c781db4de974010770b4b4bd57149">slave_DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>]; <a name="l00606"></a>00606 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h07C</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) ; <a name="l00607"></a>00607 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h07C</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1'b1</span>) ; <a name="l00608"></a>00608 <a name="l00609"></a>00609 <span class="vhdlkeyword">if</span>({ <a class="code" href="classocs__floppy.html#a2a896e8cb57e95843ff33ba2cd399b71">ADR_I</a>, <span class="vhdllogic">2'b0</span> } == <span class="vhdllogic">9'h024</span> && <a class="code" href="classocs__floppy.html#a9242f76b4ad647a34f9e8fe5dd0dd19e">SEL_I</a>[<span class="vhdllogic">3</span>] == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#aa2700b6f02679a63ffc752ebd3554a09">last_dma_secondary</a> <= <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">15</span>]; <a name="l00610"></a>00610 <span class="vhdlkeyword">end</span> <a name="l00611"></a>00611 <a name="l00612"></a>00612 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>) <span class="vhdlkeyword">begin</span> <a name="l00613"></a>00613 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a> == <span class="vhdllogic">1'b1</span> || (<a class="code" href="classocs__floppy.html#a278d37dd050c6db2ea87c024a4093712">floppy_inserted</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">motor_spinup_delay</a> != <span class="vhdllogic">15'd0</span>)) <span class="vhdlkeyword">begin</span> <a name="l00614"></a>00614 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <span class="vhdllogic">30'h4000400</span>; <span class="keyword">// 0x10001000, sd</span> <a name="l00615"></a>00615 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00616"></a>00616 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#af2086d1890f197bb0db796adcedc8072">S_READ_FROM_SD</a>; <a name="l00617"></a>00617 <span class="vhdlkeyword">end</span> <a name="l00618"></a>00618 <span class="vhdlkeyword">end</span> <a name="l00619"></a>00619 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#af2086d1890f197bb0db796adcedc8072">S_READ_FROM_SD</a>) <span class="vhdlkeyword">begin</span> <a name="l00620"></a>00620 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00621"></a>00621 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00622"></a>00622 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00623"></a>00623 <a name="l00624"></a>00624 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> < <span class="vhdllogic">4'd3</span>) <span class="vhdlkeyword">begin</span> <a name="l00625"></a>00625 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> + <span class="vhdllogic">4'd1</span>; <a name="l00626"></a>00626 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> + <span class="vhdllogic">30'd1</span>; <a name="l00627"></a>00627 <span class="vhdlkeyword">end</span> <a name="l00628"></a>00628 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd3</span>) <span class="vhdlkeyword">begin</span> <a name="l00629"></a>00629 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> + <span class="vhdllogic">4'd1</span>; <a name="l00630"></a>00630 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <span class="vhdllogic">30'h04000400</span>; <span class="keyword">// 0x10001000, sd read state</span> <a name="l00631"></a>00631 <span class="vhdlkeyword">end</span> <a name="l00632"></a>00632 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> >= <span class="vhdllogic">4'd4</span> && <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a> == <span class="vhdllogic">32'd5</span>) <span class="vhdlkeyword">begin</span> <a name="l00633"></a>00633 <a class="code" href="classocs__floppy.html#a2795ec2c9748257e1892f6bdcbdab1a7">floppy_error</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00634"></a>00634 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00635"></a>00635 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>; <a name="l00636"></a>00636 <span class="vhdlkeyword">end</span> <a name="l00637"></a>00637 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd4</span> && <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a> == <span class="vhdllogic">32'd3</span>) <span class="vhdlkeyword">begin</span> <a name="l00638"></a>00638 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> + <span class="vhdllogic">4'd1</span>; <a name="l00639"></a>00639 <span class="vhdlkeyword">end</span> <a name="l00640"></a>00640 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd5</span> && <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a> == <span class="vhdllogic">32'd2</span>) <span class="vhdlkeyword">begin</span> <a name="l00641"></a>00641 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00642"></a>00642 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#ac751611aee7d65fe81b83bbb724c04ca">S_READ_READY_0</a>; <a name="l00643"></a>00643 <span class="vhdlkeyword">end</span> <a name="l00644"></a>00644 <span class="vhdlkeyword">end</span> <a name="l00645"></a>00645 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00646"></a>00646 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00647"></a>00647 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00648"></a>00648 <a class="code" href="classocs__floppy.html#a1f985010285312b1615d8f7d2a5e9b35">WE_O</a> <= (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd3</span>)? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>; <a name="l00649"></a>00649 <a class="code" href="classocs__floppy.html#ac3fb5d485e04699de5ba746c40df0b72">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>; <a name="l00650"></a>00650 <span class="keyword">// ADR_O <= ADR_O</span> <a name="l00651"></a>00651 <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a> <= <a name="l00652"></a>00652 (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd0</span>)? <span class="vhdllogic">32'h10004000</span> : <span class="keyword">// base address</span> <a name="l00653"></a>00653 (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd1</span>)? <a class="code" href="classocs__floppy.html#a670d1ce70aba473daf8e57784b5ff17a">sd_track_address</a> : <span class="keyword">// sd sector number</span> <a name="l00654"></a>00654 (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd2</span>)? <span class="vhdllogic">32'd11</span> : <span class="keyword">// read sector size</span> <a name="l00655"></a>00655 <span class="vhdllogic">32'd2</span>; <span class="keyword">// start sd read</span> <a name="l00656"></a>00656 <span class="vhdlkeyword">end</span> <a name="l00657"></a>00657 <span class="vhdlkeyword">end</span> <a name="l00658"></a>00658 <a name="l00659"></a>00659 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#ac751611aee7d65fe81b83bbb724c04ca">S_READ_READY_0</a>) <span class="vhdlkeyword">begin</span> <a name="l00660"></a>00660 <a name="l00661"></a>00661 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a6b0af04627b737ff6a5f2c3683685500">floppy_pos_changed</a> == <span class="vhdllogic">1'b1</span> || (<a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a> == <span class="vhdllogic">1'b0</span> && (<a class="code" href="classocs__floppy.html#a278d37dd050c6db2ea87c024a4093712">floppy_inserted</a> == <span class="vhdllogic">1'b0</span> || <a class="code" href="classocs__floppy.html#a6ce6ee60249752b6760a652fb1bc3ab1">motor_spinup_delay</a> == <span class="vhdllogic">15'd0</span>))) <span class="vhdlkeyword">begin</span> <a name="l00662"></a>00662 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>; <a name="l00663"></a>00663 <span class="vhdlkeyword">end</span> <a name="l00664"></a>00664 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">14</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00665"></a>00665 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00666"></a>00666 <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a> <= <span class="vhdllogic">32'd0</span>; <a name="l00667"></a>00667 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#aebfce2c5aed1a61c1424dbeae8bbc84f">S_WRITE_CONVERT_0</a>; <a name="l00668"></a>00668 <span class="vhdlkeyword">end</span> <a name="l00669"></a>00669 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span> <a name="l00670"></a>00670 <a name="l00671"></a>00671 <a name="l00672"></a>00672 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeedd5e31546527cd82c463fa90b36db6">output_index</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#ac60e4762354537959deff934d5b47b5d">reg_fl_index_n</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00673"></a>00673 <a name="l00674"></a>00674 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#ac8de88f8da01e1e1704d4c184524378d">output_shifted</a> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classocs__floppy.html#afe3fc9f8103816c30bfb05800687535f">byte_counter</a> <= <span class="vhdllogic">3'd1</span>; <a name="l00675"></a>00675 <a name="l00676"></a>00676 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a7c2106ad96056c6a9f1c963b34ed9dd2">output_shift</a>[<span class="vhdllogic">47</span>:<span class="vhdllogic">32</span>] == <a class="code" href="classocs__floppy.html#a086bf634a7352e7e6b86c9be625badbd">dsksync</a> && <a class="code" href="classocs__floppy.html#ad508b48342f6baafb3e7be4f7c59a700">output_shifting</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#aae7a1c46c55664f93d5e2290af2cd649">floppy_syn_irq</a> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classocs__floppy.html#aae7a1c46c55664f93d5e2290af2cd649">floppy_syn_irq</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00677"></a>00677 <a name="l00678"></a>00678 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#ac8de88f8da01e1e1704d4c184524378d">output_shifted</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a83dde421fd033860f31b0c83c655dd41">dma_active</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">14</span>] == <span class="vhdllogic">1'b0</span> && (<a class="code" href="classocs__floppy.html#a6ffc455dd98f4c81dd4185a7db2589fd">adk_con</a>[<span class="vhdllogic">10</span>] == <span class="vhdllogic">1'b0</span> || <a class="code" href="classocs__floppy.html#a363e00f7dd9bb4da2ce9ce84fbe53415">dma_started</a> == <span class="vhdllogic">1'b1</span>)) <span class="vhdlkeyword">begin</span> <a name="l00679"></a>00679 <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a> <= (<a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <a class="code" href="classocs__floppy.html#a4ae6c1edab9d5c6d4dc4c4fa5dda8e98">output_long_word</a> : { <a class="code" href="classocs__floppy.html#a4ae6c1edab9d5c6d4dc4c4fa5dda8e98">output_long_word</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <a class="code" href="classocs__floppy.html#a4ae6c1edab9d5c6d4dc4c4fa5dda8e98">output_long_word</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] }; <a name="l00680"></a>00680 <a class="code" href="classocs__floppy.html#a363e00f7dd9bb4da2ce9ce84fbe53415">dma_started</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00681"></a>00681 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00682"></a>00682 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#ab4e37f69fd3e043863c4ac49c56e9ba7">S_READ_READY_1</a>; <a name="l00683"></a>00683 <span class="vhdlkeyword">end</span> <a name="l00684"></a>00684 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a80c75bc69387e7c4c11e65dac539822b">dsksync_halt</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00685"></a>00685 <a class="code" href="classocs__floppy.html#a363e00f7dd9bb4da2ce9ce84fbe53415">dma_started</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00686"></a>00686 <span class="vhdlkeyword">end</span> <a name="l00687"></a>00687 <a name="l00688"></a>00688 <span class="vhdlkeyword">end</span> <a name="l00689"></a>00689 <a name="l00690"></a>00690 <span class="vhdlkeyword">end</span> <a name="l00691"></a>00691 <a name="l00692"></a>00692 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#ab4e37f69fd3e043863c4ac49c56e9ba7">S_READ_READY_1</a>) <span class="vhdlkeyword">begin</span> <a name="l00693"></a>00693 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00694"></a>00694 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00695"></a>00695 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00696"></a>00696 <a name="l00697"></a>00697 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd0</span>) <span class="vhdlkeyword">begin</span> <a name="l00698"></a>00698 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd2</span>; <a name="l00699"></a>00699 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] - <span class="vhdllogic">14'd1</span>; <a name="l00700"></a>00700 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">14'd1</span>) <span class="vhdlkeyword">begin</span> <a name="l00701"></a>00701 <a class="code" href="classocs__floppy.html#a6da684cd8a2642a5ce53cdfe7838583c">floppy_blk_irq</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00702"></a>00702 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#ac751611aee7d65fe81b83bbb724c04ca">S_READ_READY_0</a>; <a name="l00703"></a>00703 <span class="vhdlkeyword">end</span> <a name="l00704"></a>00704 <span class="vhdlkeyword">else</span> <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> + <span class="vhdllogic">4'd1</span>; <a name="l00705"></a>00705 <span class="vhdlkeyword">end</span> <a name="l00706"></a>00706 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd1</span>) <span class="vhdlkeyword">begin</span> <a name="l00707"></a>00707 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd2</span>; <a name="l00708"></a>00708 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] - <span class="vhdllogic">14'd1</span>; <a name="l00709"></a>00709 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">14'd1</span>) <a class="code" href="classocs__floppy.html#a6da684cd8a2642a5ce53cdfe7838583c">floppy_blk_irq</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00710"></a>00710 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#ac751611aee7d65fe81b83bbb724c04ca">S_READ_READY_0</a>; <a name="l00711"></a>00711 <span class="vhdlkeyword">end</span> <a name="l00712"></a>00712 <span class="vhdlkeyword">end</span> <a name="l00713"></a>00713 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00714"></a>00714 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00715"></a>00715 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00716"></a>00716 <a class="code" href="classocs__floppy.html#a1f985010285312b1615d8f7d2a5e9b35">WE_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00717"></a>00717 <a class="code" href="classocs__floppy.html#ac3fb5d485e04699de5ba746c40df0b72">SEL_O</a> <= (<a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <span class="vhdllogic">4'b1100</span> : <span class="vhdllogic">4'b0011</span>; <a name="l00718"></a>00718 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>]; <a name="l00719"></a>00719 <span class="vhdlkeyword">end</span> <a name="l00720"></a>00720 <span class="vhdlkeyword">end</span> <a name="l00721"></a>00721 <a name="l00722"></a>00722 <a name="l00723"></a>00723 <a name="l00724"></a>00724 <a name="l00725"></a>00725 <span class="keyword">// start reading till 0x4489</span> <a name="l00726"></a>00726 <span class="keyword">// skip 1*2 bytes</span> <a name="l00727"></a>00727 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#aebfce2c5aed1a61c1424dbeae8bbc84f">S_WRITE_CONVERT_0</a>) <span class="vhdlkeyword">begin</span> <a name="l00728"></a>00728 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00729"></a>00729 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00730"></a>00730 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00731"></a>00731 <a name="l00732"></a>00732 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <span class="vhdllogic">14'd1</span>) <span class="vhdlkeyword">begin</span> <a name="l00733"></a>00733 <a class="code" href="classocs__floppy.html#a6da684cd8a2642a5ce53cdfe7838583c">floppy_blk_irq</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00734"></a>00734 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + { <span class="vhdllogic">17'd0</span>, <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span> }; <a name="l00735"></a>00735 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <span class="vhdllogic">14'd0</span>; <a name="l00736"></a>00736 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00737"></a>00737 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>; <a name="l00738"></a>00738 <span class="vhdlkeyword">end</span> <a name="l00739"></a>00739 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>( (<a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span> && <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] == <span class="vhdllogic">16'h4489</span>) || <a name="l00740"></a>00740 (<a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">16'h4489</span>) ) <a name="l00741"></a>00741 <span class="vhdlkeyword">begin</span> <a name="l00742"></a>00742 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd4</span>; <a name="l00743"></a>00743 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] - <span class="vhdllogic">14'd2</span>; <a name="l00744"></a>00744 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00745"></a>00745 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a99474f073eb26c43bb8f6aad3487e62f">S_WRITE_CONVERT_1</a>; <a name="l00746"></a>00746 <span class="vhdlkeyword">end</span> <a name="l00747"></a>00747 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span> <a name="l00748"></a>00748 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd2</span>; <a name="l00749"></a>00749 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] - <span class="vhdllogic">14'd1</span>; <a name="l00750"></a>00750 <span class="vhdlkeyword">end</span> <a name="l00751"></a>00751 <span class="vhdlkeyword">end</span> <a name="l00752"></a>00752 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00753"></a>00753 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00754"></a>00754 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00755"></a>00755 <a class="code" href="classocs__floppy.html#a1f985010285312b1615d8f7d2a5e9b35">WE_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00756"></a>00756 <a class="code" href="classocs__floppy.html#ac3fb5d485e04699de5ba746c40df0b72">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>; <a name="l00757"></a>00757 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>]; <a name="l00758"></a>00758 <span class="vhdlkeyword">end</span> <a name="l00759"></a>00759 <span class="vhdlkeyword">end</span> <a name="l00760"></a>00760 <span class="keyword">// read next 4 words, decode sector number</span> <a name="l00761"></a>00761 <span class="keyword">// skip 24*2 bytes</span> <a name="l00762"></a>00762 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#a99474f073eb26c43bb8f6aad3487e62f">S_WRITE_CONVERT_1</a>) <span class="vhdlkeyword">begin</span> <a name="l00763"></a>00763 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00764"></a>00764 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00765"></a>00765 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00766"></a>00766 <a name="l00767"></a>00767 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <span class="vhdllogic">14'd24</span>) <span class="vhdlkeyword">begin</span> <a name="l00768"></a>00768 <a class="code" href="classocs__floppy.html#a6da684cd8a2642a5ce53cdfe7838583c">floppy_blk_irq</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00769"></a>00769 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + { <span class="vhdllogic">17'd0</span>, <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span> }; <a name="l00770"></a>00770 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <span class="vhdllogic">14'd0</span>; <a name="l00771"></a>00771 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00772"></a>00772 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>; <a name="l00773"></a>00773 <span class="vhdlkeyword">end</span> <a name="l00774"></a>00774 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> < <span class="vhdllogic">4'd3</span>) <span class="vhdlkeyword">begin</span> <a name="l00775"></a>00775 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> + <span class="vhdllogic">4'd1</span>; <a name="l00776"></a>00776 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd2</span>; <a name="l00777"></a>00777 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] - <span class="vhdllogic">14'd1</span>; <a name="l00778"></a>00778 <a name="l00779"></a>00779 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd0</span>) <a name="l00780"></a>00780 <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] <= (<a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <a class="code" href="classocs__floppy.html#a5ee89d2c675b03abc9a1179b2aff5bd2">mfm_decoder_odd_30_16</a> : <a class="code" href="classocs__floppy.html#ae2f27853b2e5e10509ac3f3d77a04fa9">mfm_decoder_odd_14_0</a>; <a name="l00781"></a>00781 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd1</span>) <a name="l00782"></a>00782 <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <= (<a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <a class="code" href="classocs__floppy.html#a5ee89d2c675b03abc9a1179b2aff5bd2">mfm_decoder_odd_30_16</a> : <a class="code" href="classocs__floppy.html#ae2f27853b2e5e10509ac3f3d77a04fa9">mfm_decoder_odd_14_0</a>; <a name="l00783"></a>00783 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd2</span>) <a name="l00784"></a>00784 <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] <= <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] | ((<a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <a class="code" href="classocs__floppy.html#a153c1e8f95cb1deab856078ebf7e7886">mfm_decoder_even_30_16</a> : <a class="code" href="classocs__floppy.html#a3e771df09549c282051c064bf1aba67b">mfm_decoder_even_14_0</a>); <a name="l00785"></a>00785 <span class="vhdlkeyword">end</span> <a name="l00786"></a>00786 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd3</span>) <span class="vhdlkeyword">begin</span> <a name="l00787"></a>00787 <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] | ((<a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <a class="code" href="classocs__floppy.html#a153c1e8f95cb1deab856078ebf7e7886">mfm_decoder_even_30_16</a> : <a class="code" href="classocs__floppy.html#a3e771df09549c282051c064bf1aba67b">mfm_decoder_even_14_0</a>); <a name="l00788"></a>00788 <a name="l00789"></a>00789 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd50</span>; <a name="l00790"></a>00790 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] - <span class="vhdllogic">14'd25</span>; <a name="l00791"></a>00791 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00792"></a>00792 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#aed2f3750f90dc2e3832a090ebad53d51">S_WRITE_CONVERT_2</a>; <a name="l00793"></a>00793 <span class="vhdlkeyword">end</span> <a name="l00794"></a>00794 <span class="vhdlkeyword">end</span> <a name="l00795"></a>00795 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00796"></a>00796 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00797"></a>00797 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00798"></a>00798 <a class="code" href="classocs__floppy.html#a1f985010285312b1615d8f7d2a5e9b35">WE_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00799"></a>00799 <a class="code" href="classocs__floppy.html#ac3fb5d485e04699de5ba746c40df0b72">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>; <a name="l00800"></a>00800 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>]; <a name="l00801"></a>00801 <span class="vhdlkeyword">end</span> <a name="l00802"></a>00802 <span class="vhdlkeyword">end</span> <a name="l00803"></a>00803 <span class="keyword">// read sector, decode to floppy buffer</span> <a name="l00804"></a>00804 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#aed2f3750f90dc2e3832a090ebad53d51">S_WRITE_CONVERT_2</a>) <span class="vhdlkeyword">begin</span> <a name="l00805"></a>00805 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00806"></a>00806 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00807"></a>00807 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00808"></a>00808 <a name="l00809"></a>00809 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <span class="vhdllogic">14'd257</span>) <span class="vhdlkeyword">begin</span> <a name="l00810"></a>00810 <a class="code" href="classocs__floppy.html#a6da684cd8a2642a5ce53cdfe7838583c">floppy_blk_irq</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00811"></a>00811 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + { <span class="vhdllogic">17'd0</span>, <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">1'b0</span> }; <a name="l00812"></a>00812 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <span class="vhdllogic">14'd0</span>; <a name="l00813"></a>00813 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00814"></a>00814 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>; <a name="l00815"></a>00815 <span class="vhdlkeyword">end</span> <a name="l00816"></a>00816 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> < <span class="vhdllogic">4'd3</span>) <span class="vhdlkeyword">begin</span> <a name="l00817"></a>00817 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> + <span class="vhdllogic">4'd1</span>; <a name="l00818"></a>00818 <a name="l00819"></a>00819 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd0</span>) <a name="l00820"></a>00820 <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] <= (<a class="code" href="classocs__floppy.html#abf36e555d483fcbdcd5cad8989fcb186">dskptr_sum</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <a class="code" href="classocs__floppy.html#a5ee89d2c675b03abc9a1179b2aff5bd2">mfm_decoder_odd_30_16</a> : <a class="code" href="classocs__floppy.html#ae2f27853b2e5e10509ac3f3d77a04fa9">mfm_decoder_odd_14_0</a>; <a name="l00821"></a>00821 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd1</span>) <a name="l00822"></a>00822 <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <= (<a class="code" href="classocs__floppy.html#abf36e555d483fcbdcd5cad8989fcb186">dskptr_sum</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <a class="code" href="classocs__floppy.html#a5ee89d2c675b03abc9a1179b2aff5bd2">mfm_decoder_odd_30_16</a> : <a class="code" href="classocs__floppy.html#ae2f27853b2e5e10509ac3f3d77a04fa9">mfm_decoder_odd_14_0</a>; <a name="l00823"></a>00823 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd2</span>) <a name="l00824"></a>00824 <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] <= <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] | ((<a class="code" href="classocs__floppy.html#abf36e555d483fcbdcd5cad8989fcb186">dskptr_sum</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <a class="code" href="classocs__floppy.html#a153c1e8f95cb1deab856078ebf7e7886">mfm_decoder_even_30_16</a> : <a class="code" href="classocs__floppy.html#a3e771df09549c282051c064bf1aba67b">mfm_decoder_even_14_0</a>); <a name="l00825"></a>00825 <span class="vhdlkeyword">end</span> <a name="l00826"></a>00826 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd3</span>) <span class="vhdlkeyword">begin</span> <a name="l00827"></a>00827 <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] | ((<a class="code" href="classocs__floppy.html#abf36e555d483fcbdcd5cad8989fcb186">dskptr_sum</a>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b0</span>)? <a class="code" href="classocs__floppy.html#a153c1e8f95cb1deab856078ebf7e7886">mfm_decoder_even_30_16</a> : <a class="code" href="classocs__floppy.html#a3e771df09549c282051c064bf1aba67b">mfm_decoder_even_14_0</a>); <a name="l00828"></a>00828 <a name="l00829"></a>00829 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00830"></a>00830 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a30fd713045ce1c717f1681cc371c610d">write_sector_ready</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00831"></a>00831 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd516</span>; <a name="l00832"></a>00832 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] - <span class="vhdllogic">14'd258</span>; <a name="l00833"></a>00833 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <span class="vhdllogic">30'h04000400</span>; <span class="keyword">// 0x10001000, sd</span> <a name="l00834"></a>00834 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a8fff34ac85ed0dd22a4cfd53d0ae1491">S_WRITE_TO_SD</a>; <a name="l00835"></a>00835 <span class="vhdlkeyword">end</span> <a name="l00836"></a>00836 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span> <a name="l00837"></a>00837 <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> <= <a class="code" href="classocs__floppy.html#a88f64edfb6667021e8ac69b6b3d6dfdb">dskptr</a> + <span class="vhdllogic">32'd4</span>; <a name="l00838"></a>00838 <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] <= <a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] - <span class="vhdllogic">14'd2</span>; <a name="l00839"></a>00839 <span class="vhdlkeyword">end</span> <a name="l00840"></a>00840 <span class="vhdlkeyword">end</span> <a name="l00841"></a>00841 <span class="vhdlkeyword">end</span> <a name="l00842"></a>00842 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00843"></a>00843 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00844"></a>00844 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00845"></a>00845 <a class="code" href="classocs__floppy.html#a1f985010285312b1615d8f7d2a5e9b35">WE_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00846"></a>00846 <a class="code" href="classocs__floppy.html#ac3fb5d485e04699de5ba746c40df0b72">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>; <a name="l00847"></a>00847 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <a class="code" href="classocs__floppy.html#abf36e555d483fcbdcd5cad8989fcb186">dskptr_sum</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>]; <a name="l00848"></a>00848 <span class="vhdlkeyword">end</span> <a name="l00849"></a>00849 <span class="vhdlkeyword">end</span> <a name="l00850"></a>00850 <span class="keyword">// sd write</span> <a name="l00851"></a>00851 <span class="keyword">// continue</span> <a name="l00852"></a>00852 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> == <a class="code" href="classocs__floppy.html#a8fff34ac85ed0dd22a4cfd53d0ae1491">S_WRITE_TO_SD</a>) <span class="vhdlkeyword">begin</span> <a name="l00853"></a>00853 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> == <span class="vhdllogic">1'b1</span> && <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span> <a name="l00854"></a>00854 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00855"></a>00855 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b0</span>; <a name="l00856"></a>00856 <a name="l00857"></a>00857 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> < <span class="vhdllogic">4'd3</span>) <span class="vhdlkeyword">begin</span> <a name="l00858"></a>00858 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> + <span class="vhdllogic">4'd1</span>; <a name="l00859"></a>00859 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> + <span class="vhdllogic">30'd1</span>; <a name="l00860"></a>00860 <span class="vhdlkeyword">end</span> <a name="l00861"></a>00861 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd3</span>) <span class="vhdlkeyword">begin</span> <a name="l00862"></a>00862 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> + <span class="vhdllogic">4'd1</span>; <a name="l00863"></a>00863 <a class="code" href="classocs__floppy.html#a267cbc4af1d6886e7d75e9a95bde64d1">ADR_O</a> <= <span class="vhdllogic">30'h04000400</span>; <span class="keyword">// 0x10001000, sd read state</span> <a name="l00864"></a>00864 <span class="vhdlkeyword">end</span> <a name="l00865"></a>00865 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> >= <span class="vhdllogic">4'd4</span> && <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a> == <span class="vhdllogic">32'd5</span>) <span class="vhdlkeyword">begin</span> <a name="l00866"></a>00866 <a class="code" href="classocs__floppy.html#a2795ec2c9748257e1892f6bdcbdab1a7">floppy_error</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00867"></a>00867 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00868"></a>00868 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>; <a name="l00869"></a>00869 <span class="vhdlkeyword">end</span> <a name="l00870"></a>00870 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd4</span> && <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a> == <span class="vhdllogic">32'd4</span>) <span class="vhdlkeyword">begin</span> <a name="l00871"></a>00871 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> + <span class="vhdllogic">4'd1</span>; <a name="l00872"></a>00872 <span class="vhdlkeyword">end</span> <a name="l00873"></a>00873 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd5</span> && <a class="code" href="classocs__floppy.html#a8c051935644d94da24ab59f337c07f87">master_DAT_I</a> == <span class="vhdllogic">32'd2</span>) <span class="vhdlkeyword">begin</span> <a name="l00874"></a>00874 <a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd0</span>; <a name="l00875"></a>00875 <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#a64f5739933fdcfbf3ea4eccdb1c970c5">dsklen</a>[<span class="vhdllogic">13</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">14'd0</span>) <span class="vhdlkeyword">begin</span> <a name="l00876"></a>00876 <a class="code" href="classocs__floppy.html#a6da684cd8a2642a5ce53cdfe7838583c">floppy_blk_irq</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00877"></a>00877 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#a2cf0674c34ef64b1184eaedc75a723c3">S_IDLE</a>; <a name="l00878"></a>00878 <span class="vhdlkeyword">end</span> <a name="l00879"></a>00879 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span> <a name="l00880"></a>00880 <a class="code" href="classocs__floppy.html#aeb7621456bdce1119829380f4544d479">state</a> <= <a class="code" href="classocs__floppy.html#aebfce2c5aed1a61c1424dbeae8bbc84f">S_WRITE_CONVERT_0</a>; <a name="l00881"></a>00881 <span class="vhdlkeyword">end</span> <a name="l00882"></a>00882 <span class="vhdlkeyword">end</span> <a name="l00883"></a>00883 <span class="vhdlkeyword">end</span> <a name="l00884"></a>00884 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classocs__floppy.html#abebc3d499d784b372bc71802ba5f2466">ACK_I</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <a name="l00885"></a>00885 <a class="code" href="classocs__floppy.html#a5da90cb02285ce937ea6595393c68d07">CYC_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00886"></a>00886 <a class="code" href="classocs__floppy.html#ae231b489bc474d07c8925e8da0814a34">STB_O</a> <= <span class="vhdllogic">1'b1</span>; <a name="l00887"></a>00887 <a class="code" href="classocs__floppy.html#a1f985010285312b1615d8f7d2a5e9b35">WE_O</a> <= (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> <= <span class="vhdllogic">4'd3</span>)? <span class="vhdllogic">1'b1</span> : <span class="vhdllogic">1'b0</span>; <a name="l00888"></a>00888 <a class="code" href="classocs__floppy.html#ac3fb5d485e04699de5ba746c40df0b72">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>; <a name="l00889"></a>00889 <span class="keyword">// ADR_O <= ADR_O</span> <a name="l00890"></a>00890 <a class="code" href="classocs__floppy.html#a54c5e5e3d5bd971b1763d836c9eb6c97">master_DAT_O</a> <= <a name="l00891"></a>00891 (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd0</span>)? <span class="vhdllogic">32'h10004000</span> : <span class="keyword">// base address</span> <a name="l00892"></a>00892 (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd1</span>)? <a class="code" href="classocs__floppy.html#a670d1ce70aba473daf8e57784b5ff17a">sd_track_address</a> + { <span class="vhdllogic">28'd0</span>, <a class="code" href="classocs__floppy.html#a97f69a126a51db580c1699ff6ca0f514">mfm_decoder</a>[<span class="vhdllogic">11</span>:<span class="vhdllogic">8</span>] }: <span class="keyword">// sd sector number</span> <a name="l00893"></a>00893 (<a class="code" href="classocs__floppy.html#a5e364cbb0dc9d706eb0e1e0982c563fa">substate</a> == <span class="vhdllogic">4'd2</span>)? <span class="vhdllogic">32'd1</span> : <span class="keyword">// write sector count</span> <a name="l00894"></a>00894 <span class="vhdllogic">32'd3</span>; <span class="keyword">// start sd write</span> <a name="l00895"></a>00895 <span class="vhdlkeyword">end</span> <a name="l00896"></a>00896 <span class="vhdlkeyword">end</span> <a name="l00897"></a>00897 <span class="vhdlkeyword">end</span> <a name="l00898"></a>00898 <span class="vhdlkeyword">end</span> <a name="l00899"></a>00899 <a name="l00900"></a>00900 <span class="vhdlkeyword">endmodule</span> </pre></div></div> </div> <hr class="footer"/><address class="footer"><small>Generated on Mon Dec 20 2010 21:20:19 for aoOCS by  <a href="http://www.doxygen.org/index.html"> <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address> </body> </html>