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<h1>IO Ports </h1> </div>
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<h3><a class="el" href="classaoOCS.html" title="aoOCS top-level module for the Terasic DE2-70 board. ">aoOCS</a> top-level IO Ports</h3>
<div class="fragment"><pre class="fragment">
Inputs
Clock and reset
clk_50
reset_ext_n
DM9000A Ethernet hardware interface
enet_irq
Switches and hex leds hardware interface from drv_debug
debug_sw1_pc
debug_sw2_adr
debug_sw3_halt
Inouts
IS61LPS51236A pipelined SSRAM hardware interface
ssram_data [35:0]
SD bus 1-bit hardware interface
sd_cmd_io
sd_dat_io
PS/2 keyboard hardware interface
ps2_kbclk
ps2_kbdat
PS/2 mouse hardware interface
ps2_mouseclk
ps2_mousedat
WM8731 audio codec hardware interface
ac_sdat
DM9000A Ethernet hardware interface
enet_data [15:0]
Outputs
IS61LPS51236A pipelined SSRAM hardware interface
ssram_address [18:0]
ssram_oe_n
ssram_writeen_n
ssram_byteen_n [3:0]
ssram_clk
ssram_globalw_n
ssram_advance_n
ssram_adsp_n
ssram_adsc_n
ssram_ce1_n
ssram_ce2
ssram_ce3_n
SD bus 1-bit hardware interface
sd_clk_o
ADV7123 Video DAC hardware interface
vga_r [9:0]
vga_g [9:0]
vga_b [9:0]
vga_blank_n
vga_sync_n
vga_clock
vga_hsync
vga_vsync
WM8731 audio codec hardware interface
ac_sclk
ac_xclk
ac_bclk
ac_dat
ac_lr
DM9000A Ethernet hardware interface
enet_clk_25
enet_reset_n
enet_cs_n
enet_ior_n
enet_iow_n
enet_cmd
Switches and hex leds hardware interface from drv_debug
hex0 [7:0]
hex1 [7:0]
hex2 [7:0]
hex3 [7:0]
hex4 [7:0]
hex5 [7:0]
hex6 [7:0]
hex7 [7:0]
Leds hardware interface for debug purposes
debug_sd [7:0]
debug_68k_state [7:0]
debug_floppy [7:0]
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