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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2010 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II
# Version 10.0 Build 218 06/27/2010 SJ Web Edition
# Date created = 16:32:58  August 07, 2010
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#               ssram_test_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#               assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus II software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C70F896C6
set_global_assignment -name TOP_LEVEL_ENTITY ssram_test
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 10.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:32:58  AUGUST 07, 2010"
set_global_assignment -name LAST_QUARTUS_VERSION 10.0
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 896
set_global_assignment -name VERILOG_FILE ssram_test.v
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"

set_location_assignment PIN_R3 -to clk
set_location_assignment PIN_AA23 -to reset_n
set_location_assignment PIN_AG8 -to ssram_address[0]
set_location_assignment PIN_AF8 -to ssram_address[1]
set_location_assignment PIN_AF14 -to ssram_address[10]
set_location_assignment PIN_AG14 -to ssram_address[11]
set_location_assignment PIN_AE15 -to ssram_address[12]
set_location_assignment PIN_AF15 -to ssram_address[13]
set_location_assignment PIN_AC16 -to ssram_address[14]
set_location_assignment PIN_AF20 -to ssram_address[15]
set_location_assignment PIN_AG20 -to ssram_address[16]
set_location_assignment PIN_AE11 -to ssram_address[17]
set_location_assignment PIN_AF11 -to ssram_address[18]
#set_location_assignment PIN_AG10 -to ssram_address[19]
set_location_assignment PIN_AH7 -to ssram_address[2]
#set_location_assignment PIN_AG9 -to ssram_address[20]
set_location_assignment PIN_AG7 -to ssram_address[3]
set_location_assignment PIN_AG6 -to ssram_address[4]
set_location_assignment PIN_AG5 -to ssram_address[5]
set_location_assignment PIN_AE12 -to ssram_address[6]
set_location_assignment PIN_AG12 -to ssram_address[7]
set_location_assignment PIN_AD13 -to ssram_address[8]
set_location_assignment PIN_AE13 -to ssram_address[9]
set_location_assignment PIN_AG17 -to ssram_adsc_n
set_location_assignment PIN_AC18 -to ssram_adsp_n
set_location_assignment PIN_AD16 -to ssram_advance_n
set_location_assignment PIN_AC21 -to ssram_byteen_n[0]
set_location_assignment PIN_AC20 -to ssram_byteen_n[1]
set_location_assignment PIN_AD20 -to ssram_byteen_n[2]
set_location_assignment PIN_AH20 -to ssram_byteen_n[3]
set_location_assignment PIN_AH19 -to ssram_ce1_n
set_location_assignment PIN_AG19 -to ssram_ce2
set_location_assignment PIN_AD22 -to ssram_ce3_n
set_location_assignment PIN_AD7 -to ssram_clk
set_location_assignment PIN_AK9 -to ssram_data[32]
set_location_assignment PIN_AJ23 -to ssram_data[33]
set_location_assignment PIN_AK20 -to ssram_data[34]
set_location_assignment PIN_AJ9 -to ssram_data[35]
set_location_assignment PIN_AH10 -to ssram_data[0]
set_location_assignment PIN_AJ10 -to ssram_data[1]
set_location_assignment PIN_AH17 -to ssram_data[10]
set_location_assignment PIN_AJ18 -to ssram_data[11]
set_location_assignment PIN_AH18 -to ssram_data[12]
set_location_assignment PIN_AK19 -to ssram_data[13]
set_location_assignment PIN_AJ19 -to ssram_data[14]
set_location_assignment PIN_AK23 -to ssram_data[15]
set_location_assignment PIN_AJ20 -to ssram_data[16]
set_location_assignment PIN_AK21 -to ssram_data[17]
set_location_assignment PIN_AJ21 -to ssram_data[18]
set_location_assignment PIN_AK22 -to ssram_data[19]
set_location_assignment PIN_AK10 -to ssram_data[2]
set_location_assignment PIN_AJ22 -to ssram_data[20]
set_location_assignment PIN_AH15 -to ssram_data[21]
set_location_assignment PIN_AJ15 -to ssram_data[22]
set_location_assignment PIN_AJ16 -to ssram_data[23]
set_location_assignment PIN_AK14 -to ssram_data[24]
set_location_assignment PIN_AJ14 -to ssram_data[25]
set_location_assignment PIN_AJ13 -to ssram_data[26]
set_location_assignment PIN_AH13 -to ssram_data[27]
set_location_assignment PIN_AK12 -to ssram_data[28]
set_location_assignment PIN_AK7 -to ssram_data[29]
set_location_assignment PIN_AJ11 -to ssram_data[3]
set_location_assignment PIN_AJ8 -to ssram_data[30]
set_location_assignment PIN_AK8 -to ssram_data[31]
set_location_assignment PIN_AK11 -to ssram_data[4]
set_location_assignment PIN_AH12 -to ssram_data[5]
set_location_assignment PIN_AJ12 -to ssram_data[6]
set_location_assignment PIN_AH16 -to ssram_data[7]
set_location_assignment PIN_AK17 -to ssram_data[8]
set_location_assignment PIN_AJ17 -to ssram_data[9]
set_location_assignment PIN_AG18 -to ssram_globalw_n
set_location_assignment PIN_AD18 -to ssram_oe_n
set_location_assignment PIN_AF18 -to ssram_writeen_n
set_location_assignment PIN_AC13 -to debug[0]
set_location_assignment PIN_AB13 -to debug[1]
set_location_assignment PIN_AC12 -to debug[2]
set_location_assignment PIN_AB12 -to debug[3]
set_location_assignment PIN_AC11 -to debug[4]
set_location_assignment PIN_AD9 -to debug[5]
set_location_assignment PIN_AD8 -to debug[6]
set_location_assignment PIN_AJ7 -to debug[7]


set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"

set_parameter -name CYCLONEII_SAFE_WRITE "\"VERIFIED_SAFE\"" -to "altsyncram:debug_ram_inst"


set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top