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#
# Copyright (C) 1991-2014 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, the Altera Quartus II License Agreement,
# the Altera MegaCore Function License Agreement, or other 
# applicable license agreement, including, without limitation, 
# that your use is for the sole purpose of programming logic 
# devices manufactured by Altera and sold by Altera or its 
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# agreement for further details.
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# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 14.0.0 Build 200 06/17/2014 SJ Web Edition
# Date created = 20:14:12  August 09, 2014
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#               soc_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#               assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus II software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE115F29C7
set_global_assignment -name TOP_LEVEL_ENTITY soc
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 14.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:14:12  AUGUST 09, 2014"
set_global_assignment -name LAST_QUARTUS_VERSION 14.0
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name QIP_FILE pll/pll.qip
set_global_assignment -name QIP_FILE system/synthesis/system.qip
set_global_assignment -name VERILOG_FILE soc.v

set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
set_location_assignment PIN_Y2 -to CLOCK_50

set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_RAS_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CAS_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CKE
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_WE_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CS_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[13]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[14]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[15]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[16]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[17]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[18]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[19]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[20]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[21]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[22]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[23]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[24]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[25]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[26]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[27]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[28]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[29]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[30]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[31]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[12]
set_location_assignment PIN_U1 -to DRAM_DQ[31]
set_location_assignment PIN_U4 -to DRAM_DQ[30]
set_location_assignment PIN_T3 -to DRAM_DQ[29]
set_location_assignment PIN_R3 -to DRAM_DQ[28]
set_location_assignment PIN_R2 -to DRAM_DQ[27]
set_location_assignment PIN_R1 -to DRAM_DQ[26]
set_location_assignment PIN_R7 -to DRAM_DQ[25]
set_location_assignment PIN_U5 -to DRAM_DQ[24]
set_location_assignment PIN_M8 -to DRAM_DQ[16]
set_location_assignment PIN_L8 -to DRAM_DQ[17]
set_location_assignment PIN_P2 -to DRAM_DQ[18]
set_location_assignment PIN_N3 -to DRAM_DQ[19]
set_location_assignment PIN_N4 -to DRAM_DQ[20]
set_location_assignment PIN_M4 -to DRAM_DQ[21]
set_location_assignment PIN_M7 -to DRAM_DQ[22]
set_location_assignment PIN_L7 -to DRAM_DQ[23]
set_location_assignment PIN_Y3 -to DRAM_DQ[8]
set_location_assignment PIN_Y4 -to DRAM_DQ[9]
set_location_assignment PIN_AB1 -to DRAM_DQ[10]
set_location_assignment PIN_AA3 -to DRAM_DQ[11]
set_location_assignment PIN_AB2 -to DRAM_DQ[12]
set_location_assignment PIN_AC1 -to DRAM_DQ[13]
set_location_assignment PIN_AB3 -to DRAM_DQ[14]
set_location_assignment PIN_AC2 -to DRAM_DQ[15]
set_location_assignment PIN_W3 -to DRAM_DQ[0]
set_location_assignment PIN_W2 -to DRAM_DQ[1]
set_location_assignment PIN_V4 -to DRAM_DQ[2]
set_location_assignment PIN_W1 -to DRAM_DQ[3]
set_location_assignment PIN_V3 -to DRAM_DQ[4]
set_location_assignment PIN_V2 -to DRAM_DQ[5]
set_location_assignment PIN_V1 -to DRAM_DQ[6]
set_location_assignment PIN_U3 -to DRAM_DQ[7]
set_location_assignment PIN_W4 -to DRAM_DQM[1]
set_location_assignment PIN_K8 -to DRAM_DQM[2]
set_location_assignment PIN_U2 -to DRAM_DQM[0]
set_location_assignment PIN_N8 -to DRAM_DQM[3]
set_location_assignment PIN_U6 -to DRAM_RAS_N
set_location_assignment PIN_V7 -to DRAM_CAS_N
set_location_assignment PIN_AA6 -to DRAM_CKE
set_location_assignment PIN_V6 -to DRAM_WE_N
set_location_assignment PIN_T4 -to DRAM_CS_N
set_location_assignment PIN_U7 -to DRAM_BA[0]
set_location_assignment PIN_R4 -to DRAM_BA[1]
set_location_assignment PIN_Y7 -to DRAM_ADDR[12]
set_location_assignment PIN_AA5 -to DRAM_ADDR[11]
set_location_assignment PIN_R5 -to DRAM_ADDR[10]
set_location_assignment PIN_Y6 -to DRAM_ADDR[9]
set_location_assignment PIN_Y5 -to DRAM_ADDR[8]
set_location_assignment PIN_AA7 -to DRAM_ADDR[7]
set_location_assignment PIN_W7 -to DRAM_ADDR[6]
set_location_assignment PIN_W8 -to DRAM_ADDR[5]
set_location_assignment PIN_V5 -to DRAM_ADDR[4]
set_location_assignment PIN_R6 -to DRAM_ADDR[0]
set_location_assignment PIN_V8 -to DRAM_ADDR[1]
set_location_assignment PIN_U8 -to DRAM_ADDR[2]
set_location_assignment PIN_P1 -to DRAM_ADDR[3]
set_location_assignment PIN_AE5 -to DRAM_CLK

set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name SDC_FILE soc.sdc
set_global_assignment -name CDF_FILE output_files/Chain2.cdf
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE output_files/debug_1.stp
set_global_assignment -name SIGNALTAP_FILE output_files/debug_1.stp
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top