Subversion Repositories apb_mstr

<##//////////////////////////////////////////////////////////////////
////                                                             ////
////  Author: Eyal Hochberg                                      ////
////          eyal@provartec.com                                 ////
////                                                             ////
////  Downloaded from: http://www.opencores.org                  ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// Copyright (C) 2010 Provartec LTD                            ////
//// www.provartec.com                                           ////
//// info@provartec.com                                          ////
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//// This source file may be used and distributed without        ////
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//// the original copyright notice and the associated disclaimer.////
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//// This source file is free software; you can redistribute it  ////
//// and/or modify it under the terms of the GNU Lesser General  ////
//// Public License as published by the Free Software Foundation.////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied  ////
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//// PURPOSE.  See the GNU Lesser General Public License for more////
//// details. http://www.gnu.org/licenses/lgpl.html              ////
////                                                             ////
//////////////////////////////////////////////////////////////////##>

REQUIRE(1.4)

INCLUDE   def_axi2apb_static.txt  

STARTUSER
  
SWAP.GLOBAL      #FFD        #1              ## flip-flop delay

SWAP.USER      PREFIX      axi2apb         ## Prefix for all modules and file names

SWAP.USER      SLAVE_NUM   8               ## Number of APB slaves 

SWAP.USER      CMD_DEPTH   2               ## Number of AXI command FIFO

SWAP.USER      ADDR_BITS   24              ## AXI and APB address bits
SWAP.USER      ID_BITS     4               ## AXI ID bits
SWAP.USER      DEC_BITS    8               ## Address MSBits for slave decoding

SWAP.USER      DEC_ADDR0   'h00    ## Slave 0 address deciding
SWAP.USER      DEC_ADDR1   'h01    ## Slave 1 address deciding
SWAP.USER      DEC_ADDR2   'h02    ## Slave 2 address deciding
SWAP.USER      DEC_ADDR3   'h03    ## Slave 3 address deciding
SWAP.USER      DEC_ADDR4   'h10    ## Slave 4 address deciding
SWAP.USER      DEC_ADDR5   'h11    ## Slave 5 address deciding
SWAP.USER      DEC_ADDR6   'h12    ## Slave 6 address deciding
SWAP.USER      DEC_ADDR7   'h13    ## Slave 7 address deciding