URL
https://opencores.org/ocsvn/ccsds_rxtxsoc/ccsds_rxtxsoc/trunk
Subversion Repositories ccsds_rxtxsoc
[/] [ccsds_rxtxsoc/] [trunk/] [ccsds_rxtx.core] - Rev 2
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CAPI=1
[main]
description = EurySPACE CCSDS RX/TX with wishbone interface
simulators = ghdl
[fileset rtl_files]
files =
ccsds_rxtx_buffer.vhd
ccsds_rxtx_clock_divider.vhd
ccsds_rxtx_constants.vhd
ccsds_rxtx_crc.vhd
ccsds_rxtx_functions.vhd
ccsds_rxtx_lfsr.vhd
ccsds_rxtx_oversampler.vhd
ccsds_rxtx_parameters.vhd
ccsds_rxtx_serdes.vhd
ccsds_rxtx_srrc.vhd
ccsds_rxtx_top.vhd
ccsds_rxtx_types.vhd
ccsds_rx.vhd
ccsds_rx_datalink_layer.vhd
ccsds_rx_physical_layer.vhd
ccsds_tx.vhd
ccsds_tx_coder.vhd
ccsds_tx_coder_convolutional.vhd
ccsds_tx_coder_differential.vhd
ccsds_tx_datalink_layer.vhd
ccsds_tx_filter.vhd
ccsds_tx_footer.vhd
ccsds_tx_framer.vhd
ccsds_tx_header.vhd
ccsds_tx_manager.vhd
ccsds_tx_mapper_bits_symbols.vhd
ccsds_tx_mapper_symbols_samples.vhd
ccsds_tx_physical_layer.vhd
ccsds_tx_randomizer.vhd
ccsds_tx_synchronizer.vhd
file_type = vhdlSource
usage = sim synth
[fileset tb]
files = ccsds_rxtx_bench.vhd
file_type = vhdlSource
scope = private
usage = sim
[simulator]
toplevel = ccsds_rxtx_bench