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#
# Constraints generated by Synplify Pro map500rc, Build 036R
#

# Period Constraints
NET "SYSCLK_P" TNM_NET = "SYSCLK_P";
TIMESPEC "TS_SYSCLK_P" = PERIOD "SYSCLK_P"  5  ns HIGH 50 %;

#Begin clock constraints
NET "clocks/clk20_bufg_in" TNM_NET = "clocks_clk20_bufg_in"; 
TIMESPEC "TS_clocks_clk20_bufg_in" = PERIOD "clocks_clk20_bufg_in" 50.000 ns HIGH 50.00%; 
#NET "clocks/clkfbout_clkfbin_125" TNM_NET = "clocks_clkfbout_clkfbin_125"; 
#TIMESPEC "TS_clocks_clkfbout_clkfbin_125" = PERIOD "clocks_clkfbout_clkfbin_125" 50.000 ns HIGH 50.00%; 
#NET "clocks/osc_clk_ibufg" TNM_NET = "clocks_osc_clk_ibufg"; 
#TIMESPEC "TS_clocks_osc_clk_ibufg" = PERIOD "clocks_osc_clk_ibufg" 50.000 ns HIGH 50.00%; 
#End clock constraints

# Unconstrained Outputs 

NET "HEX0[*]" TIG; # port HEX0[6:0]
NET "HEX1[*]" TIG; # port HEX1[6:0]
NET "HEX2[*]" TIG; # port HEX2[6:0]
NET "HEX3[*]" TIG; # port HEX3[6:0]
NET "HEX4[*]" TIG; # port HEX4[6:0]
NET "HEX5[*]" TIG; # port HEX5[6:0]
NET "HEX6[*]" TIG; # port HEX6[6:0]
NET "HEX7[*]" TIG; # port HEX7[6:0]
#NET "LED_GREEN[*]" TIG; # port LED_GREEN[8:0]
#NET "LED_RED[*]" TIG; # port LED_RED[17:0]
#NET "UART_TXD" TIG;
NET "TD_RESET" TIG;


# Location Constraints
#PIN "clocks/clk20_bufg.O" CLOCK_DEDICATED_ROUTE = FALSE;

## Clock inputs
NET "SYSCLK_P" LOC = "K21" |IOSTANDARD=LVDS_25;
NET "SYSCLK_N" LOC = "K22" |IOSTANDARD=LVDS_25;

NET "LED_RED[9]"                    LOC = "D17";   ## 2   on DS3 LED
NET "LED_RED[10]"                    LOC = "AB4";   ## 2   on DS4 LED
NET "LED_RED[11]"                    LOC = "D21";   ## 2   on DS5 LED
NET "LED_RED[12]"                    LOC = "W15";   ## 2   on DS6 LED
NET "KEY[0]"                  LOC = "F3";    ## 2   on SW4 pushbutton (active-high)
NET "UART_TXD"                      LOC = "B21";   ##
NET "UART_RXD"                      LOC = "H17";   ##
# End of generated constraints