Subversion Repositories cop

#!/bin/csh

set cop      = ../../..
set bench    = $cop/bench
set wave_dir = $cop/sim/rtl_sim/cop_verilog/waves

iverilog                                \
                                        \
        -I $bench/verilog               \
        -I $cop/rtl/verilog             \
                        \
        -o cop_compiled \
        -D WAVES_V      \
                                        \
        $cop/rtl/verilog/cop_top.v      \
        $cop/rtl/verilog/cop_wb_bus.v   \
        $cop/rtl/verilog/cop_regs.v     \
        $cop/rtl/verilog/cop_count.v    \
                                        \
        $bench/verilog/wb_master_model.v        \
        $bench/verilog/tst_bench_top.v

@ good_compile = $status

if ($good_compile == 0) then
  echo "Compile was Good"
  vvp cop_compiled -lxt2
else
  echo "Compile Failed"
endif