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https://opencores.org/ocsvn/core_arm/core_arm/trunk
Subversion Repositories core_arm
[/] [core_arm/] [trunk/] [vhdl/] [peripherals/] [mem/] [config.in] - Rev 4
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comment 'Memory '
comment ' Memory controller '
bool '8-bit PROM/SRAM bus support ' CONFIG_MCTRL_8BIT
bool '16-bit PROM/SRAM bus support ' CONFIG_MCTRL_16BIT
bool 'RAM write protection ' CONFIG_PERI_WPROT
bool 'Write strobe timing feedback ' CONFIG_MCTRL_WFB
bool '5th SRAM chip-select ' CONFIG_MCTRL_5CS
bool 'SDRAM controller ' CONFIG_MCTRL_SDRAM
if [ "$CONFIG_MCTRL_SDRAM" = "y" ]; then
bool 'Inverted SDRAM clock' CONFIG_MCTRL_SDRAM_INVCLK
fi
comment ' On chip ram '
bool 'On-chip AHB RAM ' CONFIG_AHBRAM_ENABLE
if [ "$CONFIG_AHBRAM_ENABLE" = "y" ]; then
choice 'AHB RAM size (Kbyte)' \
"1 CONFIG_AHBRAM_SZ1 \
2 CONFIG_AHBRAM_SZ2 \
4 CONFIG_AHBRAM_SZ4 \
8 CONFIG_AHBRAM_SZ8 \
16 CONFIG_AHBRAM_SZ16 \
32 CONFIG_AHBRAM_SZ32 \
64 CONFIG_AHBRAM_SZ64" 4
fi
endmenu