Subversion Repositories cpu6502_true_cycle

(January, 4th 2009)
- (DONE) Remove unused nets, register and modules
- (85%) Finish working for Specification of cpu65C02_tc
- (DONE) Update the HDL Designer files for better viewing and 
  understanding

(August, 5th 2008)
- (DONE) Rename all port names (_i, _o, _o_i)
- (DONE) Test and verify all Op Codes
- (DONE) Optimize core for speed
- (75%) Finish working for Specification of cpu65C02_tc
- (WORKING) Create high level testbench in assembler and hardware for 
  testing all Op Codes (include accurate cycle timing)
- (WORKING) Create simulation files for Modelsim
- (WORKING) Create a simple .wlf file to demonstrate the cpu65C02_tc
- Update the HDL Designer files for better viewing and understanding