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[/] [cpu8080/] [trunk/] [project/] [_xmsgs/] [cpldfit.xmsgs] - Rev 33
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<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated
by the Xilinx ISE software. Any direct editing or
changes made to this file may result in unpredictable
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<messages>
<msg type="error" file="Cpld" num="1062" delta="unknown" >Design contains <arg fmt="%s" index="1">2100</arg> unique product terms, exceeds device limit <arg fmt="%s" index="2">1792</arg>.
</msg>
<msg type="error" file="Cpld" num="1064" delta="unknown" >Design rules checking error. Fitting process stopped.
</msg>
<msg type="error" file="Cpld" num="868" delta="unknown" >Cannot fit the design into any of the specified devices with the selected implementation options.
</msg>
</messages>