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https://opencores.org/ocsvn/cpu8080/cpu8080/trunk
Subversion Repositories cpu8080
[/] [cpu8080/] [trunk/] [project/] [_xmsgs/] [xst.xmsgs] - Rev 9
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<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated
by the Xilinx ISE software. Any direct editing or
changes made to this file may result in unpredictable
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<messages>
<msg type="info" file="Xst" num="1304" delta="unknown" >Contents of register <<arg fmt="%s" index="1">eienb</arg>> in unit <<arg fmt="%s" index="2">cpu8080</arg>> never changes during circuit operation. The register is replaced by logic.
</msg>
<msg type="warning" file="Xst" num="647" delta="unknown" >Input <<arg fmt="%s" index="1">addr<9:8></arg>> is never used.
</msg>
<msg type="warning" file="Xst" num="647" delta="unknown" >Input <<arg fmt="%s" index="1">addr<1></arg>> is never used.
</msg>
<msg type="warning" file="Xst" num="737" delta="unknown" >Found <arg fmt="%d" index="1">6</arg>-bit latch for signal <<arg fmt="%s" index="2">comp</arg>>.
</msg>
<msg type="warning" file="Xst" num="737" delta="unknown" >Found <arg fmt="%d" index="1">8</arg>-bit latch for signal <<arg fmt="%s" index="2">mask</arg>>.
</msg>
<msg type="warning" file="Xst" num="737" delta="unknown" >Found <arg fmt="%d" index="1">8</arg>-bit latch for signal <<arg fmt="%s" index="2">datai</arg>>.
</msg>
<msg type="warning" file="Xst" num="646" delta="unknown" >Signal <<arg fmt="%s" index="1">resi</arg>> is assigned but never used.
</msg>
<msg type="warning" file="Xst" num="646" delta="unknown" >Signal <<arg fmt="%s" index="1">select4</arg>> is assigned but never used.
</msg>
<msg type="info" file="Xst" num="1767" delta="unknown" >HDL ADVISOR - Resource sharing has identified that some arithmetic operations in this design can share the same physical resources for reduced device utilization. For improved clock frequency you may try to disable resource sharing.
</msg>
<msg type="info" file="Xst" num="1651" delta="unknown" >Address input of ROM <<arg fmt="%s" index="1">rom/Mrom__mux0000</arg>> is tied to register <<arg fmt="%s" index="2">cpu/addr</arg>>.
</msg>
<msg type="info" file="Xst" num="1650" delta="unknown" >The register is removed and the ROM is implemented as read-only block RAM.
</msg>
<msg type="warning" file="Xst" num="1710" delta="unknown" >FF/Latch <<arg fmt="%s" index="1">datai_0</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">select</arg>>.
</msg>
<msg type="warning" file="Xst" num="1895" delta="unknown" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">datai_1</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">select</arg>>.
</msg>
<msg type="warning" file="Xst" num="1895" delta="unknown" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">datai_2</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">select</arg>>.
</msg>
<msg type="warning" file="Xst" num="1895" delta="unknown" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">datai_3</arg>> (without init value) has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">select</arg>>.
</msg>
<msg type="warning" file="Xst" num="2040" delta="unknown" >Unit <arg fmt="%s" index="1">testbench</arg>: <arg fmt="%d" index="2">8</arg> multi-source signals are replaced by logic (pull-up <arg fmt="%s" index="3">yes</arg>): </msg>
<msg type="info" file="Xst" num="2169" delta="unknown" >HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.
</msg>
</messages>
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