Subversion Repositories cpu8080

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/MPPR Results UtilitiesImplement Design/Synthesize - XSTImplement Design/TranslateImplement Design/Translate/Generate Post-Translate Simulation ModelSynthesize - XST/Generate Post-Synthesis Simulation ModelDesign Utilities/Compile HDL Simulation LibrariesDESUT_TBWXilinx ISE SimulatorPK
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label="Partition Report" >   <view program="map" type="IOBProperties" inputState="Translated" file="cpu8080_map.mrp" label="IOB Properties" />   <view program="par" type="ConstraintsData" inputState="Mapped" file="cpu8080.par" label="Timing Constraints" />   <view program="par" type="PinoutData" inputState="Mapped" file="cpu8080.pad" label="Pinout Report" />   <view program="par" type="ClocksData" inputState="Mapped" file="cpu8080.par" label="Clock Report" />  </viewgroup>  <viewgroup label="Errors and Warnings" >   <view program="xst" type="MessageList" file="_xmsgs/xst.xmsgs" label="Synthesis Messages" hideColumns="Filtered" />   <view program="ngdbuild" type="MessageList" inputState="Synthesized" file="_xmsgs/ngdbuild.xmsgs" label="Translation Messages" hideColumns="Filtered" />   <view program="map" type="MessageList" inputState="Translated" file="_xmsgs/map.xmsgs" label="Map Messages" hideColumns="Filtered" />   <view program="par" type="MessageList" inputState="Mapped" file="_xmsgs/par.xmsgs" label="Place and Route Messages" hideColumns="Filtered" />   <view program="trce" type="MessageList" inputState="Routed" file="_xmsgs/trce.xmsgs" label="Timing Messages" hideColumns="Filtered" />   <view program="bitgen" type="MessageList" inputState="Routed" file="_xmsgs/bitgen.xmsgs" label="Bitgen Messages" hideColumns="Filtered" />   <view fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/map.xmsgs,_xmsgs/par.xmsgs,_xmsgs/trce.xmsgs,_xmsgs/bitgen.xmsgs" program="implementation" type="MessageList" inputState="Current" file="_xmsgs/*.xmsgs" label="All Current Messages" hideColumns="Filtered" />  <viewgroup label="Detailed Reports" >   <view program="xst" type="Report" file="cpu8080.syr" label="Synthesis Report   " >    <toc-item title="Synthesis Options Summary" target="   Synthesis Options Summary   " />    <toc-item title="HDL Compilation" target="   HDL Compilation   " />    <toc-item title="HDL Analysis" target="   HDL Analysis   " />    <toc-item title="HDL Synthesis" target="   HDL Synthesis   " />    <toc-item title="Advanced HDL Synthesis" target="   Advanced HDL Synthesis   " />    <toc-item title="Low Level Synthesis" target="   Low Level Synthesis   " />    <toc-item title="Partition Report" target="   Partition Report     " />    <toc-item title="Final Report" target="   Final Report   " />   <view program="ngdbuild" type="Report" inputState="Synthesized" file="cpu8080.bld" label="Translation Report" >    <toc-item title="Top of Report" target="Release" />    <toc-item title="Command Line" target="Command Line:" />    <toc-item title="Partition Status" target="Partition Implementation Status" />    <toc-item title="Final Summary" target="NGDBUILD Design Results Summary:" />   <view program="map" type="Report" inputState="Translated" file="cpu8080_map.mrp" label="Map Report" >    <toc-item title="Section 1: Errors" target="Section 1 - " />    <toc-item title="Section 2: Warnings" target="Section 2 - " />    <toc-item title="Section 3: Infos" target="Section 3 - " />    <toc-item title="Section 4: Removed Logic Summary" target="Section 4 - " />    <toc-item title="Section 5: Removed Logic" target="Section 5 - " />    <toc-item title="Section 6: IOB Properties" target="Section 6 - " />    <toc-item title="Section 7: RPMs" target="Section 7 - " />    <toc-item title="Section 8: Guide Report" target="Section 8 - " />    <toc-item title="Section 9: Area Group and Partition Summary" target="Section 9 - " />    <toc-item title="Section 10: Modular Design Summary" target="Section 10 - " />    <toc-item title="Section 11: Timing Report" target="Section 11 - " />    <toc-item title="Section 12: Configuration String Information" target="Section 12 - " />   <view program="par" type="Report" inputState="Mapped" file="cpu8080.par" label="Place and Route Report" >    <toc-item title="Device Utilization" target="Device Utilization Summary:" />    <toc-item title="Placer Information" target="Starting Placer" />    <toc-item title="Router Information" target="Starting Router" />    <toc-item title="Clock Report" target="Generating Clock Report" />    <toc-item title="Timing Results" target="Timing Score:" />    <toc-item title="Final Summary" target="Peak Memory Usage:" />   <view program="trce" type="Report" inputState="Routed" file="cpu8080.twr" label="Static Timing Report" >    <toc-item title="Data Sheet Report" target="Data Sheet" />    <toc-item title="Timing Summary" target="Timing summary:" />   <view program="bitgen" type="Report" inputState="Routed" file="cpu8080.bgn" label="Bitgen Report" >    <toc-item title="Bitgen Options" target="Summary of Bitgen Options:" />    <toc-item title="Final Summary" target="DRC detected" />  <viewgroup label="Secondary Reports" >   <view program="xplorer" type="Secondary_Report" inputState="Routed" file="cpu8080_xplorer.rpt" label="Xplorer Report" />   <view hidden="true" program="netgen" type="Secondary_Report" inputState="Translated" file="netgen/translate/cpu8080_translate.nlf" label="Post-Translate Simulation Model Report" />   <view hidden="true" program="trce" type="Secondary_Report" inputState="Mapped" file="cpu8080_preroute.twr" label="Post-Map Static Timing Report" />   <view hidden="true" program="netgen" type="Secondary_Report" inputState="Mapped" file="netgen/map/cpu8080_map.nlf" label="Post-Map Simulation Model Report" />   <view hidden="true" program="par" type="Pad_Report" inputState="Mapped" file="cpu8080_pad.txt" label="Pad Report" />   <view hidden="true" program="par" type="Secondary_Report" inputState="Mapped" file="cpu8080.unroutes" label="Unroutes Report" />   <view hidden="true" program="par" type="Secondary_Report" inputState="Routed" file="cpu8080.dly" label="Asynchronous Delay Report" />   <view hidden="true" program="par" type="Secondary_Report" inputState="Routed" file="cpu8080.clk_rgn" label="Clock Region Report" />   <view hidden="true" program="par" type="Secondary_Report" inputState="Routed" file="cpu8080.grf" label="Guide Results Report" />   <view hidden="true" program="netgen" type="Secondary_Report" inputState="Routed" file="netgen/par/cpu8080_timesim.nlf" label="Post-Route Simulation Model Report" />   <view hidden="true" program="xpwr" type="Report" inputState="Routed" file="cpu8080.pwr" label="Power Report" /> </body></report-views>PK

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 Report" >   <view program="map" type="IOBProperties" inputState="Translated" file="alu_map.mrp" label="IOB Properties" />   <view program="par" type="ConstraintsData" inputState="Mapped" file="alu.par" label="Timing Constraints" />   <view program="par" type="PinoutData" inputState="Mapped" file="alu.pad" label="Pinout Report" />   <view program="par" type="ClocksData" inputState="Mapped" file="alu.par" label="Clock Report" />  </viewgroup>  <viewgroup label="Errors and Warnings" >   <view program="xst" type="MessageList" file="_xmsgs/xst.xmsgs" label="Synthesis Messages" hideColumns="Filtered" />   <view program="ngdbuild" type="MessageList" inputState="Synthesized" file="_xmsgs/ngdbuild.xmsgs" label="Translation Messages" hideColumns="Filtered" />   <view program="map" type="MessageList" inputState="Translated" file="_xmsgs/map.xmsgs" label="Map Messages" hideColumns="Filtered" />   <view program="par" type="MessageList" inputState="Mapped" file="_xmsgs/par.xmsgs" label="Place and Route Messages" hideColumns="Filtered" />   <view program="trce" type="MessageList" inputState="Routed" file="_xmsgs/trce.xmsgs" label="Timing Messages" hideColumns="Filtered" />   <view program="bitgen" type="MessageList" inputState="Routed" file="_xmsgs/bitgen.xmsgs" label="Bitgen Messages" hideColumns="Filtered" />   <view fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/map.xmsgs,_xmsgs/par.xmsgs,_xmsgs/trce.xmsgs,_xmsgs/bitgen.xmsgs" program="implementation" type="MessageList" inputState="Current" file="_xmsgs/*.xmsgs" label="All Current Messages" hideColumns="Filtered" />  <viewgroup label="Detailed Reports" >   <view program="xst" type="Report" file="alu.syr" label="Synthesis Report   " >    <toc-item title="Synthesis Options Summary" target="   Synthesis Options Summary   " />    <toc-item title="HDL Compilation" target="   HDL Compilation   " />    <toc-item title="HDL Analysis" target="   HDL Analysis   " />    <toc-item title="HDL Synthesis" target="   HDL Synthesis   " />    <toc-item title="Advanced HDL Synthesis" target="   Advanced HDL Synthesis   " />    <toc-item title="Low Level Synthesis" target="   Low Level Synthesis   " />    <toc-item title="Partition Report" target="   Partition Report     " />    <toc-item title="Final Report" target="   Final Report   " />   <view program="ngdbuild" type="Report" inputState="Synthesized" file="alu.bld" label="Translation Report" >    <toc-item title="Top of Report" target="Release" />    <toc-item title="Command Line" target="Command Line:" />    <toc-item title="Partition Status" target="Partition Implementation Status" />    <toc-item title="Final Summary" target="NGDBUILD Design Results Summary:" />   <view program="map" type="Report" inputState="Translated" file="alu_map.mrp" label="Map Report" >    <toc-item title="Section 1: Errors" target="Section 1 - " />    <toc-item title="Section 2: Warnings" target="Section 2 - " />    <toc-item title="Section 3: Infos" target="Section 3 - " />    <toc-item title="Section 4: Removed Logic Summary" target="Section 4 - " />    <toc-item title="Section 5: Removed Logic" target="Section 5 - " />    <toc-item title="Section 6: IOB Properties" target="Section 6 - " />    <toc-item title="Section 7: RPMs" target="Section 7 - " />    <toc-item title="Section 8: Guide Report" target="Section 8 - " />    <toc-item title="Section 9: Area Group and Partition Summary" target="Section 9 - " />    <toc-item title="Section 10: Modular Design Summary" target="Section 10 - " />    <toc-item title="Section 11: Timing Report" target="Section 11 - " />    <toc-item title="Section 12: Configuration String Information" target="Section 12 - " />   <view program="par" type="Report" inputState="Mapped" file="alu.par" label="Place and Route Report" >    <toc-item title="Device Utilization" target="Device Utilization Summary:" />    <toc-item title="Placer Information" target="Starting Placer" />    <toc-item title="Router Information" target="Starting Router" />    <toc-item title="Clock Report" target="Generating Clock Report" />    <toc-item title="Timing Results" target="Timing Score:" />    <toc-item title="Final Summary" target="Peak Memory Usage:" />   <view program="trce" type="Report" inputState="Routed" file="alu.twr" label="Static Timing Report" >    <toc-item title="Data Sheet Report" target="Data Sheet" />    <toc-item title="Timing Summary" target="Timing summary:" />   <view program="bitgen" type="Report" inputState="Routed" file="alu.bgn" label="Bitgen Report" >    <toc-item title="Bitgen Options" target="Summary of Bitgen Options:" />    <toc-item title="Final Summary" target="DRC detected" />  <viewgroup label="Secondary Reports" >   <view program="xplorer" type="Secondary_Report" inputState="Routed" file="alu_xplorer.rpt" label="Xplorer Report" />   <view hidden="true" program="netgen" type="Secondary_Report" inputState="Translated" file="netgen/translate/alu_translate.nlf" label="Post-Translate Simulation Model Report" />   <view hidden="true" program="trce" type="Secondary_Report" inputState="Mapped" file="alu_preroute.twr" label="Post-Map Static Timing Report" />   <view hidden="true" program="netgen" type="Secondary_Report" inputState="Mapped" file="netgen/map/alu_map.nlf" label="Post-Map Simulation Model Report" />   <view hidden="true" program="par" type="Pad_Report" inputState="Mapped" file="alu_pad.txt" label="Pad Report" />   <view hidden="true" program="par" type="Secondary_Report" inputState="Mapped" file="alu.unroutes" label="Unroutes Report" />   <view hidden="true" program="par" type="Secondary_Report" inputState="Routed" file="alu.dly" label="Asynchronous Delay Report" />   <view hidden="true" program="par" type="Secondary_Report" inputState="Routed" file="alu.clk_rgn" label="Clock Region Report" />   <view hidden="true" program="par" type="Secondary_Report" inputState="Routed" file="alu.grf" label="Guide Results Report" />   <view hidden="true" program="netgen" type="Secondary_Report" inputState="Routed" file="netgen/par/alu_timesim.nlf" label="Post-Route Simulation Model Report" />   <view hidden="true" program="xpwr" type="Report" inputState="Routed" file="alu.pwr" label="Power Report" /> </body></report-views>PK

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  <view program="map" inputState="Translated" type="IOBProperties" file="!module_name!_map.mrp" label="IOB Properties" />   <view program="par" inputState="Mapped" type="ConstraintsData" file="!module_name!.par" label="Timing Constraints" />   <view program="par" inputState="Mapped" type="PinoutData" file="!module_name!.pad" label="Pinout Report" />   <view program="par" inputState="Mapped" type="ClocksData" file="!module_name!.par" label="Clock Report" />  </viewgroup>  <viewgroup label="Errors and Warnings" >   <view program="xst" type="MessageList" file="_xmsgs/xst.xmsgs" label="Synthesis Messages" hideColumns="Filtered"/>   <view program="ngdbuild" inputState="Synthesized" type="MessageList" file="_xmsgs/ngdbuild.xmsgs" label="Translation Messages" hideColumns="Filtered"/>   <view program="map" inputState="Translated" type="MessageList"  file="_xmsgs/map.xmsgs" label="Map Messages" hideColumns="Filtered"/>   <view program="par" inputState="Mapped" type="MessageList"  file="_xmsgs/par.xmsgs" label="Place and Route Messages" hideColumns="Filtered"/>   <view program="trce" inputState="Routed" type="MessageList"  file="_xmsgs/trce.xmsgs" label="Timing Messages" hideColumns="Filtered"/>   <view program="bitgen" inputState="Routed" type="MessageList" file="_xmsgs/bitgen.xmsgs" label="Bitgen Messages" hideColumns="Filtered"/>   <view program="implementation" fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/map.xmsgs,_xmsgs/par.xmsgs,_xmsgs/trce.xmsgs,_xmsgs/bitgen.xmsgs" inputState="Current" type="MessageList"  file="_xmsgs/*.xmsgs" label="All Current Messages" hideColumns="Filtered"/>  <viewgroup label="Detailed Reports" >   <view program="xst" type="Report" file="!module_name!.syr" label="Synthesis Report   " >    <toc-item title="Synthesis Options Summary" target="   Synthesis Options Summary   " />    <toc-item title="HDL Compilation"           target="   HDL Compilation   " />    <toc-item title="HDL Analysis"              target="   HDL Analysis   " />    <toc-item title="HDL Synthesis"             target="   HDL Synthesis   " />    <toc-item title="Advanced HDL Synthesis"    target="   Advanced HDL Synthesis   " />    <toc-item title="Low Level Synthesis"       target="   Low Level Synthesis   " />    <toc-item title="Partition Report"          target="   Partition Report     " />    <toc-item title="Final Report"              target="   Final Report   " />   <view program="ngdbuild" inputState="Synthesized" type="Report" file="!module_name!.bld" label="Translation Report" >    <toc-item title="Top of Report" target="Release" />    <toc-item title="Command Line" target="Command Line:" />    <toc-item title="Partition Status"          target="Partition Implementation Status" />    <toc-item title="Final Summary" target="NGDBUILD Design Results Summary:" />   <view program="map" inputState="Translated" type="Report" file="!module_name!_map.mrp" label="Map Report" >    <toc-item title="Section 1: Errors"                             target="Section 1 - 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" />   <view program="par" inputState="Mapped" type="Report" file="!module_name!.par" label="Place and Route Report" >    <toc-item title="Device Utilization" target="Device Utilization Summary:" />    <toc-item title="Placer Information" target="Starting Placer" />    <toc-item title="Router Information" target="Starting Router" />    <toc-item title="Partition Status"   target="Partition Implementation Status" />    <toc-item title="Clock Report"       target="Generating Clock Report" />    <toc-item title="Timing Results"     target="Timing Score:" />    <toc-item title="Final Summary"      target="Peak Memory Usage:" />   <view program="trce" inputState="Routed" type="Report" file="!module_name!.twr" label="Static Timing Report">    <toc-item title="Data Sheet Report" target="Data Sheet" />    <toc-item title="Timing Summary" target="Timing summary:" />   <view program="bitgen" inputState="Routed" type="Report" file="!module_name!.bgn" label="Bitgen Report">    <toc-item title="Bitgen Options" target="Summary of Bitgen Options:" />    <toc-item title="Final Summary" target="DRC detected" />  <viewgroup label="Secondary Reports" >   <view program="xplorer" inputState="Routed" type="Secondary_Report" file="!module_name!_xplorer.rpt" label="Xplorer Report"/>   <view program="netgen" inputState="Translated" type="Secondary_Report" file="netgen/translate/!module_name!_translate.nlf" label="Post-Translate Simulation Model Report" hidden="true"/>   <view program="trce" inputState="Mapped" type="Secondary_Report" file="!module_name!_preroute.twr" label="Post-Map Static Timing Report"  hidden="true"/>   <view program="netgen" inputState="Mapped" type="Secondary_Report" file="netgen/map/!module_name!_map.nlf" label="Post-Map Simulation Model Report" hidden="true"/>   <view program="par" inputState="Mapped" type="Pad_Report" file="!module_name!_pad.txt" label="Pad Report"  hidden="true"/>   <view program="par" inputState="Mapped" type="Secondary_Report" file="!module_name!.unroutes" label="Unroutes Report" hidden="true"/>   <view program="par" inputState="Routed" type="Secondary_Report" file="!module_name!.dly" label="Asynchronous Delay Report" hidden="true"/>   <view program="par" inputState="Routed" type="Secondary_Report" file="!module_name!.clk_rgn" label="Clock Region Report" hidden="true"/>   <view program="par" inputState="Routed" type="Secondary_Report" file="!module_name!.grf" label="Guide Results Report" hidden="true"/>   <view program="netgen" inputState="Routed" type="Secondary_Report" file="netgen/par/!module_name!_timesim.nlf" label="Post-Route Simulation Model Report" hidden="true"/>   <view program="xpwr" inputState="Routed" type="Report" file="!module_name!.pwr" label="Power Report"  hidden="true"/> </body></report-views>PK

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s.html" label="Partition Report" >   <view program="map" type="IOBProperties" inputState="Translated" file="testbench_map.mrp" label="IOB Properties" />   <view program="par" type="ConstraintsData" inputState="Mapped" file="testbench.par" label="Timing Constraints" />   <view program="par" type="PinoutData" inputState="Mapped" file="testbench.pad" label="Pinout Report" />   <view program="par" type="ClocksData" inputState="Mapped" file="testbench.par" label="Clock Report" />  </viewgroup>  <viewgroup label="Errors and Warnings" >   <view program="xst" type="MessageList" file="_xmsgs/xst.xmsgs" label="Synthesis Messages" hideColumns="Filtered" />   <view program="ngdbuild" type="MessageList" inputState="Synthesized" file="_xmsgs/ngdbuild.xmsgs" label="Translation Messages" hideColumns="Filtered" />   <view program="map" type="MessageList" inputState="Translated" file="_xmsgs/map.xmsgs" label="Map Messages" hideColumns="Filtered" />   <view program="par" type="MessageList" inputState="Mapped" file="_xmsgs/par.xmsgs" label="Place and Route Messages" hideColumns="Filtered" />   <view program="trce" type="MessageList" inputState="Routed" file="_xmsgs/trce.xmsgs" label="Timing Messages" hideColumns="Filtered" />   <view program="bitgen" type="MessageList" inputState="Routed" file="_xmsgs/bitgen.xmsgs" label="Bitgen Messages" hideColumns="Filtered" />   <view fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/map.xmsgs,_xmsgs/par.xmsgs,_xmsgs/trce.xmsgs,_xmsgs/bitgen.xmsgs" program="implementation" type="MessageList" inputState="Current" file="_xmsgs/*.xmsgs" label="All Current Messages" hideColumns="Filtered" />  <viewgroup label="Detailed Reports" >   <view program="xst" type="Report" file="testbench.syr" label="Synthesis Report   " >    <toc-item title="Synthesis Options Summary" target="   Synthesis Options Summary   " />    <toc-item title="HDL Compilation" target="   HDL Compilation   " />    <toc-item title="HDL Analysis" target="   HDL Analysis   " />    <toc-item title="HDL Synthesis" target="   HDL Synthesis   " />    <toc-item title="Advanced HDL Synthesis" target="   Advanced HDL Synthesis   " />    <toc-item title="Low Level Synthesis" target="   Low Level Synthesis   " />    <toc-item title="Partition Report" target="   Partition Report     " />    <toc-item title="Final Report" target="   Final Report   " />   <view program="ngdbuild" type="Report" inputState="Synthesized" file="testbench.bld" label="Translation Report" >    <toc-item title="Top of Report" target="Release" />    <toc-item title="Command Line" target="Command Line:" />    <toc-item title="Partition Status" target="Partition Implementation Status" />    <toc-item title="Final Summary" target="NGDBUILD Design Results Summary:" />   <view program="map" type="Report" inputState="Translated" file="testbench_map.mrp" label="Map Report" >    <toc-item title="Section 1: Errors" target="Section 1 - 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