Subversion Repositories cpu8080

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "addr<0>"  LOC = "g1"  ; 
NET "addr<10>"  LOC = "l3"  ;
NET "addr<11>"  LOC = "m1"  ;
NET "addr<12>"  LOC = "m2"  ;
NET "addr<13>"  LOC = "l4"  ;
NET "addr<14>"  LOC = "n1"  ;
NET "addr<1>"  LOC = "h4"  ; 
NET "addr<2>"  LOC = "h3"  ; 
NET "addr<3>"  LOC = "h1"  ; 
NET "addr<4>"  LOC = "j1"  ; 
NET "addr<5>"  LOC = "j2"  ; 
NET "addr<6>"  LOC = "j3"  ; 
NET "addr<7>"  LOC = "k1"  ; 
NET "addr<8>"  LOC = "l2"  ;
NET "addr<9>"  LOC = "k5"  ;
NET "b<0>"  LOC = "c9"  ; 
NET "b<1>"  LOC = "e7"  ; 
NET "b<2>"  LOC = "d5"  ; 
NET "clock"  LOC = "p8"  ; 
NET "data<0>"  LOC = "e2"  ; 
NET "data<1>"  LOC = "e1"  ; 
NET "data<2>"  LOC = "f3"  ; 
NET "data<3>"  LOC = "g5"  ; 
NET "data<4>"  LOC = "f2"  ; 
NET "data<5>"  LOC = "g4"  ; 
NET "data<6>"  LOC = "g3"  ; 
NET "data<7>"  LOC = "g2"  ; 
NET "diag<7>"  LOC = "m3"  ;
NET "g<0>"  LOC = "A8"  ; 
NET "g<1>"  LOC = "A5"  ; 
NET "g<2>"  LOC = "C3"  ; 
NET "hsync_n"  LOC = "B7"  ; 
NET "inta"  LOC = "p1"  ; 
NET "intr"  LOC = "m4"  ; 
NET "ps2_clk"  LOC = "b16"  ; 
NET "ps2_data"  LOC = "e13"  ; 
NET "r<0>"  LOC = "c8"  ; 
NET "r<1>"  LOC = "D6"  ; 
NET "r<2>"  LOC = "B1"  ; 
NET "readio"  LOC = "d2"  ; 
NET "readmem"  LOC = "f4"  ; 
NET "reset_n"  LOC = "E11"  ; 
NET "vsync_n"  LOC = "D8"  ; 
NET "waitr"  LOC = "l5"  ; 
NET "writeio"  LOC = "f5"  ; 
NET "writemem"  LOC = "d1"  ; 

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE