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<pre>
cpldfit: version I.33 Xilinx Inc.
No Fit Report
Design Name: cpu8080 Date: 9-15-2006, 11:54PM
Device Used: XC2C512-7-PQ208
Fitting Status: Design Rule Checking Failed
************************** Errors and Warnings ***************************
ERROR:Cpld:1062 - Design contains 2100 unique product terms, exceeds device
limit 1792.
ERROR:Cpld:1064 - Design rules checking error. Fitting process stopped.
ERROR:Cpld:868 - Cannot fit the design into any of the specified devices with
the selected implementation options.
************************* Mapped Resource Summary **************************
No logic has been mapped.
Macrocells Product Terms Function Block Registers Pins
Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot
0 /512 ( 0%) 0 /1792 ( 0%) 0 /1280 ( 0%) 0 /512 ( 0%) 0 /173 ( 0%)
** Function Block Resources **
Function Mcells FB Inps Pterms IO CTC CTR CTS CTE
Block Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot
FB1 0/16 0/40 0/56 0/ 8 0/1 0/1 0/1 0/1
FB2 0/16 0/40 0/56 0/ 4 0/1 0/1 0/1 0/1
FB3 0/16 0/40 0/56 0/ 6 0/1 0/1 0/1 0/1
FB4 0/16 0/40 0/56 0/ 5 0/1 0/1 0/1 0/1
FB5 0/16 0/40 0/56 0/ 7 0/1 0/1 0/1 0/1
FB6 0/16 0/40 0/56 0/ 3 0/1 0/1 0/1 0/1
FB7 0/16 0/40 0/56 0/ 8 0/1 0/1 0/1 0/1
FB8 0/16 0/40 0/56 0/ 3 0/1 0/1 0/1 0/1
FB9 0/16 0/40 0/56 0/ 5 0/1 0/1 0/1 0/1
FB10 0/16 0/40 0/56 0/ 6 0/1 0/1 0/1 0/1
FB11 0/16 0/40 0/56 0/ 7 0/1 0/1 0/1 0/1
FB12 0/16 0/40 0/56 0/ 8 0/1 0/1 0/1 0/1
FB13 0/16 0/40 0/56 0/ 5 0/1 0/1 0/1 0/1
FB14 0/16 0/40 0/56 0/ 5 0/1 0/1 0/1 0/1
FB15 0/16 0/40 0/56 0/ 5 0/1 0/1 0/1 0/1
FB16 0/16 0/40 0/56 0/ 5 0/1 0/1 0/1 0/1
FB17 0/16 0/40 0/56 0/ 9 0/1 0/1 0/1 0/1
FB18 0/16 0/40 0/56 0/ 3 0/1 0/1 0/1 0/1
FB19 0/16 0/40 0/56 0/ 3 0/1 0/1 0/1 0/1
FB20 0/16 0/40 0/56 0/ 6 0/1 0/1 0/1 0/1
FB21 0/16 0/40 0/56 0/ 3 0/1 0/1 0/1 0/1
FB22 0/16 0/40 0/56 0/ 8 0/1 0/1 0/1 0/1
FB23 0/16 0/40 0/56 0/ 3 0/1 0/1 0/1 0/1
FB24 0/16 0/40 0/56 0/ 7 0/1 0/1 0/1 0/1
FB25 0/16 0/40 0/56 0/ 8 0/1 0/1 0/1 0/1
FB26 0/16 0/40 0/56 0/ 8 0/1 0/1 0/1 0/1
FB27 0/16 0/40 0/56 0/ 4 0/1 0/1 0/1 0/1
FB28 0/16 0/40 0/56 0/ 3 0/1 0/1 0/1 0/1
FB29 0/16 0/40 0/56 0/ 3 0/1 0/1 0/1 0/1
FB30 0/16 0/40 0/56 0/ 6 0/1 0/1 0/1 0/1
FB31 0/16 0/40 0/56 0/ 4 0/1 0/1 0/1 0/1
FB32 0/16 0/40 0/56 0/ 5 0/1 0/1 0/1 0/1
----- ------- ------- ----- --- --- --- ---
Total 0/512 0/1280 0/1792 0/173 0/32 0/32 0/32 0/32
CTC - Control Term Clock
CTR - Control Term Reset
CTS - Control Term Set
CTE - Control Term Output Enable
* - Resource is exhausted
** Global Control Resources **
GCK GSR GTS
Used/Tot Used/Tot Used/Tot
0/3 0/1 0/4
** Pin Resources **
Signal Type Required Mapped | Pin Type Used Total
------------------------------------|------------------------------------
Input : 3 0 | I/O : 0 163
Output : 21 0 | GCK/IO : 0 3
Bidirectional : 8 0 | GTS/IO : 0 4
GCK : 0 0 | GSR/IO : 0 1
GTS : 0 0 | CDR/IO : 0 1
GSR : 0 0 | DGE/IO : 0 1
---- ----
Total 32 0
End of Mapped Resource Summary
************************* Summary of UnMapped Logic ************************
** 29 Outputs **
Signal Total Total I/O User
Name Pts Inps STD Assignment
addr<0> 7 13 LVCMOS18
addr<1> 4 7 LVCMOS18
addr<2> 6 12 LVCMOS18
addr<3> 4 7 LVCMOS18
addr<4> 6 12 LVCMOS18
addr<5> 4 7 LVCMOS18
addr<6> 6 12 LVCMOS18
addr<7> 4 7 LVCMOS18
addr<8> 6 12 LVCMOS18
addr<9> 4 7 LVCMOS18
addr<10> 6 12 LVCMOS18
addr<11> 4 7 LVCMOS18
addr<12> 6 12 LVCMOS18
addr<13> 4 7 LVCMOS18
addr<14> 6 12 LVCMOS18
addr<15> 4 7 LVCMOS18
data<0> 8 12 LVCMOS18
data<1> 8 12 LVCMOS18
data<2> 8 12 LVCMOS18
data<3> 8 12 LVCMOS18
data<4> 8 12 LVCMOS18
data<5> 8 12 LVCMOS18
data<6> 8 12 LVCMOS18
data<7> 8 12 LVCMOS18
inta 4 9 LVCMOS18
readio 0 0 LVCMOS18
readmem 10 11 LVCMOS18
writeio 0 0 LVCMOS18
writemem 6 8 LVCMOS18
** 380 Buried Nodes **
Signal Total Total User
Name Pts Inps Assignment
Madd__AUX_10_Mxor_Result<12>__xor0000 1 5
Madd__AUX_10__or0010 2 5
Madd__AUX_11__or0001 3 3
Madd__AUX_11__or0006 3 5
Madd__AUX_11__or0008 3 3
Madd__AUX_11__or0009 3 3
Madd__AUX_11__or0010 3 3
Madd__AUX_11__or0012 3 5
Madd__AUX_8__or0008 3 5
Madd__AUX_8__or0009 5 4
Madd__AUX_8__or0010 3 3
Madd__AUX_8__or0011 3 3
Madd__AUX_9__or0008 3 5
Madd__AUX_9__or0011 5 5
Madd__addsub0000__or0000 3 4
Madd__addsub0000__or0002 3 3
Madd__addsub0000__or0004 3 3
Madd__addsub0000__or0006 3 3
Madd__addsub0001__or0000 3 4
Madd__addsub0001__or0006 2 3
N_PZ_1038 2 2
N_PZ_1041 2 2
N_PZ_1043 2 2
N_PZ_1054 2 2
N_PZ_1059 2 2
N_PZ_1060 2 9
N_PZ_1061 2 9
N_PZ_1062 2 7
N_PZ_1065 3 6
N_PZ_1066 3 6
N_PZ_1076 2 2
N_PZ_1082 2 2
N_PZ_1092 2 2
N_PZ_1099 2 10
N_PZ_1100 2 13
N_PZ_1117 3 6
N_PZ_1122 1 5
N_PZ_1129 1 3
N_PZ_1133 2 14
N_PZ_1141 10 15
Signal Total Total User
Name Pts Inps Assignment
N_PZ_1143 1 3
N_PZ_1145 2 8
N_PZ_1157 2 12
N_PZ_1209 4 6
N_PZ_1213 10 12
N_PZ_1214 12 19
N_PZ_1223 1 5
N_PZ_1246 5 7
N_PZ_1260 11 14
N_PZ_1261 11 13
N_PZ_1262 3 13
N_PZ_1265 3 13
N_PZ_1266 3 12
N_PZ_1268 3 13
N_PZ_1347 1 7
N_PZ_1373 1 3
N_PZ_1432 1 14
N_PZ_1527 5 6
N_PZ_1528 1 12
N_PZ_1533 1 14
N_PZ_1536 1 14
N_PZ_1580 1 11
N_PZ_1725 3 4
N_PZ_1799 1 26
N_PZ_1819 1 2
N_PZ_1848 2 2
N_PZ_1849 2 2
N_PZ_1870 2 2
N_PZ_1887 1 2
N_PZ_1888 2 12
N_PZ_1890 2 2
N_PZ_1891 1 5
N_PZ_1894 2 6
N_PZ_1905 4 4
N_PZ_1913 1 2
N_PZ_1916 1 3
N_PZ_1921 2 4
N_PZ_1926 2 2
N_PZ_1929 2 2
N_PZ_1941 1 13
Signal Total Total User
Name Pts Inps Assignment
N_PZ_1943 2 8
N_PZ_1944 3 13
N_PZ_1945 3 13
N_PZ_1946 3 13
N_PZ_1948 2 6
N_PZ_1954 5 8
N_PZ_1966 9 12
N_PZ_1981 2 2
N_PZ_1982 2 2
N_PZ_1986 2 3
N_PZ_1995 1 4
N_PZ_1996 2 11
N_PZ_1997 5 4
N_PZ_1999 1 4
N_PZ_2000 3 13
N_PZ_2001 3 12
N_PZ_2004 3 3
N_PZ_2021 1 6
N_PZ_2031 3 3
N_PZ_2033 1 3
N_PZ_2046 1 4
N_PZ_2047 4 4
N_PZ_2048 3 4
N_PZ_2049 3 4
N_PZ_2050 3 4
N_PZ_2052 4 4
N_PZ_2054 4 4
N_PZ_2055 3 4
N_PZ_2056 3 4
N_PZ_2057 4 4
N_PZ_2067 2 4
N_PZ_2105 2 2
N_PZ_2106 3 12
N_PZ_2108 3 5
N_PZ_2111 3 3
N_PZ_2114 1 13
N_PZ_2124 2 2
N_PZ_2147 3 3
N_PZ_2148 3 3
N_PZ_2155 2 8
Signal Total Total User
Name Pts Inps Assignment
N_PZ_2168 2 2
N_PZ_2169 2 2
N_PZ_2177 1 3
N_PZ_2180 3 13
N_PZ_2181 3 13
N_PZ_2186 2 13
N_PZ_2196 1 11
N_PZ_2226 2 3
N_PZ_2232 2 14
N_PZ_2236 2 3
N_PZ_2358 3 3
N_PZ_2362 3 3
N_PZ_2405 1 13
_COND_18<0> 8 12
_COND_18<1> 8 12
_COND_18<2> 8 12
_COND_18<3> 8 12
_COND_18<4> 8 12
_COND_18<5> 8 12
_COND_18<6> 8 12
_COND_18<7> 8 12
_addsub0000<9> 2 3
_addsub0000<11> 2 3
_addsub0000<12> 2 3
_addsub0000<13> 2 3
_addsub0000<14> 2 3
_addsub0000<15> 2 3
_addsub0001<10> 2 4
_addsub0001<11> 2 3
_addsub0001<12> 2 3
_addsub0001<13> 2 3
_addsub0001<15> 2 4
_cmp_eq0004 1 8
_mux000762 24 30
_mux0009<2>72 16 19
_mux0009<4>72 11 22
_mux0009<5>72 13 21
_mux0009<6>72 11 20
_mux0009<7>72 13 21
_mux0010<8>71 14 19
Signal Total Total User
Name Pts Inps Assignment
_mux0010<9>71 15 24
_mux0010<10>71 20 25
_mux0010<11>71 14 24
_mux0010<12>71 17 26
_mux0010<13>71 17 26
_mux0010<14>71 12 27
_mux0010<15>71 13 22
_mux0014<13>8 9 21
_mux003739 11 19
_xor0000 1 8
_xor0068 1 8
addrhold2<0> 3 16
addrhold2<1> 3 16
addrhold2<2> 3 16
addrhold2<3> 3 16
addrhold2<4> 3 16
addrhold2<5> 3 16
addrhold2<6> 3 16
addrhold2<7> 3 16
addrhold2<8> 3 16
addrhold2<9> 3 16
addrhold2<10> 3 16
addrhold2<11> 3 16
addrhold2<12> 3 16
addrhold2<13> 3 16
addrhold2<14> 3 16
addrhold2<15> 3 16
addrhold<0> 21 33
addrhold<1> 9 21
addrhold<2> 9 22
addrhold<3> 9 24
addrhold<4> 9 25
addrhold<5> 9 26
addrhold<6> 9 26
addrhold<7> 11 27
addrhold<8> 9 28
addrhold<9> 9 29
addrhold<10> 9 31
addrhold<11> 9 32
addrhold<12> 9 21
Signal Total Total User
Name Pts Inps Assignment
addrhold<13> 9 21
addrhold<14> 9 22
addrhold<15> 6 26
alucin 3 10
alucout 6 10
aluopra<0> 10 15
aluopra<1> 10 15
aluopra<2> 10 15
aluopra<3> 10 15
aluopra<4> 10 15
aluopra<5> 10 15
aluopra<6> 10 15
aluopra<7> 10 15
aluoprb<0> 6 17
aluoprb<1> 6 17
aluoprb<2> 6 17
aluoprb<3> 6 17
aluoprb<4> 6 17
aluoprb<5> 6 15
aluoprb<6> 6 17
aluoprb<7> 6 17
alupar 5 5
alures<0> 6 8
alures<1> 6 8
alures<2> 2 2
alures<3> 2 2
alures<4> 2 3
alures<5> 2 2
alures<6> 2 2
alures<7> 2 2
alusel<0> 4 13
alusel<1> 4 13
alusel<2> 4 13
aluzout 3 12
auxcar 4 17
carry 7 17
carryhold 3 16
dataeno 6 8
holding<0> 7 20
holding<1> 7 21
Signal Total Total User
Name Pts Inps Assignment
holding<2> 7 21
holding<3> 8 22
holding<4> 7 21
holding<5> 7 21
holding<6> 10 22
holding<7> 7 20
m1/Madd__addsub0000__or0000 2 5
m1/Mmux__mux0000_Result1 12 14
m1/Mmux__mux0000_Result3 8 11
m1/Mmux__old_resi_28_I3_Result28 5 10
m1/Mmux__old_resi_28_I6_Result28 7 6
m1/Mmux__old_resi_28_I7_Result30 2 4
m1/Msub__AUX_23__xor0007 4 5
m1/Msub__AUX_23__xor0010 4 5
m1/Msub__AUX_23__xor0013 3 4
m1/Msub__AUX_23__xor0016 4 5
m1/Msub__AUX_23__xor0019 3 4
m1/Msub__sub0000__or0001 2 5
m1/Mxor__xor0001_Mxor__xor0000__xor0001 17 13
m1/_addsub0000<2> 2 2
m1/_addsub0000<3> 4 5
m1/_addsub0000<4> 4 5
m1/_addsub0000<5> 4 5
m1/_addsub0000<6> 4 5
m1/_addsub0000<7> 4 5
parity 3 4
pc<0> 4 18
pc<1> 5 20
pc<2> 10 22
pc<3> 6 19
pc<4> 10 19
pc<5> 8 22
pc<6> 10 22
pc<7> 5 24
pc<8> 10 20
pc<9> 6 20
pc<10> 10 21
pc<11> 5 17
pc<12> 5 15
pc<13> 4 20
Signal Total Total User
Name Pts Inps Assignment
pc<14> 5 21
pc<15> 6 22
regd<0> 8 16
regd<1> 9 17
regd<2> 9 17
regfil_0_0 6 29
regfil_0_1 6 30
regfil_0_2 6 31
regfil_0_3 6 32
regfil_0_4 6 33
regfil_0_5 6 15
regfil_0_6 7 17
regfil_0_7 6 17
regfil_1_0 6 21
regfil_1_1 6 22
regfil_1_2 6 23
regfil_1_3 6 24
regfil_1_4 6 25
regfil_1_5 6 26
regfil_1_6 10 31
regfil_1_7 6 28
regfil_2_0 8 25
regfil_2_1 9 27
regfil_2_2 9 28
regfil_2_3 9 29
regfil_2_4 9 30
regfil_2_5 11 24
regfil_2_6 12 25
regfil_2_7 11 26
regfil_3_0 8 17
regfil_3_1 8 18
regfil_3_2 8 19
regfil_3_3 8 20
regfil_3_4 8 21
regfil_3_5 8 22
regfil_3_6 9 24
regfil_3_7 8 24
regfil_4_0 13 24
regfil_4_1 13 24
regfil_4_2 13 24
Signal Total Total User
Name Pts Inps Assignment
regfil_4_3 12 25
regfil_4_4 13 24
regfil_4_5 13 24
regfil_4_6 12 24
regfil_4_7 13 23
regfil_5_0 16 28
regfil_5_1 22 29
regfil_5_2 13 23
regfil_5_3 21 33
regfil_5_4 13 19
regfil_5_5 13 19
regfil_5_6 12 20
regfil_5_7 13 19
regfil_6_0 4 8
regfil_6_1 3 7
regfil_6_2 5 19
regfil_6_3 4 17
regfil_6_4 4 8
regfil_6_5 3 7
regfil_6_6 4 14
regfil_6_7 3 7
regfil_7_0 16 29
regfil_7_1 13 27
regfil_7_2 13 27
regfil_7_3 14 27
regfil_7_4 14 28
regfil_7_5 14 27
regfil_7_6 14 27
regfil_7_7 16 29
regs<0> 7 18
regs<1> 7 17
regs<2> 7 17
sign 3 4
sp<0> 6 18
sp<1> 6 19
sp<2> 6 20
sp<3> 6 21
sp<4> 5 22
sp<5> 5 23
sp<6> 5 24
Signal Total Total User
Name Pts Inps Assignment
sp<7> 5 25
sp<8> 6 26
sp<9> 6 27
sp<10> 6 28
sp<11> 6 29
sp<12> 5 30
sp<13> 5 31
sp<14> 5 32
sp<15> 5 33
state<0> 25 28
state<1> 24 27
state<2> 9 17
state<3> 8 14
state<4> 7 8
statehold<0> 5 17
statehold<1> 7 18
statehold<2> 7 18
statehold<3> 6 18
statehold<4> 5 18
zero 3 4
** 3 Inputs **
Signal I/O User
Name STD Assignment
clock LVCMOS18
intr LVCMOS18
reset LVCMOS18
******************************* Equations ********************************
********** UnMapped Logic **********
** Outputs **
FTCPE_addr0: FTCPE port map (addr(0),addr_T(0),clock,'0','0','1');
addr_T(0) <= ((addr(0) AND N_PZ_1066 AND NOT addrhold(0))
OR (addr(0) AND NOT pc(0) AND N_PZ_1065)
OR (NOT addr(0) AND N_PZ_1066 AND addrhold(0))
OR (NOT addr(0) AND pc(0) AND N_PZ_1065)
OR (NOT reset AND addr(0) AND state(3) AND NOT state(2) AND
NOT state(4) AND state(1) AND state(0) AND _xor0000)
OR (NOT reset AND NOT addr(0) AND state(3) AND NOT state(2) AND
NOT state(4) AND state(1) AND state(0) AND NOT _xor0000));
FDCPE_addr1: FDCPE port map (addr(1),addr_D(1),clock,'0','0','1');
addr_D(1) <= ((N_PZ_1066 AND addrhold(1))
OR (pc(1) AND N_PZ_1065)
OR (N_PZ_1246 AND addr(1)));
FTCPE_addr2: FTCPE port map (addr(2),addr_T(2),clock,'0','0','1');
addr_T(2) <= ((N_PZ_1066 AND addrhold(2) AND NOT addr(2))
OR (N_PZ_1066 AND NOT addrhold(2) AND addr(2))
OR (pc(2) AND N_PZ_1065 AND NOT addr(2))
OR (NOT pc(2) AND N_PZ_1065 AND addr(2))
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND state(0) AND addr(2)));
FDCPE_addr3: FDCPE port map (addr(3),addr_D(3),clock,'0','0','1');
addr_D(3) <= ((N_PZ_1066 AND addrhold(3))
OR (pc(3) AND N_PZ_1065)
OR (N_PZ_1246 AND addr(3)));
FTCPE_addr4: FTCPE port map (addr(4),addr_T(4),clock,'0','0','1');
addr_T(4) <= ((N_PZ_1066 AND addrhold(4) AND NOT addr(4))
OR (N_PZ_1066 AND NOT addrhold(4) AND addr(4))
OR (pc(4) AND N_PZ_1065 AND NOT addr(4))
OR (NOT pc(4) AND N_PZ_1065 AND addr(4))
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND state(0) AND addr(4)));
FDCPE_addr5: FDCPE port map (addr(5),addr_D(5),clock,'0','0','1');
addr_D(5) <= ((N_PZ_1066 AND addrhold(5))
OR (pc(5) AND N_PZ_1065)
OR (N_PZ_1246 AND addr(5)));
FTCPE_addr6: FTCPE port map (addr(6),addr_T(6),clock,'0','0','1');
addr_T(6) <= ((N_PZ_1066 AND addrhold(6) AND NOT addr(6))
OR (N_PZ_1066 AND NOT addrhold(6) AND addr(6))
OR (pc(6) AND N_PZ_1065 AND NOT addr(6))
OR (NOT pc(6) AND N_PZ_1065 AND addr(6))
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND state(0) AND addr(6)));
FDCPE_addr7: FDCPE port map (addr(7),addr_D(7),clock,'0','0','1');
addr_D(7) <= ((N_PZ_1066 AND addrhold(7))
OR (pc(7) AND N_PZ_1065)
OR (N_PZ_1246 AND addr(7)));
FTCPE_addr8: FTCPE port map (addr(8),addr_T(8),clock,'0','0','1');
addr_T(8) <= ((N_PZ_1066 AND addrhold(8) AND NOT addr(8))
OR (N_PZ_1066 AND NOT addrhold(8) AND addr(8))
OR (pc(8) AND N_PZ_1065 AND NOT addr(8))
OR (NOT pc(8) AND N_PZ_1065 AND addr(8))
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND state(0) AND addr(8)));
FDCPE_addr9: FDCPE port map (addr(9),addr_D(9),clock,'0','0','1');
addr_D(9) <= ((N_PZ_1066 AND addrhold(9))
OR (pc(9) AND N_PZ_1065)
OR (N_PZ_1246 AND addr(9)));
FTCPE_addr10: FTCPE port map (addr(10),addr_T(10),clock,'0','0','1');
addr_T(10) <= ((N_PZ_1066 AND addrhold(10) AND NOT addr(10))
OR (N_PZ_1066 AND NOT addrhold(10) AND addr(10))
OR (pc(10) AND N_PZ_1065 AND NOT addr(10))
OR (NOT pc(10) AND N_PZ_1065 AND addr(10))
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND state(0) AND addr(10)));
FDCPE_addr11: FDCPE port map (addr(11),addr_D(11),clock,'0','0','1');
addr_D(11) <= ((N_PZ_1066 AND addrhold(11))
OR (pc(11) AND N_PZ_1065)
OR (addr(11) AND N_PZ_1246));
FTCPE_addr12: FTCPE port map (addr(12),addr_T(12),clock,'0','0','1');
addr_T(12) <= ((N_PZ_1066 AND addrhold(12) AND NOT addr(12))
OR (N_PZ_1066 AND NOT addrhold(12) AND addr(12))
OR (pc(12) AND N_PZ_1065 AND NOT addr(12))
OR (NOT pc(12) AND N_PZ_1065 AND addr(12))
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND state(0) AND addr(12)));
FDCPE_addr13: FDCPE port map (addr(13),addr_D(13),clock,'0','0','1');
addr_D(13) <= ((N_PZ_1066 AND addrhold(13))
OR (pc(13) AND N_PZ_1065)
OR (N_PZ_1246 AND addr(13)));
FTCPE_addr14: FTCPE port map (addr(14),addr_T(14),clock,'0','0','1');
addr_T(14) <= ((N_PZ_1066 AND addrhold(14) AND NOT addr(14))
OR (N_PZ_1066 AND NOT addrhold(14) AND addr(14))
OR (pc(14) AND N_PZ_1065 AND NOT addr(14))
OR (NOT pc(14) AND N_PZ_1065 AND addr(14))
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND state(0) AND addr(14)));
FDCPE_addr15: FDCPE port map (addr(15),addr_D(15),clock,'0','0','1');
addr_D(15) <= ((N_PZ_1066 AND addrhold(15))
OR (pc(15) AND N_PZ_1065)
OR (N_PZ_1246 AND addr(15)));
FTCPE_data0: FTCPE port map (data_I(0),data_T(0),clock,'0','0','1');
data_T(0) <= ((NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_4_0 AND NOT data(0))
OR (NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_0 AND data(0))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_5_0 AND NOT data(0))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_0 AND data(0))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND _COND_18(0) AND data(0))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT _COND_18(0) AND NOT data(0)));
data(0) <= data_I(0) when data_OE(0) = '1' else 'Z';
data_OE(0) <= dataeno;
FTCPE_data1: FTCPE port map (data_I(1),data_T(1),clock,'0','0','1');
data_T(1) <= ((NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_4_1 AND NOT data(1))
OR (NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_1 AND data(1))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_5_1 AND NOT data(1))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_1 AND data(1))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND _COND_18(1) AND data(1))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT _COND_18(1) AND NOT data(1)));
data(1) <= data_I(1) when data_OE(1) = '1' else 'Z';
data_OE(1) <= dataeno;
FTCPE_data2: FTCPE port map (data_I(2),data_T(2),clock,'0','0','1');
data_T(2) <= ((NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_4_2 AND NOT data(2))
OR (NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_2 AND data(2))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_5_2 AND NOT data(2))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_2 AND data(2))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND _COND_18(2) AND data(2))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT _COND_18(2) AND NOT data(2)));
data(2) <= data_I(2) when data_OE(2) = '1' else 'Z';
data_OE(2) <= dataeno;
FTCPE_data3: FTCPE port map (data_I(3),data_T(3),clock,'0','0','1');
data_T(3) <= ((NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_4_3 AND NOT data(3))
OR (NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_3 AND data(3))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_5_3 AND NOT data(3))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_3 AND data(3))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND _COND_18(3) AND data(3))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT _COND_18(3) AND NOT data(3)));
data(3) <= data_I(3) when data_OE(3) = '1' else 'Z';
data_OE(3) <= dataeno;
FTCPE_data4: FTCPE port map (data_I(4),data_T(4),clock,'0','0','1');
data_T(4) <= ((NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_4_4 AND NOT data(4))
OR (NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_4 AND data(4))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_5_4 AND NOT data(4))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_4 AND data(4))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND _COND_18(4) AND data(4))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT _COND_18(4) AND NOT data(4)));
data(4) <= data_I(4) when data_OE(4) = '1' else 'Z';
data_OE(4) <= dataeno;
FTCPE_data5: FTCPE port map (data_I(5),data_T(5),clock,'0','0','1');
data_T(5) <= ((NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_4_5 AND NOT data(5))
OR (NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_5 AND data(5))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_5_5 AND NOT data(5))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_5 AND data(5))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND _COND_18(5) AND data(5))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT _COND_18(5) AND NOT data(5)));
data(5) <= data_I(5) when data_OE(5) = '1' else 'Z';
data_OE(5) <= dataeno;
FTCPE_data6: FTCPE port map (data_I(6),data_T(6),clock,'0','0','1');
data_T(6) <= ((NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_4_6 AND NOT data(6))
OR (NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_6 AND data(6))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_5_6 AND NOT data(6))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_6 AND data(6))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND _COND_18(6) AND data(6))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT _COND_18(6) AND NOT data(6)));
data(6) <= data_I(6) when data_OE(6) = '1' else 'Z';
data_OE(6) <= dataeno;
FTCPE_data7: FTCPE port map (data_I(7),data_T(7),clock,'0','0','1');
data_T(7) <= ((NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_4_7 AND NOT data(7))
OR (NOT reset AND state(3) AND state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_7 AND data(7))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND regfil_5_7 AND NOT data(7))
OR (NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_7 AND data(7))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND _COND_18(7) AND data(7))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT _COND_18(7) AND NOT data(7)));
data(7) <= data_I(7) when data_OE(7) = '1' else 'Z';
data_OE(7) <= dataeno;
FTCPE_inta: FTCPE port map (inta,inta_T,clock,'0','0','1');
inta_T <= ((reset AND inta)
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND inta AND NOT intr)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT inta AND intr));
readio <= '0';
FDCPE_readmem: FDCPE port map (readmem,readmem_D,clock,'0','0','1');
readmem_D <= NOT N_PZ_1246
XOR ((state(3) AND state(1) AND N_PZ_1066 AND NOT N_PZ_1246 AND
NOT readmem)
OR (NOT state(4) AND state(1) AND N_PZ_1066 AND NOT N_PZ_1246 AND
NOT readmem)
OR (NOT reset AND state(3) AND state(1) AND NOT state(0) AND
N_PZ_1246 AND readmem)
OR (NOT reset AND NOT state(2) AND state(4) AND state(1) AND
N_PZ_1246 AND readmem)
OR (NOT reset AND NOT state(2) AND NOT state(1) AND NOT state(0) AND
N_PZ_1246 AND readmem)
OR (NOT reset AND state(3) AND NOT state(4) AND NOT state(1) AND
state(0) AND N_PZ_1246 AND readmem)
OR (NOT reset AND NOT state(3) AND state(1) AND state(0) AND
NOT N_PZ_1948 AND N_PZ_1246 AND readmem)
OR (NOT reset AND state(2) AND state(4) AND NOT N_PZ_1066 AND
NOT N_PZ_1948 AND N_PZ_1246 AND readmem));
writeio <= '0';
FTCPE_writemem: FTCPE port map (writemem,writemem_T,clock,'0','0','1');
writemem_T <= ((reset AND writemem)
OR (NOT state(2) AND NOT state(4) AND NOT state(1) AND NOT state(0) AND
writemem)
OR (NOT reset AND state(3) AND state(4) AND state(1) AND
state(0) AND NOT writemem)
OR (state(3) AND state(2) AND state(4) AND NOT state(1) AND
NOT state(0) AND writemem)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND NOT writemem));
** Buried Nodes **
Madd__AUX_10_Mxor_Result(12)__xor0000 <= (regfil_5_7 AND regfil_4_2 AND regfil_4_1 AND
regfil_4_0 AND regfil_4_3);
Madd__AUX_10__or0010 <= ((NOT regfil_4_3)
OR (regfil_5_7 AND regfil_4_2 AND regfil_4_1 AND
regfil_4_0));
Madd__AUX_11__or0001 <= ((regfil_5_2 AND sp(2))
OR (regfil_5_2 AND NOT sp(2) AND N_PZ_1725)
OR (NOT regfil_5_2 AND sp(2) AND N_PZ_1725));
Madd__AUX_11__or0006 <= ((NOT sp(7) AND N_PZ_1982)
OR (N_PZ_2108 AND N_PZ_2169 AND NOT N_PZ_1982)
OR (NOT N_PZ_2169 AND NOT sp(6) AND NOT N_PZ_1982));
Madd__AUX_11__or0008 <= ((NOT regfil_4_1 AND NOT sp(9))
OR (NOT regfil_4_1 AND NOT N_PZ_2362)
OR (NOT sp(9) AND NOT N_PZ_2362));
Madd__AUX_11__or0009 <= ((NOT regfil_4_2 AND NOT sp(10))
OR (NOT regfil_4_2 AND Madd__AUX_11__or0008)
OR (NOT sp(10) AND Madd__AUX_11__or0008));
Madd__AUX_11__or0010 <= ((NOT regfil_4_3 AND NOT sp(11))
OR (regfil_4_3 AND NOT sp(11) AND Madd__AUX_11__or0009)
OR (NOT regfil_4_3 AND sp(11) AND Madd__AUX_11__or0009));
Madd__AUX_11__or0012 <= ((N_PZ_1848 AND NOT sp(13))
OR (Madd__AUX_11__or0010 AND NOT N_PZ_1929 AND NOT N_PZ_1848)
OR (N_PZ_1929 AND NOT sp(12) AND NOT N_PZ_1848));
Madd__AUX_8__or0008 <= ((regfil_0_1 AND _addsub0000(9))
OR (regfil_4_1 AND regfil_0_0 AND N_PZ_1870)
OR (regfil_0_1 AND regfil_0_0 AND N_PZ_1870));
Madd__AUX_8__or0009 <= ((NOT regfil_0_2 AND NOT Madd__AUX_8__or0008)
OR (regfil_4_2 AND NOT regfil_0_2 AND N_PZ_1913)
OR (regfil_4_2 AND N_PZ_1913 AND NOT Madd__AUX_8__or0008)
OR (NOT regfil_4_2 AND NOT regfil_0_2 AND NOT N_PZ_1913)
OR (NOT regfil_4_2 AND NOT N_PZ_1913 AND NOT Madd__AUX_8__or0008));
Madd__AUX_8__or0010 <= ((NOT _addsub0000(11) AND Madd__AUX_8__or0009)
OR (NOT regfil_0_3 AND _addsub0000(11) AND
Madd__AUX_8__or0009)
OR (NOT regfil_0_3 AND NOT _addsub0000(11) AND
NOT Madd__AUX_8__or0009));
Madd__AUX_8__or0011 <= ((NOT regfil_0_4 AND NOT _addsub0000(12))
OR (NOT regfil_0_4 AND Madd__AUX_8__or0010)
OR (NOT _addsub0000(12) AND Madd__AUX_8__or0010));
Madd__AUX_9__or0008 <= (NOT regfil_4_1 AND N_PZ_2057)
XOR ((NOT regfil_2_1 AND NOT N_PZ_2057)
OR (regfil_4_0 AND NOT Madd__addsub0001__or0006 AND
N_PZ_2057));
Madd__AUX_9__or0011 <= ((NOT regfil_2_4 AND NOT _addsub0001(12))
OR (NOT regfil_2_3 AND NOT regfil_2_4 AND NOT N_PZ_2052)
OR (NOT regfil_2_3 AND NOT _addsub0001(12) AND NOT N_PZ_2052)
OR (NOT regfil_2_4 AND NOT _addsub0001(11) AND N_PZ_2052)
OR (NOT _addsub0001(11) AND NOT _addsub0001(12) AND N_PZ_2052));
Madd__addsub0000__or0000 <= ((regfil_5_1 AND regfil_1_1)
OR (regfil_5_0 AND regfil_1_0 AND regfil_5_1)
OR (regfil_5_0 AND regfil_1_0 AND regfil_1_1));
Madd__addsub0000__or0002 <= ((NOT regfil_5_3 AND NOT regfil_1_3)
OR (NOT regfil_5_3 AND N_PZ_2004)
OR (NOT regfil_1_3 AND N_PZ_2004));
Madd__addsub0000__or0004 <= ((NOT regfil_5_5 AND NOT regfil_1_5)
OR (regfil_5_5 AND NOT regfil_1_5 AND N_PZ_2148)
OR (NOT regfil_5_5 AND regfil_1_5 AND N_PZ_2148));
Madd__addsub0000__or0006 <= ((NOT regfil_5_7 AND NOT regfil_1_7)
OR (regfil_5_7 AND NOT regfil_1_7 AND N_PZ_2147)
OR (NOT regfil_5_7 AND regfil_1_7 AND N_PZ_2147));
Madd__addsub0001__or0000 <= ((regfil_3_1 AND regfil_5_1)
OR (regfil_5_0 AND regfil_3_0 AND regfil_3_1)
OR (regfil_5_0 AND regfil_3_0 AND regfil_5_1));
Madd__addsub0001__or0006 <= ((NOT regfil_5_7 AND N_PZ_2050)
OR (NOT regfil_3_7 AND NOT N_PZ_2050));
N_PZ_1038 <= ((aluoprb(5) AND NOT aluopra(5))
OR (NOT aluoprb(5) AND aluopra(5)));
N_PZ_1041 <= ((aluoprb(2) AND aluopra(2))
OR (NOT aluoprb(2) AND NOT aluopra(2)));
N_PZ_1043 <= ((aluoprb(1) AND NOT aluopra(1))
OR (NOT aluoprb(1) AND aluopra(1)));
N_PZ_1054 <= ((aluopra(4) AND NOT aluoprb(4))
OR (NOT aluopra(4) AND aluoprb(4)));
N_PZ_1059 <= ((aluoprb(6) AND NOT aluopra(6))
OR (NOT aluoprb(6) AND aluopra(6)));
N_PZ_1060 <= ((NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND regd(0)));
N_PZ_1061 <= ((NOT reset AND state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0)));
N_PZ_1062 <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
state(1) AND state(0))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND N_PZ_1129));
N_PZ_1065 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND NOT state(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
NOT state(1) AND state(0)));
N_PZ_1066 <= ((NOT reset AND state(3) AND NOT state(2) AND state(4) AND
NOT state(0))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(0))
OR (NOT reset AND state(2) AND state(4) AND state(1) AND
NOT state(0)));
N_PZ_1076 <= ((aluoprb(0) AND NOT aluopra(0))
OR (NOT aluoprb(0) AND aluopra(0)));
N_PZ_1082 <= ((aluoprb(3) AND NOT aluopra(3))
OR (NOT aluoprb(3) AND aluopra(3)));
N_PZ_1092 <= ((aluoprb(7) AND NOT aluopra(7))
OR (NOT aluoprb(7) AND aluopra(7)));
N_PZ_1099 <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN));
N_PZ_1100 <= ((N_PZ_1528)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN));
N_PZ_1117 <= ((reset)
OR (NOT N_PZ_1209)
OR (NOT state(0) AND data(0).PIN AND data(6).PIN AND
data(7).PIN));
N_PZ_1122 <= (regfil_5_3 AND regfil_5_0 AND regfil_5_1 AND
regfil_5_2 AND regfil_5_4);
N_PZ_1129 <= (regd(2) AND NOT regd(1) AND regd(0));
N_PZ_1133 <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND N_PZ_1921)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT data(5).PIN));
N_PZ_1141 <= ((alusel(1) AND alusel(2) AND aluopra(5))
OR (NOT alusel(1) AND m1/Mmux__old_resi_28_I3_Result28 AND
m1/_addsub0000(5))
OR (alusel(1) AND NOT alusel(0) AND alusel(2) AND aluoprb(5))
OR (alusel(1) AND NOT alusel(2) AND m1/Msub__AUX_23__xor0013 AND
m1/Msub__AUX_23__xor0010)
OR (alusel(1) AND NOT alusel(2) AND m1/Msub__AUX_23__xor0013 AND
NOT N_PZ_1999)
OR (NOT alusel(1) AND alusel(0) AND alusel(2) AND N_PZ_1038)
OR (NOT alusel(1) AND NOT alusel(2) AND NOT m1/_addsub0000(4) AND
m1/_addsub0000(5))
OR (NOT alusel(0) AND alusel(2) AND aluoprb(5) AND aluopra(5))
OR (NOT alusel(1) AND NOT alusel(2) AND
NOT m1/Mmux__old_resi_28_I3_Result28 AND m1/_addsub0000(4) AND NOT m1/_addsub0000(5))
OR (alusel(1) AND m1/Mmux__old_resi_28_I3_Result28 AND
NOT m1/Msub__AUX_23__xor0013 AND NOT m1/Msub__AUX_23__xor0010 AND
NOT m1/Msub__AUX_23__xor0007 AND NOT N_PZ_1926 AND N_PZ_2177));
N_PZ_1143 <= (regfil_5_5 AND regfil_5_6 AND N_PZ_1122);
N_PZ_1145 <= ((NOT N_PZ_1117)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND N_PZ_2236));
N_PZ_1157 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND alures(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND NOT _COND_18(3)));
N_PZ_1209 <= ((reset)
OR (state(3) AND state(2) AND NOT state(4) AND state(1) AND
state(0))
OR (NOT state(3) AND NOT state(2) AND state(4) AND NOT state(1) AND
state(0))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0)));
N_PZ_1213 <= (NOT alusel(1) AND NOT alusel(2) AND m1/_addsub0000(2))
XOR ((alusel(1) AND alusel(2) AND aluopra(2))
OR (alusel(1) AND NOT alusel(0) AND alusel(2) AND aluoprb(2))
OR (alusel(1) AND NOT alusel(0) AND NOT alusel(2) AND N_PZ_1926)
OR (alusel(1) AND NOT alusel(2) AND N_PZ_1926 AND NOT N_PZ_2177)
OR (alusel(1) AND m1/Mmux__old_resi_28_I7_Result30 AND
NOT N_PZ_1926 AND N_PZ_2177)
OR (NOT alusel(1) AND alusel(0) AND alusel(2) AND NOT N_PZ_1041)
OR (NOT alusel(1) AND alusel(2) AND
m1/Mmux__old_resi_28_I7_Result30 AND m1/_addsub0000(2))
OR (NOT alusel(0) AND alusel(2) AND aluoprb(2) AND aluopra(2))
OR (NOT alusel(1) AND NOT alusel(2) AND
NOT m1/Mmux__old_resi_28_I7_Result30 AND N_PZ_1076 AND N_PZ_1043));
N_PZ_1214 <= (alusel(1) AND NOT alusel(2) AND m1/Msub__AUX_23__xor0019)
XOR ((alusel(1) AND alusel(2) AND aluopra(7))
OR (alusel(1) AND NOT alusel(0) AND alusel(2) AND aluoprb(7))
OR (NOT alusel(1) AND alusel(0) AND alusel(2) AND N_PZ_1092)
OR (NOT alusel(1) AND NOT alusel(2) AND NOT m1/_addsub0000(6) AND
m1/_addsub0000(7))
OR (NOT alusel(1) AND m1/Mmux__old_resi_28_I3_Result28 AND
m1/_addsub0000(6) AND m1/_addsub0000(7))
OR (NOT alusel(0) AND alusel(2) AND aluoprb(7) AND aluopra(7))
OR (NOT alusel(1) AND NOT alusel(2) AND NOT m1/_addsub0000(4) AND
m1/_addsub0000(6) AND m1/_addsub0000(7))
OR (NOT alusel(1) AND NOT alusel(2) AND m1/_addsub0000(6) AND
NOT m1/_addsub0000(5) AND m1/_addsub0000(7))
OR (alusel(1) AND NOT alusel(2) AND m1/Msub__AUX_23__xor0019 AND
NOT m1/Msub__AUX_23__xor0016 AND NOT m1/Msub__AUX_23__xor0013 AND
NOT m1/Msub__AUX_23__xor0010 AND N_PZ_1999)
OR (NOT alusel(1) AND NOT alusel(2) AND
NOT m1/Mmux__old_resi_28_I3_Result28 AND m1/_addsub0000(4) AND m1/_addsub0000(6) AND
m1/_addsub0000(5) AND NOT m1/_addsub0000(7))
OR (alusel(1) AND m1/Mmux__old_resi_28_I3_Result28 AND
NOT m1/Msub__AUX_23__xor0019 AND NOT m1/Msub__AUX_23__xor0016 AND
NOT m1/Msub__AUX_23__xor0013 AND NOT m1/Msub__AUX_23__xor0010 AND
NOT m1/Msub__AUX_23__xor0007 AND NOT N_PZ_1926 AND N_PZ_2177));
N_PZ_1223 <= (N_PZ_2021 AND pc(10) AND pc(8) AND pc(9) AND pc(11));
N_PZ_1246 <= ((N_PZ_1209)
OR (state(4) AND state(0))
OR (state(3) AND NOT state(1) AND state(0))
OR (NOT state(3) AND NOT N_PZ_1066 AND NOT N_PZ_1065)
OR (NOT N_PZ_1066 AND NOT state(0) AND NOT N_PZ_1065));
N_PZ_1260 <= (NOT alusel(1) AND NOT alusel(2) AND m1/_addsub0000(3))
XOR ((alusel(1) AND alusel(2) AND aluopra(3))
OR (alusel(1) AND NOT alusel(0) AND alusel(2) AND aluoprb(3))
OR (alusel(1) AND NOT alusel(0) AND NOT alusel(2) AND
m1/Msub__AUX_23__xor0007)
OR (alusel(1) AND NOT alusel(2) AND m1/Msub__AUX_23__xor0007 AND
N_PZ_1926)
OR (alusel(1) AND NOT alusel(2) AND m1/Msub__AUX_23__xor0007 AND
NOT N_PZ_2177)
OR (NOT alusel(1) AND alusel(0) AND alusel(2) AND N_PZ_1082)
OR (NOT alusel(0) AND alusel(2) AND aluoprb(3) AND aluopra(3))
OR (alusel(1) AND m1/Mmux__old_resi_28_I7_Result30 AND
NOT m1/Msub__AUX_23__xor0007 AND NOT N_PZ_1926 AND N_PZ_2177)
OR (NOT alusel(1) AND alusel(2) AND
m1/Mmux__old_resi_28_I7_Result30 AND m1/_addsub0000(2) AND m1/_addsub0000(3))
OR (NOT alusel(1) AND NOT alusel(2) AND
NOT m1/Mmux__old_resi_28_I7_Result30 AND N_PZ_1076 AND N_PZ_1043 AND m1/_addsub0000(2)));
N_PZ_1261 <= (alusel(1) AND NOT alusel(2) AND m1/Msub__AUX_23__xor0016)
XOR ((alusel(1) AND alusel(2) AND aluopra(6))
OR (NOT alusel(1) AND m1/Mmux__old_resi_28_I3_Result28 AND
m1/_addsub0000(6))
OR (alusel(1) AND NOT alusel(0) AND alusel(2) AND aluoprb(6))
OR (NOT alusel(1) AND alusel(0) AND alusel(2) AND N_PZ_1059)
OR (NOT alusel(1) AND NOT alusel(2) AND NOT m1/_addsub0000(4) AND
m1/_addsub0000(6))
OR (NOT alusel(1) AND NOT alusel(2) AND m1/_addsub0000(6) AND
NOT m1/_addsub0000(5))
OR (NOT alusel(0) AND alusel(2) AND aluoprb(6) AND aluopra(6))
OR (alusel(1) AND m1/Mmux__old_resi_28_I3_Result28 AND
NOT m1/Msub__AUX_23__xor0016 AND NOT m1/Msub__AUX_23__xor0013 AND
NOT m1/Msub__AUX_23__xor0010)
OR (alusel(1) AND NOT alusel(2) AND
m1/Mmux__old_resi_28_I3_Result28 AND m1/Msub__AUX_23__xor0016 AND
NOT m1/Msub__AUX_23__xor0013 AND NOT m1/Msub__AUX_23__xor0010)
OR (NOT alusel(1) AND NOT alusel(2) AND
NOT m1/Mmux__old_resi_28_I3_Result28 AND m1/_addsub0000(4) AND NOT m1/_addsub0000(6) AND
m1/_addsub0000(5)));
N_PZ_1262 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND alures(1))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(1).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND NOT _COND_18(1)));
N_PZ_1265 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND alures(5))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(5).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND NOT _COND_18(5)));
N_PZ_1266 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND alures(7))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(7).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT _COND_18(7) AND NOT N_PZ_1373));
N_PZ_1268 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT alures(0))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(0).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND _COND_18(0) AND NOT N_PZ_1373));
N_PZ_1347 <= (regfil_4_2 AND regfil_4_1 AND regfil_4_0 AND
regfil_4_3 AND regfil_4_6 AND regfil_4_5 AND regfil_4_4);
N_PZ_1373 <= (regs(2) AND regs(1) AND NOT regs(0));
N_PZ_1432 <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN);
N_PZ_1527 <= ((NOT alusel(2))
OR (NOT N_PZ_1054 AND NOT aluoprb(4))
OR (alusel(1) AND alusel(0) AND NOT aluopra(4))
OR (NOT alusel(1) AND alusel(0) AND NOT N_PZ_1054)
OR (NOT alusel(1) AND NOT alusel(0) AND N_PZ_1054));
N_PZ_1528 <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819);
N_PZ_1533 <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN);
N_PZ_1536 <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
N_PZ_1580 <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1916);
N_PZ_1725 <= ((regfil_5_1 AND sp(1))
OR (regfil_5_0 AND regfil_5_1 AND sp(0))
OR (regfil_5_0 AND sp(0) AND sp(1)));
N_PZ_1799 <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1 AND
regfil_0_1 AND regfil_1_3 AND regfil_1_6 AND regfil_1_4 AND
regfil_0_3 AND regfil_1_5 AND regfil_1_7 AND regfil_0_2 AND
regfil_0_0 AND regfil_0_4);
N_PZ_1819 <= (NOT data(4).PIN AND data(5).PIN);
N_PZ_1848 <= ((regfil_4_5 AND sp(13))
OR (NOT regfil_4_5 AND NOT sp(13)));
N_PZ_1849 <= ((regfil_4_7 AND sp(15))
OR (NOT regfil_4_7 AND NOT sp(15)));
N_PZ_1870 <= ((regfil_4_0 AND Madd__addsub0000__or0006)
OR (NOT regfil_4_0 AND NOT Madd__addsub0000__or0006));
N_PZ_1887 <= (NOT regfil_7_5 AND NOT regfil_7_6);
N_PZ_1888 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND alures(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND NOT _COND_18(6)));
N_PZ_1890 <= ((regfil_7_1 AND NOT regfil_7_2)
OR (NOT regfil_7_1 AND regfil_7_2));
N_PZ_1891 <= (NOT state(0) AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND NOT N_PZ_2236);
N_PZ_1894 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0))
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0)));
N_PZ_1905 <= regfil_4_6
XOR ((NOT regfil_4_5 AND regfil_2_6)
OR (regfil_2_6 AND _addsub0001(13))
OR (regfil_4_5 AND NOT regfil_2_6 AND NOT _addsub0001(13)));
N_PZ_1913 <= (regfil_4_1 AND NOT _addsub0000(9));
N_PZ_1916 <= (data(3).PIN AND NOT data(2).PIN AND N_PZ_1819);
N_PZ_1921 <= ((N_PZ_1373)
OR (regd(2) AND regd(1) AND NOT regd(0)));
N_PZ_1926 <= ((m1/Msub__sub0000__or0001 AND N_PZ_1041)
OR (NOT m1/Msub__sub0000__or0001 AND NOT N_PZ_1041));
N_PZ_1929 <= ((regfil_4_4 AND sp(12))
OR (NOT regfil_4_4 AND NOT sp(12)));
N_PZ_1941 <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN);
N_PZ_1943 <= ((N_PZ_1157)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(3).PIN));
N_PZ_1944 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND alures(2))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(2).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND NOT _COND_18(2)));
N_PZ_1945 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT alures(2))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(2).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND _COND_18(2)));
N_PZ_1946 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT alures(1))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(1).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND _COND_18(1)));
N_PZ_1948 <= ((NOT reset AND state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
state(1) AND state(0)));
N_PZ_1954 <= ((NOT aluopra(1) AND NOT m1/Msub__sub0000__or0001 AND
NOT aluopra(0))
OR (alusel(1) AND alusel(0) AND NOT aluopra(1) AND NOT aluopra(0))
OR (NOT alusel(1) AND alusel(0) AND NOT N_PZ_1076 AND NOT N_PZ_1043)
OR (NOT alusel(1) AND NOT alusel(0) AND N_PZ_1076 AND
NOT m1/Madd__addsub0000__or0000)
OR (NOT alusel(1) AND NOT alusel(0) AND
NOT m1/Madd__addsub0000__or0000 AND NOT aluopra(0)));
N_PZ_1966 <= ((NOT data(0).PIN AND data(7).PIN AND N_PZ_1916 AND parity)
OR (NOT data(4).PIN AND NOT data(3).PIN AND NOT data(2).PIN AND
data(0).PIN AND data(7).PIN AND NOT data(5).PIN)
OR (NOT data(4).PIN AND NOT data(3).PIN AND NOT data(2).PIN AND
data(7).PIN AND NOT data(5).PIN AND NOT zero)
OR (NOT data(3).PIN AND NOT data(2).PIN AND NOT data(0).PIN AND
data(7).PIN AND N_PZ_1819 AND NOT parity)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(0).PIN AND data(7).PIN AND data(5).PIN AND sign)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(0).PIN AND data(7).PIN AND NOT data(5).PIN AND carry)
OR (data(4).PIN AND NOT data(3).PIN AND NOT data(2).PIN AND
NOT data(0).PIN AND data(7).PIN AND data(5).PIN AND NOT sign)
OR (data(4).PIN AND NOT data(3).PIN AND NOT data(2).PIN AND
NOT data(0).PIN AND data(7).PIN AND NOT data(5).PIN AND NOT carry)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(0).PIN AND data(7).PIN AND NOT data(5).PIN AND zero));
N_PZ_1981 <= ((regfil_5_5 AND sp(5))
OR (NOT regfil_5_5 AND NOT sp(5)));
N_PZ_1982 <= ((regfil_5_7 AND sp(7))
OR (NOT regfil_5_7 AND NOT sp(7)));
N_PZ_1986 <= ((NOT regfil_7_3)
OR (NOT regfil_7_1 AND NOT regfil_7_2));
N_PZ_1995 <= (regfil_4_5 AND regfil_4_4 AND N_PZ_1143 AND
Madd__AUX_10_Mxor_Result(12)__xor0000);
N_PZ_1996 <= ((NOT reset AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0))
OR (NOT reset AND NOT state(3) AND NOT state(4) AND state(1) AND
NOT N_PZ_1066 AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373));
N_PZ_1997 <= N_PZ_1141
XOR ((N_PZ_1260 AND N_PZ_1214 AND NOT N_PZ_2124)
OR (N_PZ_1260 AND NOT N_PZ_1214 AND N_PZ_2124)
OR (NOT N_PZ_1260 AND N_PZ_1214 AND N_PZ_2124)
OR (NOT N_PZ_1260 AND NOT N_PZ_1214 AND NOT N_PZ_2124));
N_PZ_1999 <= (alusel(0) AND NOT m1/Msub__AUX_23__xor0007 AND NOT N_PZ_1926 AND
N_PZ_2177);
N_PZ_2000 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT alures(5))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(5).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND _COND_18(5)));
N_PZ_2001 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT alures(7))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(7).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND _COND_18(7) AND NOT N_PZ_1373));
N_PZ_2004 <= ((NOT regfil_5_2 AND NOT regfil_1_2)
OR (NOT regfil_5_2 AND NOT Madd__addsub0000__or0000)
OR (NOT regfil_1_2 AND NOT Madd__addsub0000__or0000));
N_PZ_2021 <= (pc(7) AND pc(3) AND pc(6) AND pc(4) AND N_PZ_2033 AND
pc(5));
N_PZ_2031 <= ((NOT regfil_2_5 AND Madd__AUX_9__or0011)
OR (NOT regfil_2_5 AND NOT _addsub0001(13))
OR (Madd__AUX_9__or0011 AND NOT _addsub0001(13)));
N_PZ_2033 <= (pc(0) AND pc(1) AND pc(2));
N_PZ_2046 <= (regfil_4_5 AND regfil_4_4 AND NOT Madd__AUX_10__or0010 AND
Madd__AUX_10_Mxor_Result(12)__xor0000);
N_PZ_2047 <= regfil_5_4
XOR ((NOT regfil_5_3 AND NOT regfil_3_3)
OR (NOT regfil_5_3 AND NOT N_PZ_2358)
OR (NOT regfil_3_3 AND NOT N_PZ_2358));
N_PZ_2048 <= regfil_5_5
XOR ((NOT regfil_5_4 AND N_PZ_2047)
OR (NOT regfil_3_4 AND NOT N_PZ_2047));
N_PZ_2049 <= regfil_5_6
XOR ((NOT regfil_5_5 AND N_PZ_2048)
OR (NOT regfil_3_5 AND NOT N_PZ_2048));
N_PZ_2050 <= regfil_5_7
XOR ((NOT regfil_3_6 AND NOT N_PZ_2049)
OR (NOT regfil_5_6 AND N_PZ_2049));
N_PZ_2052 <= _addsub0001(11)
XOR ((NOT regfil_2_2 AND NOT _addsub0001(10))
OR (NOT regfil_2_2 AND Madd__AUX_9__or0008)
OR (NOT _addsub0001(10) AND Madd__AUX_9__or0008));
N_PZ_2054 <= _addsub0000(14)
XOR ((NOT regfil_0_5 AND Madd__AUX_8__or0011)
OR (NOT regfil_0_5 AND NOT _addsub0000(13))
OR (Madd__AUX_8__or0011 AND NOT _addsub0000(13)));
N_PZ_2055 <= _addsub0001(15)
XOR ((NOT regfil_2_6 AND NOT N_PZ_1905)
OR (N_PZ_1905 AND N_PZ_2031));
N_PZ_2056 <= _addsub0000(15)
XOR ((NOT regfil_0_6 AND NOT N_PZ_2054)
OR (N_PZ_2054 AND NOT _addsub0000(14)));
N_PZ_2057 <= regfil_4_1
XOR ((NOT regfil_4_0 AND NOT regfil_2_0)
OR (NOT regfil_4_0 AND Madd__addsub0001__or0006)
OR (NOT regfil_2_0 AND Madd__addsub0001__or0006));
N_PZ_2067 <= ((N_PZ_1209 AND NOT N_PZ_1145)
OR (N_PZ_1209 AND N_PZ_1223 AND pc(12)));
N_PZ_2105 <= ((regfil_4_6 AND NOT sp(14))
OR (NOT regfil_4_6 AND sp(14)));
N_PZ_2106 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT alures(6))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(6).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND _COND_18(6)));
N_PZ_2108 <= ((NOT sp(5) AND N_PZ_1981)
OR (NOT sp(4) AND NOT N_PZ_2168 AND NOT N_PZ_1981)
OR (N_PZ_2168 AND NOT N_PZ_1981 AND N_PZ_2111));
N_PZ_2111 <= ((NOT regfil_5_3 AND NOT sp(3))
OR (NOT regfil_5_3 AND NOT Madd__AUX_11__or0001)
OR (NOT sp(3) AND NOT Madd__AUX_11__or0001));
N_PZ_2114 <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819);
N_PZ_2124 <= ((N_PZ_1213 AND
NOT m1/Mxor__xor0001_Mxor__xor0000__xor0001)
OR (NOT N_PZ_1213 AND
m1/Mxor__xor0001_Mxor__xor0000__xor0001));
N_PZ_2147 <= ((NOT regfil_5_6 AND NOT regfil_1_6)
OR (NOT regfil_5_6 AND Madd__addsub0000__or0004)
OR (NOT regfil_1_6 AND Madd__addsub0000__or0004));
N_PZ_2148 <= ((NOT regfil_5_4 AND NOT regfil_1_4)
OR (NOT regfil_5_4 AND Madd__addsub0000__or0002)
OR (NOT regfil_1_4 AND Madd__addsub0000__or0002));
N_PZ_2155 <= ((NOT N_PZ_2114)
OR (data(4).PIN AND NOT data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT data(5).PIN));
N_PZ_2168 <= ((regfil_5_4 AND NOT sp(4))
OR (NOT regfil_5_4 AND sp(4)));
N_PZ_2169 <= ((regfil_5_6 AND NOT sp(6))
OR (NOT regfil_5_6 AND sp(6)));
N_PZ_2177 <= (NOT N_PZ_1076 AND NOT N_PZ_1043 AND alucin);
N_PZ_2180 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT alures(3))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(3).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND _COND_18(3)));
N_PZ_2181 <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT alures(4))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(4).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND _COND_18(4)));
N_PZ_2186 <= ((NOT reset AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND regd(2) AND regd(1) AND NOT regd(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND NOT regd(0) AND NOT N_PZ_1373));
N_PZ_2196 <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND N_PZ_1129);
N_PZ_2226 <= ((regfil_2_7 AND NOT N_PZ_2055)
OR (N_PZ_2055 AND _addsub0001(15)));
N_PZ_2232 <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND data(6).PIN AND data(7).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(3).PIN AND
NOT data(2).PIN AND data(1).PIN AND data(6).PIN AND data(7).PIN AND
NOT data(5).PIN));
N_PZ_2236 <= ((NOT data(2).PIN AND data(1).PIN)
OR (NOT data(1).PIN AND NOT N_PZ_1916));
N_PZ_2358 <= ((regfil_3_2 AND regfil_5_2)
OR (regfil_3_2 AND Madd__addsub0001__or0000)
OR (regfil_5_2 AND Madd__addsub0001__or0000));
N_PZ_2362 <= ((regfil_4_0 AND sp(8))
OR (regfil_4_0 AND NOT sp(8) AND NOT Madd__AUX_11__or0006)
OR (NOT regfil_4_0 AND sp(8) AND NOT Madd__AUX_11__or0006));
N_PZ_2405 <= (addrhold(7) AND addrhold(3) AND addrhold(0) AND
addrhold(9) AND addrhold(8) AND addrhold(1) AND addrhold(2) AND
addrhold(10) AND addrhold(4) AND addrhold(11) AND addrhold(5) AND
addrhold(6) AND N_PZ_1948);
_COND_18(0) <= ((N_PZ_1373 AND NOT regfil_6_0)
OR (regs(2) AND regs(1) AND NOT regfil_7_0 AND regs(0))
OR (regs(2) AND NOT regs(1) AND NOT regfil_5_0 AND regs(0))
OR (regs(2) AND NOT regs(1) AND NOT regfil_4_0 AND NOT regs(0))
OR (NOT regs(2) AND regs(1) AND NOT regfil_3_0 AND regs(0))
OR (NOT regs(2) AND regs(1) AND NOT regs(0) AND NOT regfil_2_0)
OR (NOT regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_1_0)
OR (NOT regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_0_0));
_COND_18(1) <= ((N_PZ_1373 AND NOT regfil_6_1)
OR (regs(2) AND regs(1) AND NOT regfil_7_1 AND regs(0))
OR (regs(2) AND NOT regs(1) AND NOT regfil_4_1 AND NOT regs(0))
OR (regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_5_1)
OR (NOT regs(2) AND regs(1) AND regs(0) AND NOT regfil_3_1)
OR (NOT regs(2) AND regs(1) AND NOT regs(0) AND NOT regfil_2_1)
OR (NOT regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_1_1)
OR (NOT regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_0_1));
_COND_18(2) <= ((N_PZ_1373 AND NOT regfil_6_2)
OR (regs(2) AND regs(1) AND NOT regfil_7_2 AND regs(0))
OR (regs(2) AND NOT regs(1) AND NOT regfil_4_2 AND NOT regs(0))
OR (regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_5_2)
OR (NOT regs(2) AND regs(1) AND regs(0) AND NOT regfil_3_2)
OR (NOT regs(2) AND regs(1) AND NOT regs(0) AND NOT regfil_2_2)
OR (NOT regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_1_2)
OR (NOT regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_0_2));
_COND_18(3) <= ((N_PZ_1373 AND NOT regfil_6_3)
OR (regs(2) AND regs(1) AND NOT regfil_7_3 AND regs(0))
OR (regs(2) AND NOT regs(1) AND NOT regfil_5_3 AND regs(0))
OR (regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_4_3)
OR (NOT regs(2) AND regs(1) AND regs(0) AND NOT regfil_3_3)
OR (NOT regs(2) AND regs(1) AND NOT regs(0) AND NOT regfil_2_3)
OR (NOT regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_1_3)
OR (NOT regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_0_3));
_COND_18(4) <= ((N_PZ_1373 AND NOT regfil_6_4)
OR (regs(2) AND regs(1) AND regs(0) AND NOT regfil_7_4)
OR (regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_5_4)
OR (regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_4_4)
OR (NOT regs(2) AND regs(1) AND regs(0) AND NOT regfil_3_4)
OR (NOT regs(2) AND regs(1) AND NOT regs(0) AND NOT regfil_2_4)
OR (NOT regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_1_4)
OR (NOT regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_0_4));
_COND_18(5) <= ((N_PZ_1373 AND NOT regfil_6_5)
OR (regs(2) AND regs(1) AND regs(0) AND NOT regfil_7_5)
OR (regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_5_5)
OR (regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_4_5)
OR (NOT regs(2) AND regs(1) AND regs(0) AND NOT regfil_3_5)
OR (NOT regs(2) AND regs(1) AND NOT regs(0) AND NOT regfil_2_5)
OR (NOT regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_1_5)
OR (NOT regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_0_5));
_COND_18(6) <= ((N_PZ_1373 AND NOT regfil_6_6)
OR (regs(2) AND regs(1) AND regs(0) AND NOT regfil_7_6)
OR (regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_5_6)
OR (regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_4_6)
OR (NOT regs(2) AND regs(1) AND regs(0) AND NOT regfil_3_6)
OR (NOT regs(2) AND regs(1) AND NOT regs(0) AND NOT regfil_2_6)
OR (NOT regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_1_6)
OR (NOT regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_0_6));
_COND_18(7) <= ((N_PZ_1373 AND NOT regfil_6_7)
OR (regs(2) AND regs(1) AND regs(0) AND NOT regfil_7_7)
OR (regs(2) AND NOT regs(1) AND NOT regfil_5_7 AND regs(0))
OR (regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_4_7)
OR (NOT regs(2) AND regs(1) AND regs(0) AND NOT regfil_3_7)
OR (NOT regs(2) AND regs(1) AND NOT regs(0) AND NOT regfil_2_7)
OR (NOT regs(2) AND NOT regs(1) AND regs(0) AND NOT regfil_1_7)
OR (NOT regs(2) AND NOT regs(1) AND NOT regs(0) AND NOT regfil_0_7));
_addsub0000(9) <= regfil_4_1
XOR (regfil_4_0 AND NOT Madd__addsub0000__or0006);
_addsub0000(11) <= regfil_4_3
XOR (regfil_4_2 AND N_PZ_1913);
_addsub0000(12) <= regfil_4_4
XOR (regfil_4_3 AND NOT _addsub0000(11));
_addsub0000(13) <= regfil_4_5
XOR (regfil_4_4 AND NOT _addsub0000(12));
_addsub0000(14) <= regfil_4_6
XOR (regfil_4_5 AND NOT _addsub0000(13));
_addsub0000(15) <= regfil_4_7
XOR (regfil_4_6 AND NOT _addsub0000(14));
_addsub0001(10) <= regfil_4_2
XOR (regfil_4_1 AND regfil_4_0 AND
NOT Madd__addsub0001__or0006);
_addsub0001(11) <= regfil_4_3
XOR (regfil_4_2 AND NOT _addsub0001(10));
_addsub0001(12) <= regfil_4_4
XOR (regfil_4_3 AND NOT _addsub0001(11));
_addsub0001(13) <= regfil_4_5
XOR (regfil_4_4 AND NOT _addsub0001(12));
_addsub0001(15) <= regfil_4_7
XOR (regfil_4_6 AND regfil_4_5 AND NOT _addsub0001(13));
_cmp_eq0004 <= (data(4).PIN AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND data(6).PIN AND NOT data(7).PIN AND
data(5).PIN);
_mux000762 <= ((NOT state(3) AND NOT data(4).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND NOT N_PZ_1819 AND NOT N_PZ_2236 AND
regfil_7_7)
OR (NOT state(3) AND NOT data(3).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND NOT N_PZ_1819 AND
NOT N_PZ_2236)
OR (NOT state(3) AND NOT data(3).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND NOT N_PZ_1819 AND NOT N_PZ_2236 AND
regfil_7_7)
OR (NOT state(3) AND NOT data(3).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND NOT N_PZ_2236 AND regfil_7_7 AND
NOT N_PZ_1887)
OR (NOT state(3) AND NOT data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND NOT N_PZ_2236 AND regfil_4_7 AND
NOT regfil_4_6)
OR (NOT state(3) AND NOT data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND NOT N_PZ_2236 AND regfil_4_7 AND
NOT N_PZ_2046)
OR (NOT state(3) AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN AND NOT carry AND NOT N_PZ_1819 AND NOT N_PZ_2236)
OR (NOT state(3) AND data(4).PIN AND data(3).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT data(5).PIN AND
NOT N_PZ_2236 AND carryhold)
OR (NOT state(3) AND NOT data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND NOT N_PZ_2236 AND NOT regfil_4_7 AND
regfil_4_6 AND N_PZ_2046)
OR (NOT state(3) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND NOT regfil_4_7 AND N_PZ_2226)
OR (NOT state(3) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND Madd__addsub0001__or0006 AND
N_PZ_2226)
OR (NOT state(3) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND NOT N_PZ_1347 AND N_PZ_2226)
OR (NOT state(3) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND N_PZ_2236 AND N_PZ_1849 AND sp(15))
OR (NOT state(3) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_2236 AND NOT regfil_4_7 AND regfil_0_7 AND NOT N_PZ_2056)
OR (NOT state(3) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_2236 AND NOT regfil_4_7 AND N_PZ_2056 AND
_addsub0000(15))
OR (NOT state(3) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_2236 AND regfil_0_7 AND
Madd__addsub0000__or0006 AND NOT N_PZ_2056)
OR (NOT state(3) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_2236 AND Madd__addsub0000__or0006 AND N_PZ_2056 AND
_addsub0000(15))
OR (NOT state(3) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND regfil_4_7 AND regfil_0_7 AND NOT N_PZ_2056 AND NOT N_PZ_1347)
OR (NOT state(3) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND regfil_4_7 AND N_PZ_2056 AND _addsub0000(15) AND
NOT N_PZ_1347)
OR (NOT state(3) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND N_PZ_2236 AND NOT Madd__AUX_11__or0012 AND N_PZ_2105 AND
NOT N_PZ_1849)
OR (NOT state(3) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND N_PZ_2236 AND NOT N_PZ_2105 AND sp(14) AND NOT N_PZ_1849)
OR (NOT state(3) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND regfil_4_7 AND
NOT Madd__addsub0001__or0006 AND N_PZ_1347 AND NOT N_PZ_2226)
OR (NOT state(3) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_2236 AND regfil_4_7 AND NOT regfil_0_7 AND
NOT Madd__addsub0000__or0006 AND NOT N_PZ_2056 AND N_PZ_1347)
OR (NOT state(3) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_2236 AND regfil_4_7 AND
NOT Madd__addsub0000__or0006 AND N_PZ_2056 AND NOT _addsub0000(15) AND N_PZ_1347));
_mux0009(2)72 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND regfil_5_1)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_5_0 AND
regfil_5_2)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_5_1 AND
regfil_5_2)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_5_0 AND
regfil_5_1 AND NOT regfil_5_2)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND regfil_5_2 AND sp(2) AND N_PZ_1725)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND regfil_5_2 AND NOT sp(2) AND NOT N_PZ_1725)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT regfil_5_2 AND sp(2) AND NOT N_PZ_1725)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT regfil_5_2 AND NOT sp(2) AND N_PZ_1725)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_3_2 AND regfil_5_2 AND
Madd__addsub0001__or0000)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_3_2 AND NOT regfil_5_2 AND
NOT Madd__addsub0001__or0000)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_3_2 AND regfil_5_2 AND
NOT Madd__addsub0001__or0000)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_3_2 AND NOT regfil_5_2 AND
Madd__addsub0001__or0000)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_5_2 AND regfil_1_2 AND
Madd__addsub0000__or0000)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_5_2 AND NOT regfil_1_2 AND
NOT Madd__addsub0000__or0000)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_5_2 AND regfil_1_2 AND
NOT Madd__addsub0000__or0000)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_5_2 AND NOT regfil_1_2 AND
Madd__addsub0000__or0000));
_mux0009(4)72 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT N_PZ_2236 AND regfil_5_3)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND N_PZ_2236 AND regfil_5_4 AND NOT N_PZ_1122)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_3_4 AND N_PZ_2047)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_3_4 AND NOT N_PZ_2047)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
N_PZ_2236 AND N_PZ_2168 AND N_PZ_2111)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
N_PZ_2236 AND NOT N_PZ_2168 AND NOT N_PZ_2111)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND regfil_5_4 AND regfil_1_4 AND
NOT Madd__addsub0000__or0002)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND regfil_5_4 AND NOT regfil_1_4 AND
Madd__addsub0000__or0002)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND NOT regfil_5_4 AND regfil_1_4 AND
Madd__addsub0000__or0002)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND NOT regfil_5_4 AND NOT regfil_1_4 AND
NOT Madd__addsub0000__or0002)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND N_PZ_2236 AND regfil_5_3 AND regfil_5_0 AND
regfil_5_1 AND regfil_5_2 AND NOT N_PZ_1122));
_mux0009(5)72 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT N_PZ_2236 AND regfil_5_4)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND N_PZ_2236 AND regfil_5_5 AND NOT N_PZ_1122)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND N_PZ_2236 AND NOT regfil_5_5 AND N_PZ_1122)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_3_5 AND N_PZ_2048)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_3_5 AND NOT N_PZ_2048)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(4) AND NOT N_PZ_2168 AND N_PZ_1981)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT sp(4) AND NOT N_PZ_2168 AND NOT N_PZ_1981)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND N_PZ_2168 AND N_PZ_1981 AND NOT N_PZ_2111)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND N_PZ_2168 AND NOT N_PZ_1981 AND N_PZ_2111)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_5_5 AND regfil_1_5 AND NOT N_PZ_2148)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_5_5 AND NOT regfil_1_5 AND N_PZ_2148)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_5_5 AND regfil_1_5 AND N_PZ_2148)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_5_5 AND NOT regfil_1_5 AND NOT N_PZ_2148));
_mux0009(6)72 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT N_PZ_2236 AND regfil_5_5)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND N_PZ_2236 AND regfil_5_6 AND NOT N_PZ_1143)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND N_PZ_2236 AND regfil_5_5 AND NOT N_PZ_1143 AND
N_PZ_1122)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_3_6 AND N_PZ_2049)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_3_6 AND NOT N_PZ_2049)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
N_PZ_2236 AND N_PZ_2108 AND N_PZ_2169)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
N_PZ_2236 AND NOT N_PZ_2108 AND NOT N_PZ_2169)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND regfil_5_6 AND regfil_1_6 AND
NOT Madd__addsub0000__or0004)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND regfil_5_6 AND NOT regfil_1_6 AND
Madd__addsub0000__or0004)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND NOT regfil_5_6 AND regfil_1_6 AND
Madd__addsub0000__or0004)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND NOT regfil_5_6 AND NOT regfil_1_6 AND
NOT Madd__addsub0000__or0004));
_mux0009(7)72 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT N_PZ_2236 AND regfil_5_6)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND regfil_5_7 AND N_PZ_2236 AND NOT N_PZ_1143)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_5_7 AND N_PZ_2236 AND N_PZ_1143)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_3_7 AND N_PZ_2050)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_3_7 AND NOT N_PZ_2050)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND N_PZ_2108 AND N_PZ_2169 AND NOT N_PZ_1982)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT N_PZ_2108 AND N_PZ_2169 AND N_PZ_1982)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT N_PZ_2169 AND sp(6) AND N_PZ_1982)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT N_PZ_2169 AND NOT sp(6) AND NOT N_PZ_1982)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_5_7 AND regfil_1_7 AND NOT N_PZ_2147)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_5_7 AND NOT regfil_1_7 AND N_PZ_2147)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_5_7 AND regfil_1_7 AND N_PZ_2147)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_5_7 AND NOT regfil_1_7 AND NOT N_PZ_2147));
_mux0010(8)71 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND regfil_5_7 AND NOT N_PZ_2236)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_5_7 AND N_PZ_2236 AND regfil_4_0)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND N_PZ_2236 AND regfil_4_0 AND NOT N_PZ_1143)
OR (data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1819 AND regfil_5_7 AND N_PZ_2236 AND NOT regfil_4_0 AND
N_PZ_1143)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND regfil_0_0 AND NOT N_PZ_1870)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_2236 AND NOT regfil_0_0 AND N_PZ_1870)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_4_0 AND regfil_2_0 AND
NOT Madd__addsub0001__or0006)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_4_0 AND NOT regfil_2_0 AND
Madd__addsub0001__or0006)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_4_0 AND regfil_2_0 AND
Madd__addsub0001__or0006)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_4_0 AND NOT regfil_2_0 AND
NOT Madd__addsub0001__or0006)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
N_PZ_2236 AND regfil_4_0 AND sp(8) AND NOT Madd__AUX_11__or0006)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
N_PZ_2236 AND regfil_4_0 AND NOT sp(8) AND Madd__AUX_11__or0006)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
N_PZ_2236 AND NOT regfil_4_0 AND sp(8) AND Madd__AUX_11__or0006)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
N_PZ_2236 AND NOT regfil_4_0 AND NOT sp(8) AND NOT Madd__AUX_11__or0006));
_mux0010(9)71 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND regfil_4_0)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_5_7 AND
regfil_4_1)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_1 AND
NOT regfil_4_0)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_1 AND
NOT N_PZ_1143)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_1 AND N_PZ_2057)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_2_1 AND NOT N_PZ_2057)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND regfil_0_1 AND NOT Madd__AUX_8__or0008)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND _addsub0000(9) AND NOT Madd__AUX_8__or0008)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND regfil_4_1 AND Madd__AUX_11__or0008)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND sp(9) AND Madd__AUX_11__or0008)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND Madd__AUX_11__or0008 AND N_PZ_2362)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_5_7 AND
NOT regfil_4_1 AND regfil_4_0 AND N_PZ_1143)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND regfil_0_0 AND NOT Madd__AUX_8__or0008 AND N_PZ_1870)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND regfil_4_1 AND sp(9) AND N_PZ_2362)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND regfil_0_1 AND regfil_0_0 AND _addsub0000(9) AND
N_PZ_1870));
_mux0010(10)71 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND regfil_4_1)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_5_7 AND
regfil_4_2)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_2 AND
NOT regfil_4_1)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_2 AND
NOT regfil_4_0)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_2 AND
NOT N_PZ_1143)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND regfil_4_2 AND Madd__AUX_11__or0009)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(10) AND Madd__AUX_11__or0009)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND Madd__AUX_11__or0009 AND NOT Madd__AUX_11__or0008)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_0_2 AND Madd__AUX_8__or0009)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND Madd__AUX_8__or0009 AND Madd__AUX_8__or0008)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT regfil_4_2 AND N_PZ_1913 AND Madd__AUX_8__or0009)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND regfil_4_2 AND sp(10) AND NOT Madd__AUX_11__or0008)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_2 AND _addsub0001(10) AND
NOT Madd__AUX_9__or0008)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_2 AND NOT _addsub0001(10) AND
Madd__AUX_9__or0008)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_2_2 AND _addsub0001(10) AND
Madd__AUX_9__or0008)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_2_2 AND NOT _addsub0001(10) AND
NOT Madd__AUX_9__or0008)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_4_2 AND NOT N_PZ_1913 AND Madd__AUX_8__or0009)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT regfil_4_2 AND regfil_0_2 AND N_PZ_1913 AND Madd__AUX_8__or0008)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_5_7 AND
NOT regfil_4_2 AND regfil_4_1 AND regfil_4_0 AND N_PZ_1143)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_4_2 AND regfil_0_2 AND NOT N_PZ_1913 AND
Madd__AUX_8__or0008));
_mux0010(11)71 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND regfil_4_2)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_3 AND
NOT N_PZ_1143)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_3 AND
NOT Madd__AUX_10_Mxor_Result(12)__xor0000)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_3 AND N_PZ_2052)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_2_3 AND NOT N_PZ_2052)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND regfil_0_3 AND _addsub0000(11) AND
NOT Madd__AUX_8__or0009)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND regfil_0_3 AND NOT _addsub0000(11) AND
Madd__AUX_8__or0009)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND NOT regfil_0_3 AND _addsub0000(11) AND
Madd__AUX_8__or0009)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND NOT regfil_0_3 AND NOT _addsub0000(11) AND
NOT Madd__AUX_8__or0009)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND regfil_4_3 AND sp(11) AND NOT Madd__AUX_11__or0009)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND regfil_4_3 AND NOT sp(11) AND Madd__AUX_11__or0009)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND NOT regfil_4_3 AND sp(11) AND Madd__AUX_11__or0009)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND NOT regfil_4_3 AND NOT sp(11) AND NOT Madd__AUX_11__or0009)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_5_7 AND
regfil_4_2 AND regfil_4_1 AND regfil_4_0 AND NOT regfil_4_3 AND
N_PZ_1143));
_mux0010(12)71 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND Madd__AUX_10__or0010 AND
Madd__AUX_10_Mxor_Result(12)__xor0000)
OR (NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND NOT Madd__AUX_10__or0010 AND
NOT Madd__AUX_10_Mxor_Result(12)__xor0000)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_4 AND
NOT N_PZ_1143)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_4 AND
NOT Madd__AUX_10_Mxor_Result(12)__xor0000)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_4_4 AND
N_PZ_1143 AND Madd__AUX_10_Mxor_Result(12)__xor0000)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_4 AND Madd__AUX_9__or0011)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND _addsub0001(12) AND Madd__AUX_9__or0011)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1819 AND regfil_0_4 AND Madd__AUX_8__or0011)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1819 AND _addsub0000(12) AND Madd__AUX_8__or0011)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1819 AND NOT Madd__AUX_8__or0010 AND Madd__AUX_8__or0011)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1819 AND Madd__AUX_11__or0010 AND NOT N_PZ_1929)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1819 AND NOT Madd__AUX_11__or0010 AND N_PZ_1929)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_3 AND NOT N_PZ_2052 AND Madd__AUX_9__or0011)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND _addsub0001(11) AND N_PZ_2052 AND
Madd__AUX_9__or0011)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1819 AND regfil_0_4 AND _addsub0000(12) AND
NOT Madd__AUX_8__or0010)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_3 AND regfil_2_4 AND _addsub0001(12) AND
NOT N_PZ_2052)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_4 AND _addsub0001(11) AND _addsub0001(12) AND
N_PZ_2052));
_mux0010(13)71 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND regfil_4_4 AND Madd__AUX_10__or0010)
OR (NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND regfil_4_4 AND
NOT Madd__AUX_10_Mxor_Result(12)__xor0000)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_5 AND
NOT N_PZ_1995)
OR (NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND NOT regfil_4_4 AND NOT Madd__AUX_10__or0010 AND
Madd__AUX_10_Mxor_Result(12)__xor0000)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_4_5 AND
regfil_4_4 AND N_PZ_1143 AND Madd__AUX_10_Mxor_Result(12)__xor0000)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_5 AND Madd__AUX_9__or0011 AND
NOT _addsub0001(13))
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_5 AND NOT Madd__AUX_9__or0011 AND
_addsub0001(13))
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_2_5 AND Madd__AUX_9__or0011 AND
_addsub0001(13))
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_2_5 AND NOT Madd__AUX_9__or0011 AND
NOT _addsub0001(13))
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND regfil_0_5 AND Madd__AUX_8__or0011 AND
NOT _addsub0000(13))
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND regfil_0_5 AND NOT Madd__AUX_8__or0011 AND
_addsub0000(13))
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND NOT regfil_0_5 AND Madd__AUX_8__or0011 AND
_addsub0000(13))
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND NOT regfil_0_5 AND NOT Madd__AUX_8__or0011 AND
NOT _addsub0000(13))
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND Madd__AUX_11__or0010 AND NOT N_PZ_1929 AND NOT N_PZ_1848)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND NOT Madd__AUX_11__or0010 AND NOT N_PZ_1929 AND N_PZ_1848)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND N_PZ_1929 AND sp(12) AND N_PZ_1848)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND N_PZ_1929 AND NOT sp(12) AND NOT N_PZ_1848));
_mux0010(14)71 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND regfil_4_5 AND NOT N_PZ_2046)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_6 AND
NOT N_PZ_1995)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_4_6 AND
N_PZ_1995)
OR (NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND regfil_4_4 AND NOT Madd__AUX_10__or0010 AND
Madd__AUX_10_Mxor_Result(12)__xor0000 AND NOT N_PZ_2046)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND N_PZ_1905 AND N_PZ_2031)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND regfil_0_6 AND N_PZ_2054)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1916 AND NOT regfil_0_6 AND NOT N_PZ_2054)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND Madd__AUX_11__or0012 AND N_PZ_2105)
OR (data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND data(5).PIN AND
NOT N_PZ_1916 AND NOT Madd__AUX_11__or0012 AND NOT N_PZ_2105)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_5 AND NOT Madd__AUX_9__or0011 AND NOT N_PZ_1905)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_4_6 AND regfil_2_6 AND _addsub0001(13) AND
NOT N_PZ_2031)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_4_6 AND NOT regfil_2_6 AND _addsub0001(13) AND
NOT N_PZ_2031));
_mux0010(15)71 <= ((NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND regfil_4_6 AND NOT N_PZ_2046)
OR (NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND N_PZ_1916 AND NOT regfil_4_6 AND N_PZ_2046)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_7 AND
NOT regfil_4_6)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND regfil_4_7 AND
NOT N_PZ_1995)
OR (NOT data(2).PIN AND data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND NOT regfil_4_7 AND
regfil_4_6 AND N_PZ_1995)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_2_7 AND N_PZ_2055)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_2_7 AND NOT N_PZ_2055)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_0_7 AND N_PZ_2056)
OR (NOT data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_0_7 AND NOT N_PZ_2056)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND Madd__AUX_11__or0012 AND N_PZ_2105 AND NOT N_PZ_1849)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT Madd__AUX_11__or0012 AND N_PZ_2105 AND N_PZ_1849)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT N_PZ_2105 AND sp(14) AND N_PZ_1849)
OR (data(4).PIN AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT N_PZ_2105 AND NOT sp(14) AND NOT N_PZ_1849));
_mux0014(13)8 <= regfil_2_5
XOR ((NOT data(4).PIN AND regfil_2_5)
OR (data(2).PIN AND regfil_2_5)
OR (NOT data(1).PIN AND regfil_2_5)
OR (NOT data(0).PIN AND regfil_2_5)
OR (data(6).PIN AND regfil_2_5)
OR (data(7).PIN AND regfil_2_5)
OR (data(5).PIN AND regfil_2_5)
OR (data(4).PIN AND NOT data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT data(5).PIN AND
regfil_3_0 AND regfil_2_0 AND regfil_3_1 AND regfil_2_1 AND
regfil_3_2 AND regfil_2_2 AND regfil_3_3 AND regfil_3_4 AND
regfil_3_5 AND regfil_2_3 AND regfil_3_6 AND regfil_2_4 AND
regfil_3_7));
_mux003739 <= ((NOT state(3) AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND NOT regd(2) AND addrhold(15))
OR (NOT state(3) AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND NOT regd(1) AND addrhold(15))
OR (NOT state(3) AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND regd(0) AND addrhold(15))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(7).PIN AND addrhold(15))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(1).PIN AND NOT data(6).PIN AND addrhold(15))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(0).PIN AND NOT data(6).PIN AND addrhold(15))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(6).PIN AND _cmp_eq0004 AND addrhold(15))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(6).PIN AND NOT N_PZ_1921 AND addrhold(15))
OR (NOT state(3) AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND addrhold2(15))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(2).PIN AND NOT data(6).PIN AND data(5).PIN AND
addrhold(15))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND pc(15)));
_xor0000 <= (NOT regfil_5_7 AND NOT regfil_5_3 AND NOT regfil_5_0 AND
NOT regfil_5_1 AND NOT regfil_5_2 AND NOT regfil_5_4 AND NOT regfil_5_5 AND
NOT regfil_5_6);
_xor0068 <= (NOT regfil_1_0 AND NOT regfil_1_2 AND NOT regfil_1_1 AND
NOT regfil_1_3 AND NOT regfil_1_6 AND NOT regfil_1_4 AND NOT regfil_1_5 AND
NOT regfil_1_7);
FDCPE_addrhold20: FDCPE port map (addrhold2(0),regfil_5_0,clock,'0','0',addrhold2_CE(0));
addrhold2_CE(0) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold21: FDCPE port map (addrhold2(1),regfil_5_1,clock,'0','0',addrhold2_CE(1));
addrhold2_CE(1) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold22: FDCPE port map (addrhold2(2),regfil_5_2,clock,'0','0',addrhold2_CE(2));
addrhold2_CE(2) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold23: FDCPE port map (addrhold2(3),regfil_5_3,clock,'0','0',addrhold2_CE(3));
addrhold2_CE(3) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold24: FDCPE port map (addrhold2(4),regfil_5_4,clock,'0','0',addrhold2_CE(4));
addrhold2_CE(4) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold25: FDCPE port map (addrhold2(5),regfil_5_5,clock,'0','0',addrhold2_CE(5));
addrhold2_CE(5) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold26: FDCPE port map (addrhold2(6),regfil_5_6,clock,'0','0',addrhold2_CE(6));
addrhold2_CE(6) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold27: FDCPE port map (addrhold2(7),regfil_5_7,clock,'0','0',addrhold2_CE(7));
addrhold2_CE(7) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold28: FDCPE port map (addrhold2(8),regfil_4_0,clock,'0','0',addrhold2_CE(8));
addrhold2_CE(8) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold29: FDCPE port map (addrhold2(9),regfil_4_1,clock,'0','0',addrhold2_CE(9));
addrhold2_CE(9) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold210: FDCPE port map (addrhold2(10),regfil_4_2,clock,'0','0',addrhold2_CE(10));
addrhold2_CE(10) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold211: FDCPE port map (addrhold2(11),regfil_4_3,clock,'0','0',addrhold2_CE(11));
addrhold2_CE(11) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold212: FDCPE port map (addrhold2(12),regfil_4_4,clock,'0','0',addrhold2_CE(12));
addrhold2_CE(12) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold213: FDCPE port map (addrhold2(13),regfil_4_5,clock,'0','0',addrhold2_CE(13));
addrhold2_CE(13) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold214: FDCPE port map (addrhold2(14),regfil_4_6,clock,'0','0',addrhold2_CE(14));
addrhold2_CE(14) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FDCPE_addrhold215: FDCPE port map (addrhold2(15),regfil_4_7,clock,'0','0',addrhold2_CE(15));
addrhold2_CE(15) <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN);
FTCPE_addrhold0: FTCPE port map (addrhold(0),addrhold_T(0),clock,'0','0','1');
addrhold_T(0) <= ((N_PZ_1948)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND data(0).PIN AND NOT addrhold(0))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND NOT data(0).PIN AND addrhold(0))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(0) AND NOT addrhold2(0))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(0) AND addrhold2(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND addrhold(0) AND N_PZ_1921 AND _xor0000)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT addrhold(0) AND N_PZ_1921 AND NOT _xor0000)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(0) AND NOT pc(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(0) AND pc(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT addrhold(0) AND regfil_2_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT addrhold(0) AND regfil_2_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT addrhold(0) AND regfil_2_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT addrhold(0) AND regfil_2_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT addrhold(0) AND regfil_2_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT addrhold(0) AND regfil_2_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT addrhold(0) AND regfil_2_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT addrhold(0) AND regfil_2_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND addrhold(0) AND _xor0068)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT addrhold(0) AND NOT _xor0068)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND addrhold(0) AND NOT regfil_2_0 AND NOT regfil_2_1 AND
NOT regfil_2_2 AND NOT regfil_2_5 AND NOT regfil_2_3 AND NOT regfil_2_7 AND
NOT regfil_2_6 AND NOT regfil_2_4));
FTCPE_addrhold1: FTCPE port map (addrhold(1),addrhold_T(1),clock,'0','0','1');
addrhold_T(1) <= ((addrhold(0) AND N_PZ_1948)
OR (addrhold(1) AND N_PZ_1133)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND data(1).PIN AND NOT addrhold(1))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND NOT data(1).PIN AND addrhold(1))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(1) AND NOT addrhold2(1))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(1) AND addrhold2(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(1) AND NOT pc(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(1) AND pc(1)));
FTCPE_addrhold2: FTCPE port map (addrhold(2),addrhold_T(2),clock,'0','0','1');
addrhold_T(2) <= ((addrhold(2) AND N_PZ_1133)
OR (addrhold(0) AND addrhold(1) AND N_PZ_1948)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND data(2).PIN AND NOT addrhold(2))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND NOT data(2).PIN AND addrhold(2))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(2) AND NOT addrhold2(2))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(2) AND addrhold2(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(2) AND NOT pc(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(2) AND pc(2)));
FTCPE_addrhold3: FTCPE port map (addrhold(3),addrhold_T(3),clock,'0','0','1');
addrhold_T(3) <= ((addrhold(3) AND N_PZ_1133)
OR (addrhold(0) AND addrhold(1) AND addrhold(2) AND
N_PZ_1948)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND data(3).PIN AND NOT addrhold(3))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND NOT data(3).PIN AND addrhold(3))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(3) AND NOT addrhold2(3))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(3) AND addrhold2(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND pc(3) AND NOT addrhold(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT pc(3) AND addrhold(3)));
FTCPE_addrhold4: FTCPE port map (addrhold(4),addrhold_T(4),clock,'0','0','1');
addrhold_T(4) <= ((addrhold(4) AND N_PZ_1133)
OR (addrhold(3) AND addrhold(0) AND addrhold(1) AND
addrhold(2) AND N_PZ_1948)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND data(4).PIN AND NOT addrhold(4))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND NOT data(4).PIN AND addrhold(4))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(4) AND NOT addrhold2(4))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(4) AND addrhold2(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(4) AND NOT pc(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(4) AND pc(4)));
FTCPE_addrhold5: FTCPE port map (addrhold(5),addrhold_T(5),clock,'0','0','1');
addrhold_T(5) <= ((addrhold(5) AND N_PZ_1133)
OR (addrhold(3) AND addrhold(0) AND addrhold(1) AND
addrhold(2) AND addrhold(4) AND N_PZ_1948)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND data(5).PIN AND NOT addrhold(5))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND NOT data(5).PIN AND addrhold(5))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(5) AND NOT addrhold2(5))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(5) AND addrhold2(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(5) AND NOT pc(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(5) AND pc(5)));
FTCPE_addrhold6: FTCPE port map (addrhold(6),addrhold_T(6),clock,'0','0','1');
addrhold_T(6) <= ((addrhold(6) AND N_PZ_1133)
OR (addrhold(3) AND addrhold(0) AND addrhold(1) AND
addrhold(2) AND addrhold(4) AND addrhold(5) AND N_PZ_1948)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND data(6).PIN AND NOT addrhold(6))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND NOT data(6).PIN AND addrhold(6))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(6) AND NOT addrhold2(6))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(6) AND addrhold2(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(6) AND NOT pc(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(6) AND pc(6)));
FTCPE_addrhold7: FTCPE port map (addrhold(7),addrhold_T(7),clock,'0','0','1');
addrhold_T(7) <= ((addrhold(7) AND N_PZ_1133)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND data(7).PIN AND NOT addrhold(7))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
state(1) AND state(0) AND NOT data(7).PIN AND addrhold(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND data(0).PIN AND NOT addrhold(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT data(0).PIN AND addrhold(7))
OR (addrhold(3) AND addrhold(0) AND addrhold(1) AND
addrhold(2) AND addrhold(4) AND addrhold(5) AND addrhold(6) AND
N_PZ_1948)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(7) AND NOT addrhold2(7))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(7) AND addrhold2(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(7) AND NOT pc(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(7) AND pc(7)));
FTCPE_addrhold8: FTCPE port map (addrhold(8),addrhold_T(8),clock,'0','0','1');
addrhold_T(8) <= ((addrhold(8) AND N_PZ_1133)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND data(1).PIN AND NOT addrhold(8))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT data(1).PIN AND addrhold(8))
OR (addrhold(7) AND addrhold(3) AND addrhold(0) AND
addrhold(1) AND addrhold(2) AND addrhold(4) AND addrhold(5) AND
addrhold(6) AND N_PZ_1948)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(8) AND NOT addrhold2(8))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(8) AND addrhold2(8))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(8) AND NOT pc(8))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(8) AND pc(8)));
FTCPE_addrhold9: FTCPE port map (addrhold(9),addrhold_T(9),clock,'0','0','1');
addrhold_T(9) <= ((addrhold(9) AND N_PZ_1133)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND data(2).PIN AND NOT addrhold(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT data(2).PIN AND addrhold(9))
OR (addrhold(7) AND addrhold(3) AND addrhold(0) AND
addrhold(8) AND addrhold(1) AND addrhold(2) AND addrhold(4) AND
addrhold(5) AND addrhold(6) AND N_PZ_1948)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(9) AND NOT addrhold2(9))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(9) AND addrhold2(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(9) AND NOT pc(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(9) AND pc(9)));
FTCPE_addrhold10: FTCPE port map (addrhold(10),addrhold_T(10),clock,'0','0','1');
addrhold_T(10) <= ((addrhold(10) AND N_PZ_1133)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND data(3).PIN AND NOT addrhold(10))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT data(3).PIN AND addrhold(10))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(10) AND NOT addrhold2(10))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(10) AND addrhold2(10))
OR (addrhold(7) AND addrhold(3) AND addrhold(0) AND
addrhold(9) AND addrhold(8) AND addrhold(1) AND addrhold(2) AND
addrhold(4) AND addrhold(5) AND addrhold(6) AND N_PZ_1948)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(10) AND
NOT pc(10))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(10) AND
pc(10)));
FTCPE_addrhold11: FTCPE port map (addrhold(11),addrhold_T(11),clock,'0','0','1');
addrhold_T(11) <= ((addrhold(11) AND N_PZ_1133)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND data(4).PIN AND NOT addrhold(11))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT data(4).PIN AND addrhold(11))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(11) AND NOT addrhold2(11))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(11) AND addrhold2(11))
OR (addrhold(7) AND addrhold(3) AND addrhold(0) AND
addrhold(9) AND addrhold(8) AND addrhold(1) AND addrhold(2) AND
addrhold(10) AND addrhold(4) AND addrhold(5) AND addrhold(6) AND
N_PZ_1948)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(11) AND
NOT pc(11))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(11) AND
pc(11)));
FTCPE_addrhold12: FTCPE port map (addrhold(12),addrhold_T(12),clock,'0','0','1');
addrhold_T(12) <= ((N_PZ_2405)
OR (addrhold(12) AND N_PZ_1133)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND data(5).PIN AND NOT addrhold(12))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT data(5).PIN AND addrhold(12))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(12) AND NOT addrhold2(12))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(12) AND addrhold2(12))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(12) AND
NOT pc(12))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(12) AND
pc(12)));
FTCPE_addrhold13: FTCPE port map (addrhold(13),addrhold_T(13),clock,'0','0','1');
addrhold_T(13) <= ((addrhold(13) AND N_PZ_1133)
OR (addrhold(12) AND N_PZ_2405)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND data(6).PIN AND NOT addrhold(13))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT data(6).PIN AND addrhold(13))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(13) AND NOT addrhold2(13))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(13) AND addrhold2(13))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(13) AND
NOT pc(13))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(13) AND
pc(13)));
FTCPE_addrhold14: FTCPE port map (addrhold(14),addrhold_T(14),clock,'0','0','1');
addrhold_T(14) <= ((addrhold(14) AND N_PZ_1133)
OR (addrhold(13) AND addrhold(12) AND N_PZ_2405)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND data(7).PIN AND NOT addrhold(14))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT data(7).PIN AND addrhold(14))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
addrhold(14) AND NOT addrhold2(14))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
NOT addrhold(14) AND addrhold2(14))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND addrhold(14) AND
NOT pc(14))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND NOT addrhold(14) AND
pc(14)));
FTCPE_addrhold15: FTCPE port map (addrhold(15),addrhold_T(15),clock,'0','0','1');
addrhold_T(15) <= ((NOT reset AND NOT addrhold(15) AND _mux003739)
OR (NOT reset AND NOT state(2) AND N_PZ_1209 AND addrhold(15) AND
NOT _mux003739)
OR (NOT state(3) AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND NOT N_PZ_1209 AND addrhold(15) AND NOT _mux003739)
OR (NOT state(2) AND state(1) AND N_PZ_1066 AND addrhold(7) AND
addrhold(3) AND addrhold(0) AND addrhold(9) AND addrhold(8) AND
addrhold(1) AND addrhold(2) AND addrhold(10) AND addrhold(4) AND
addrhold(14) AND addrhold(13) AND addrhold(12) AND addrhold(11) AND
addrhold(5) AND addrhold(6) AND NOT _mux003739)
OR (NOT state(3) AND state(2) AND state(4) AND state(1) AND
NOT N_PZ_1066 AND NOT N_PZ_1209 AND addrhold(7) AND addrhold(3) AND
addrhold(0) AND addrhold(9) AND addrhold(8) AND addrhold(1) AND
addrhold(2) AND addrhold(10) AND addrhold(4) AND addrhold(14) AND
addrhold(13) AND addrhold(12) AND addrhold(11) AND addrhold(5) AND
addrhold(6) AND NOT _mux003739));
FDCPE_alucin: FDCPE port map (alucin,carry,clock,'0','0',alucin_CE);
alucin_CE <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN);
FDCPE_alucout: FDCPE port map (alucout,alucout_D,clock,'0','0','1');
alucout_D <= NOT ((NOT m1/Mmux__mux0000_Result1 AND
NOT m1/Mmux__mux0000_Result3)
XOR ((NOT m1/Mmux__mux0000_Result1 AND alusel(1) AND NOT alusel(0) AND
NOT alusel(2) AND m1/Msub__AUX_23__xor0019 AND NOT N_PZ_1092 AND
NOT m1/Mmux__mux0000_Result3)
OR (NOT m1/Mmux__mux0000_Result1 AND alusel(1) AND NOT alusel(0) AND
NOT alusel(2) AND N_PZ_1092 AND NOT aluopra(7) AND
NOT m1/Mmux__mux0000_Result3)
OR (NOT m1/Mmux__mux0000_Result1 AND NOT alusel(1) AND NOT alusel(0) AND
NOT alusel(2) AND N_PZ_1092 AND NOT m1/_addsub0000(7) AND
NOT m1/Mmux__mux0000_Result3)
OR (NOT m1/Mmux__mux0000_Result1 AND NOT alusel(1) AND NOT alusel(0) AND
NOT alusel(2) AND NOT N_PZ_1092 AND aluopra(7) AND
NOT m1/Mmux__mux0000_Result3)));
FDCPE_aluopra0: FDCPE port map (aluopra(0),aluopra_D(0),clock,'0','0','1');
aluopra_D(0) <= NOT (((NOT N_PZ_1099 AND NOT aluopra(0))
OR (NOT regfil_5_0 AND N_PZ_1129 AND N_PZ_1099)
OR (regd(2) AND regd(1) AND regd(0) AND NOT regfil_7_0 AND
N_PZ_1099)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_6_0)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND NOT regfil_4_0 AND
N_PZ_1099)
OR (NOT regd(2) AND regd(1) AND regd(0) AND NOT regfil_3_0 AND
N_PZ_1099)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND NOT regfil_2_0 AND
N_PZ_1099)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND NOT regfil_1_0 AND
N_PZ_1099)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_0_0)));
FDCPE_aluopra1: FDCPE port map (aluopra(1),aluopra_D(1),clock,'0','0','1');
aluopra_D(1) <= NOT (((NOT aluopra(1) AND NOT N_PZ_1099)
OR (NOT regfil_5_1 AND N_PZ_1129 AND N_PZ_1099)
OR (regd(2) AND regd(1) AND regd(0) AND NOT regfil_7_1 AND
N_PZ_1099)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_6_1)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND NOT regfil_4_1 AND
N_PZ_1099)
OR (NOT regd(2) AND regd(1) AND regd(0) AND NOT regfil_3_1 AND
N_PZ_1099)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND NOT regfil_2_1 AND
N_PZ_1099)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND NOT regfil_1_1 AND
N_PZ_1099)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_0_1)));
FDCPE_aluopra2: FDCPE port map (aluopra(2),aluopra_D(2),clock,'0','0','1');
aluopra_D(2) <= NOT (((NOT N_PZ_1099 AND NOT aluopra(2))
OR (N_PZ_1129 AND NOT regfil_5_2 AND N_PZ_1099)
OR (regd(2) AND regd(1) AND regd(0) AND NOT regfil_7_2 AND
N_PZ_1099)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_6_2)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND NOT regfil_4_2 AND
N_PZ_1099)
OR (NOT regd(2) AND regd(1) AND regd(0) AND NOT regfil_3_2 AND
N_PZ_1099)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_2_2)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND NOT regfil_1_2 AND
N_PZ_1099)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_0_2)));
FDCPE_aluopra3: FDCPE port map (aluopra(3),aluopra_D(3),clock,'0','0','1');
aluopra_D(3) <= NOT (((NOT N_PZ_1099 AND NOT aluopra(3))
OR (NOT regfil_5_3 AND N_PZ_1129 AND N_PZ_1099)
OR (regd(2) AND regd(1) AND regd(0) AND NOT regfil_7_3 AND
N_PZ_1099)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_6_3)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_4_3)
OR (NOT regd(2) AND regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_3_3)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_2_3)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_1_3)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_0_3)));
FDCPE_aluopra4: FDCPE port map (aluopra(4),aluopra_D(4),clock,'0','0','1');
aluopra_D(4) <= NOT (((NOT N_PZ_1099 AND NOT aluopra(4))
OR (N_PZ_1129 AND N_PZ_1099 AND NOT regfil_5_4)
OR (regd(2) AND regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_7_4)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_6_4)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_4_4)
OR (NOT regd(2) AND regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_3_4)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_2_4)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_1_4)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_0_4)));
FDCPE_aluopra5: FDCPE port map (aluopra(5),aluopra_D(5),clock,'0','0','1');
aluopra_D(5) <= NOT (((NOT N_PZ_1099 AND NOT aluopra(5))
OR (N_PZ_1129 AND N_PZ_1099 AND NOT regfil_5_5)
OR (regd(2) AND regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_7_5)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_6_5)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_4_5)
OR (NOT regd(2) AND regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_3_5)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_2_5)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_1_5)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_0_5)));
FDCPE_aluopra6: FDCPE port map (aluopra(6),aluopra_D(6),clock,'0','0','1');
aluopra_D(6) <= NOT (((NOT N_PZ_1099 AND NOT aluopra(6))
OR (N_PZ_1129 AND N_PZ_1099 AND NOT regfil_5_6)
OR (regd(2) AND regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_7_6)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_6_6)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_4_6)
OR (NOT regd(2) AND regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_3_6)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_2_6)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_1_6)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_0_6)));
FDCPE_aluopra7: FDCPE port map (aluopra(7),aluopra_D(7),clock,'0','0','1');
aluopra_D(7) <= NOT (((NOT N_PZ_1099 AND NOT aluopra(7))
OR (NOT regfil_5_7 AND N_PZ_1129 AND N_PZ_1099)
OR (regd(2) AND regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_7_7)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_6_7)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_4_7)
OR (NOT regd(2) AND regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_3_7)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_2_7)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND N_PZ_1099 AND
NOT regfil_1_7)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1099 AND
NOT regfil_0_7)));
FTCPE_aluoprb0: FTCPE port map (aluoprb(0),aluoprb_T(0),clock,'0','0','1');
aluoprb_T(0) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
aluoprb(0) AND _COND_18(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
NOT aluoprb(0) AND NOT _COND_18(0))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND data(0).PIN AND NOT regd(2) AND NOT regd(1) AND
NOT regd(0) AND NOT aluoprb(0))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND NOT data(0).PIN AND NOT regd(2) AND NOT regd(1) AND
NOT regd(0) AND aluoprb(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND NOT aluoprb(0)));
FTCPE_aluoprb1: FTCPE port map (aluoprb(1),aluoprb_T(1),clock,'0','0','1');
aluoprb_T(1) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
aluoprb(1) AND _COND_18(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
NOT aluoprb(1) AND NOT _COND_18(1))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND data(0).PIN AND NOT regd(2) AND NOT regd(1) AND
regd(0) AND NOT aluoprb(1))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND NOT data(0).PIN AND NOT regd(2) AND NOT regd(1) AND
regd(0) AND aluoprb(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND aluoprb(1)));
FTCPE_aluoprb2: FTCPE port map (aluoprb(2),aluoprb_T(2),clock,'0','0','1');
aluoprb_T(2) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
aluoprb(2) AND _COND_18(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
NOT aluoprb(2) AND NOT _COND_18(2))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND data(0).PIN AND NOT regd(2) AND regd(1) AND
NOT regd(0) AND NOT aluoprb(2))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND NOT data(0).PIN AND NOT regd(2) AND regd(1) AND
NOT regd(0) AND aluoprb(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND aluoprb(2)));
FTCPE_aluoprb3: FTCPE port map (aluoprb(3),aluoprb_T(3),clock,'0','0','1');
aluoprb_T(3) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
aluoprb(3) AND _COND_18(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
NOT aluoprb(3) AND NOT _COND_18(3))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND data(0).PIN AND NOT regd(2) AND regd(1) AND
regd(0) AND NOT aluoprb(3))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND NOT data(0).PIN AND NOT regd(2) AND regd(1) AND
regd(0) AND aluoprb(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND aluoprb(3)));
FTCPE_aluoprb4: FTCPE port map (aluoprb(4),aluoprb_T(4),clock,'0','0','1');
aluoprb_T(4) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
aluoprb(4) AND _COND_18(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
NOT aluoprb(4) AND NOT _COND_18(4))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND data(0).PIN AND regd(2) AND NOT regd(1) AND
NOT regd(0) AND NOT aluoprb(4))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND NOT data(0).PIN AND regd(2) AND NOT regd(1) AND
NOT regd(0) AND aluoprb(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND aluoprb(4)));
FTCPE_aluoprb5: FTCPE port map (aluoprb(5),aluoprb_T(5),clock,'0','0','1');
aluoprb_T(5) <= ((NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND data(0).PIN AND N_PZ_1129 AND NOT aluoprb(5))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND NOT data(0).PIN AND N_PZ_1129 AND aluoprb(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
aluoprb(5) AND _COND_18(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
NOT aluoprb(5) AND NOT _COND_18(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND aluoprb(5)));
FTCPE_aluoprb6: FTCPE port map (aluoprb(6),aluoprb_T(6),clock,'0','0','1');
aluoprb_T(6) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
aluoprb(6) AND _COND_18(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
NOT aluoprb(6) AND NOT _COND_18(6))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND data(0).PIN AND regd(2) AND regd(1) AND
NOT regd(0) AND NOT aluoprb(6))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND NOT data(0).PIN AND regd(2) AND regd(1) AND
NOT regd(0) AND aluoprb(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND aluoprb(6)));
FTCPE_aluoprb7: FTCPE port map (aluoprb(7),aluoprb_T(7),clock,'0','0','1');
aluoprb_T(7) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
aluoprb(7) AND _COND_18(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
NOT aluoprb(7) AND NOT _COND_18(7))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND data(0).PIN AND NOT aluoprb(7) AND regd(2) AND
regd(1) AND regd(0))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND NOT state(0) AND NOT data(0).PIN AND aluoprb(7) AND regd(2) AND
regd(1) AND regd(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND aluoprb(7)));
FDCPE_alupar: FDCPE port map (alupar,alupar_D,clock,'0','0','1');
alupar_D <= N_PZ_1261
XOR ((m1/Mmux__old_resi_28_I3_Result28 AND NOT N_PZ_1997)
OR (NOT N_PZ_1527 AND NOT N_PZ_1997)
OR (NOT m1/Mmux__old_resi_28_I3_Result28 AND N_PZ_1527 AND
N_PZ_1997));
FDCPE_alures0: FDCPE port map (alures(0),alures_D(0),clock,'0','0','1');
alures_D(0) <= NOT (((NOT alusel(2) AND NOT m1/Mmux__old_resi_28_I7_Result30)
OR (NOT m1/Mmux__old_resi_28_I7_Result30 AND NOT N_PZ_1076 AND
NOT aluoprb(0))
OR (alusel(1) AND alusel(0) AND
NOT m1/Mmux__old_resi_28_I7_Result30 AND NOT aluopra(0))
OR (NOT alusel(1) AND alusel(0) AND
NOT m1/Mmux__old_resi_28_I7_Result30 AND NOT N_PZ_1076)
OR (NOT alusel(1) AND NOT alusel(0) AND
NOT m1/Mmux__old_resi_28_I7_Result30 AND N_PZ_1076)));
FDCPE_alures1: FDCPE port map (alures(1),alures_D(1),clock,'0','0','1');
alures_D(1) <= NOT (((NOT alusel(2) AND NOT m1/Mmux__old_resi_28_I6_Result28)
OR (NOT m1/Mmux__old_resi_28_I6_Result28 AND NOT N_PZ_1043 AND
NOT aluoprb(1))
OR (alusel(1) AND alusel(0) AND
NOT m1/Mmux__old_resi_28_I6_Result28 AND NOT aluopra(1))
OR (NOT alusel(1) AND alusel(0) AND
NOT m1/Mmux__old_resi_28_I6_Result28 AND NOT N_PZ_1043)
OR (NOT alusel(1) AND NOT alusel(0) AND
NOT m1/Mmux__old_resi_28_I6_Result28 AND N_PZ_1043)));
FDCPE_alures2: FDCPE port map (alures(2),N_PZ_1213,clock,'0','0','1');
FDCPE_alures3: FDCPE port map (alures(3),N_PZ_1260,clock,'0','0','1');
FDCPE_alures4: FDCPE port map (alures(4),alures_D(4),clock,'0','0','1');
alures_D(4) <= NOT ((NOT m1/Mmux__old_resi_28_I3_Result28 AND N_PZ_1527));
FDCPE_alures5: FDCPE port map (alures(5),N_PZ_1141,clock,'0','0','1');
FDCPE_alures6: FDCPE port map (alures(6),N_PZ_1261,clock,'0','0','1');
FDCPE_alures7: FDCPE port map (alures(7),N_PZ_1214,clock,'0','0','1');
FTCPE_alusel0: FTCPE port map (alusel(0),alusel_T(0),clock,'0','0','1');
alusel_T(0) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(6).PIN AND
data(7).PIN AND NOT alusel(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(6).PIN AND
data(7).PIN AND alusel(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND alusel(0)));
FTCPE_alusel1: FTCPE port map (alusel(1),alusel_T(1),clock,'0','0','1');
alusel_T(1) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(6).PIN AND
data(7).PIN AND NOT alusel(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(6).PIN AND
data(7).PIN AND alusel(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND alusel(1)));
FTCPE_alusel2: FTCPE port map (alusel(2),alusel_T(2),clock,'0','0','1');
alusel_T(2) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
data(5).PIN AND NOT alusel(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
NOT data(5).PIN AND alusel(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND alusel(2)));
FDCPE_aluzout: FDCPE port map (aluzout,aluzout_D,clock,'0','0','1');
aluzout_D <= ((NOT alusel(2) AND NOT m1/Mmux__old_resi_28_I7_Result30 AND
NOT m1/Mmux__old_resi_28_I6_Result28 AND NOT N_PZ_1213 AND NOT N_PZ_1260 AND NOT N_PZ_1141 AND
NOT m1/Mmux__old_resi_28_I3_Result28 AND NOT N_PZ_1214 AND NOT N_PZ_1261)
OR (NOT m1/Mmux__old_resi_28_I7_Result30 AND
NOT m1/Mmux__old_resi_28_I6_Result28 AND NOT N_PZ_1213 AND NOT N_PZ_1260 AND NOT N_PZ_1141 AND
NOT m1/Mmux__old_resi_28_I3_Result28 AND NOT N_PZ_1214 AND NOT N_PZ_1261 AND N_PZ_1527 AND N_PZ_1954));
FTCPE_auxcar: FTCPE port map (auxcar,auxcar_T,clock,'0','0','1');
auxcar_T <= ((auxcar AND N_PZ_1894)
OR (NOT reset AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND auxcar AND
N_PZ_1986)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT auxcar AND NOT N_PZ_1986));
FTCPE_carry: FTCPE port map (carry,carry_T,clock,'0','0','1');
carry_T <= ((NOT reset AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT carry AND _mux000762)
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT carry AND alucout)
OR (NOT reset AND state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND carry AND NOT alucout AND NOT _mux000762)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
NOT _mux000762)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
NOT _mux000762)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND NOT N_PZ_1819 AND
NOT _mux000762));
FDCPE_carryhold: FDCPE port map (carryhold,regfil_7_0,clock,'0','0',carryhold_CE);
carryhold_CE <= (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
data(2).PIN AND data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN);
FTCPE_dataeno: FTCPE port map (dataeno,dataeno_T,clock,'0','0','1');
dataeno_T <= ((reset AND dataeno)
OR (NOT reset AND state(3) AND state(4) AND state(1) AND
NOT state(0) AND NOT dataeno)
OR (state(3) AND state(2) AND state(4) AND NOT state(1) AND
state(0) AND dataeno)
OR (state(3) AND NOT state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND dataeno)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT dataeno));
FTCPE_holding0: FTCPE port map (holding(0),holding_T(0),clock,'0','0','1');
holding_T(0) <= ((holding(0) AND NOT regfil_4_0 AND N_PZ_2114)
OR (NOT holding(0) AND regfil_4_0 AND N_PZ_2114)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND holding(0) AND NOT regfil_7_0 AND auxcar)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND holding(0) AND NOT regfil_7_0 AND NOT N_PZ_1986)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT holding(0) AND regfil_7_0 AND auxcar)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT holding(0) AND regfil_7_0 AND NOT N_PZ_1986));
FTCPE_holding1: FTCPE port map (holding(1),holding_T(1),clock,'0','0','1');
holding_T(1) <= ((holding(1) AND NOT regfil_4_1 AND N_PZ_2114)
OR (NOT holding(1) AND regfil_4_1 AND N_PZ_2114)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND regfil_7_1 AND holding(1) AND regfil_7_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND regfil_7_1 AND holding(1) AND auxcar)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT regfil_7_1 AND NOT holding(1) AND auxcar)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT regfil_7_1 AND NOT holding(1) AND regfil_7_3 AND
regfil_7_2));
FTCPE_holding2: FTCPE port map (holding(2),holding_T(2),clock,'0','0','1');
holding_T(2) <= ((holding(2) AND NOT regfil_4_2 AND N_PZ_2114)
OR (NOT holding(2) AND regfil_4_2 AND N_PZ_2114)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND regfil_7_3 AND holding(2) AND N_PZ_1890)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND holding(2) AND auxcar AND N_PZ_1890)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT holding(2) AND auxcar AND NOT N_PZ_1890)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND regfil_7_3 AND regfil_7_2 AND NOT holding(2) AND
NOT N_PZ_1890));
FTCPE_holding3: FTCPE port map (holding(3),holding_T(3),clock,'0','0','1');
holding_T(3) <= ((N_PZ_2114 AND holding(3) AND NOT regfil_4_3)
OR (N_PZ_2114 AND NOT holding(3) AND regfil_4_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND holding(3) AND NOT N_PZ_1986)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND regfil_7_1 AND NOT regfil_7_3 AND NOT holding(3) AND auxcar)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT regfil_7_3 AND regfil_7_2 AND NOT holding(3) AND auxcar)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT regfil_7_1 AND regfil_7_3 AND NOT regfil_7_2 AND
NOT holding(3) AND auxcar)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT regfil_7_1 AND NOT regfil_7_3 AND NOT regfil_7_2 AND
holding(3) AND auxcar));
FTCPE_holding4: FTCPE port map (holding(4),holding_T(4),clock,'0','0','1');
holding_T(4) <= ((N_PZ_2114 AND holding(4) AND NOT regfil_4_4)
OR (N_PZ_2114 AND NOT holding(4) AND regfil_4_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND holding(4) AND NOT regfil_7_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND NOT holding(4) AND regfil_7_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND holding(4) AND NOT regfil_7_4 AND regfil_7_7 AND
NOT N_PZ_1887)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT holding(4) AND regfil_7_4 AND regfil_7_7 AND
NOT N_PZ_1887));
FTCPE_holding5: FTCPE port map (holding(5),holding_T(5),clock,'0','0','1');
holding_T(5) <= ((N_PZ_2114 AND regfil_4_5 AND NOT holding(5))
OR (N_PZ_2114 AND NOT regfil_4_5 AND holding(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND regfil_7_5 AND holding(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND NOT regfil_7_5 AND NOT holding(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND regfil_7_5 AND regfil_7_7 AND holding(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT regfil_7_5 AND regfil_7_6 AND regfil_7_7 AND
NOT holding(5)));
FTCPE_holding6: FTCPE port map (holding(6),holding_T(6),clock,'0','0','1');
holding_T(6) <= ((N_PZ_2114 AND regfil_4_6 AND NOT holding(6))
OR (N_PZ_2114 AND NOT regfil_4_6 AND holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND N_PZ_1887 AND NOT holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND regfil_7_5 AND regfil_7_6 AND NOT holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND regfil_7_5 AND NOT regfil_7_6 AND holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND NOT regfil_7_5 AND regfil_7_6 AND holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND regfil_7_5 AND regfil_7_6 AND regfil_7_7 AND
NOT holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND regfil_7_5 AND NOT regfil_7_6 AND regfil_7_7 AND
holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT regfil_7_5 AND regfil_7_6 AND regfil_7_7 AND
holding(6)));
FTCPE_holding7: FTCPE port map (holding(7),holding_T(7),clock,'0','0','1');
holding_T(7) <= ((N_PZ_2114 AND holding(7) AND NOT regfil_4_7)
OR (N_PZ_2114 AND NOT holding(7) AND regfil_4_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND regfil_7_7 AND holding(7) AND NOT N_PZ_1887)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND regfil_7_7 AND NOT holding(7) AND N_PZ_1887)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND NOT regfil_7_7 AND holding(7) AND N_PZ_1887)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND carry AND
N_PZ_1819 AND NOT regfil_7_7 AND NOT holding(7) AND NOT N_PZ_1887));
m1/Madd__addsub0000__or0000 <= ((aluoprb(1) AND aluopra(1))
OR (NOT N_PZ_1076 AND N_PZ_1043 AND aluopra(0)));
m1/Mmux__mux0000_Result1 <= ((NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluoprb(7) AND
NOT m1/_addsub0000(7))
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluopra(7) AND
NOT m1/_addsub0000(7))
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluoprb(7) AND
NOT N_PZ_1076 AND aluopra(7))
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluoprb(7) AND
NOT N_PZ_1043 AND aluopra(7))
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluoprb(7) AND
NOT m1/_addsub0000(2) AND aluopra(7))
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluoprb(7) AND
NOT m1/_addsub0000(3) AND aluopra(7))
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluoprb(7) AND
NOT m1/_addsub0000(4) AND aluopra(7))
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluoprb(7) AND
aluopra(7) AND NOT m1/_addsub0000(6))
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluoprb(7) AND
aluopra(7) AND NOT m1/_addsub0000(5))
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND aluoprb(7) AND
aluopra(7) AND NOT alucin)
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND NOT aluoprb(7) AND
N_PZ_1076 AND N_PZ_1043 AND m1/_addsub0000(2) AND
m1/_addsub0000(3) AND m1/_addsub0000(4) AND aluopra(7) AND
m1/_addsub0000(6) AND m1/_addsub0000(5) AND alucin)
OR (NOT alusel(1) AND alusel(0) AND NOT alusel(2) AND N_PZ_1076 AND
N_PZ_1043 AND m1/_addsub0000(2) AND m1/_addsub0000(3) AND
m1/_addsub0000(4) AND NOT aluopra(7) AND m1/_addsub0000(6) AND
m1/_addsub0000(5) AND alucin AND m1/_addsub0000(7)));
m1/Mmux__mux0000_Result3 <= ((alusel(1) AND alusel(0) AND NOT alusel(2) AND
m1/Msub__AUX_23__xor0019 AND NOT N_PZ_1092)
OR (alusel(1) AND alusel(0) AND NOT alusel(2) AND
m1/Msub__AUX_23__xor0019 AND NOT aluopra(7))
OR (alusel(1) AND alusel(0) AND NOT alusel(2) AND N_PZ_1092 AND
NOT aluopra(7) AND m1/Msub__AUX_23__xor0016)
OR (alusel(1) AND alusel(0) AND NOT alusel(2) AND N_PZ_1092 AND
NOT aluopra(7) AND m1/Msub__AUX_23__xor0013)
OR (alusel(1) AND alusel(0) AND NOT alusel(2) AND N_PZ_1092 AND
NOT aluopra(7) AND m1/Msub__AUX_23__xor0010)
OR (alusel(1) AND alusel(0) AND NOT alusel(2) AND N_PZ_1092 AND
NOT aluopra(7) AND NOT N_PZ_1999)
OR (alusel(1) AND NOT alusel(2) AND NOT N_PZ_1092 AND
NOT m1/Msub__AUX_23__xor0016 AND NOT m1/Msub__AUX_23__xor0013 AND
NOT m1/Msub__AUX_23__xor0010 AND N_PZ_1999)
OR (alusel(1) AND NOT alusel(2) AND NOT aluoprb(7) AND
NOT m1/Msub__AUX_23__xor0019 AND NOT m1/Msub__AUX_23__xor0016 AND
NOT m1/Msub__AUX_23__xor0013 AND NOT m1/Msub__AUX_23__xor0010 AND N_PZ_1999));
m1/Mmux__old_resi_28_I3_Result28 <= (NOT alusel(1) AND m1/_addsub0000(4))
XOR ((alusel(1) AND NOT alusel(2) AND m1/Msub__AUX_23__xor0010 AND
NOT N_PZ_1999)
OR (alusel(1) AND NOT alusel(2) AND NOT m1/Msub__AUX_23__xor0010 AND
N_PZ_1999)
OR (NOT alusel(1) AND alusel(2) AND
NOT m1/Mmux__old_resi_28_I7_Result30 AND m1/_addsub0000(4))
OR (NOT alusel(1) AND NOT alusel(2) AND
NOT m1/Mmux__old_resi_28_I7_Result30 AND N_PZ_1076 AND N_PZ_1043 AND m1/_addsub0000(2) AND
m1/_addsub0000(3)));
m1/Mmux__old_resi_28_I6_Result28 <= (NOT alusel(2) AND N_PZ_1043)
XOR ((alusel(1) AND NOT alusel(2) AND
m1/Mmux__old_resi_28_I7_Result30 AND NOT N_PZ_1076)
OR (alusel(1) AND NOT alusel(2) AND N_PZ_1076 AND NOT aluopra(0))
OR (alusel(1) AND m1/Mmux__old_resi_28_I7_Result30 AND
NOT N_PZ_1076 AND NOT N_PZ_1043)
OR (NOT alusel(1) AND NOT alusel(2) AND
NOT m1/Mmux__old_resi_28_I7_Result30 AND N_PZ_1076)
OR (NOT alusel(1) AND NOT alusel(2) AND NOT N_PZ_1076 AND aluopra(0))
OR (NOT alusel(1) AND alusel(2) AND
m1/Mmux__old_resi_28_I7_Result30 AND N_PZ_1076 AND N_PZ_1043));
m1/Mmux__old_resi_28_I7_Result30 <= (NOT alusel(2) AND N_PZ_1076)
XOR (alusel(0) AND NOT alusel(2) AND alucin);
m1/Msub__AUX_23__xor0007 <= ((aluoprb(2) AND NOT N_PZ_1082 AND NOT aluopra(2))
OR (NOT aluoprb(2) AND N_PZ_1082 AND aluopra(2))
OR (N_PZ_1082 AND NOT m1/Msub__sub0000__or0001 AND N_PZ_1041)
OR (NOT N_PZ_1082 AND m1/Msub__sub0000__or0001 AND N_PZ_1041));
m1/Msub__AUX_23__xor0010 <= ((aluoprb(3) AND NOT N_PZ_1054 AND NOT aluopra(3))
OR (NOT aluoprb(3) AND N_PZ_1054 AND aluopra(3))
OR (N_PZ_1054 AND NOT N_PZ_1082 AND NOT m1/Msub__AUX_23__xor0007)
OR (NOT N_PZ_1054 AND NOT N_PZ_1082 AND m1/Msub__AUX_23__xor0007));
m1/Msub__AUX_23__xor0013 <= N_PZ_1038
XOR ((NOT aluopra(4) AND N_PZ_1054)
OR (NOT N_PZ_1054 AND m1/Msub__AUX_23__xor0010));
m1/Msub__AUX_23__xor0016 <= ((aluoprb(5) AND NOT aluopra(5) AND NOT N_PZ_1059)
OR (NOT aluoprb(5) AND aluopra(5) AND N_PZ_1059)
OR (N_PZ_1059 AND NOT m1/Msub__AUX_23__xor0013 AND NOT N_PZ_1038)
OR (NOT N_PZ_1059 AND m1/Msub__AUX_23__xor0013 AND NOT N_PZ_1038));
m1/Msub__AUX_23__xor0019 <= N_PZ_1092
XOR ((m1/Msub__AUX_23__xor0016 AND NOT N_PZ_1059)
OR (N_PZ_1059 AND NOT aluopra(6)));
m1/Msub__sub0000__or0001 <= ((aluoprb(1) AND NOT aluopra(1))
OR (aluoprb(0) AND NOT N_PZ_1043 AND NOT aluopra(0)));
m1/Mxor__xor0001_Mxor__xor0000__xor0001 <= ((m1/Mmux__old_resi_28_I7_Result30 AND
m1/Mmux__old_resi_28_I6_Result28)
OR (NOT alusel(2) AND NOT m1/Mmux__old_resi_28_I7_Result30 AND
NOT m1/Mmux__old_resi_28_I6_Result28)
OR (NOT m1/Mmux__old_resi_28_I7_Result30 AND
NOT m1/Mmux__old_resi_28_I6_Result28 AND N_PZ_1954)
OR (alusel(1) AND alusel(2) AND
m1/Mmux__old_resi_28_I7_Result30 AND aluopra(1))
OR (alusel(1) AND alusel(2) AND
m1/Mmux__old_resi_28_I6_Result28 AND aluopra(0))
OR (alusel(1) AND alusel(2) AND aluopra(1) AND aluopra(0))
OR (alusel(1) AND NOT alusel(0) AND alusel(2) AND
m1/Mmux__old_resi_28_I7_Result30 AND N_PZ_1043)
OR (alusel(1) AND NOT alusel(0) AND alusel(2) AND N_PZ_1076 AND
m1/Mmux__old_resi_28_I6_Result28)
OR (alusel(1) AND NOT alusel(0) AND alusel(2) AND N_PZ_1076 AND
aluopra(1))
OR (alusel(1) AND NOT alusel(0) AND alusel(2) AND N_PZ_1043 AND
aluopra(0))
OR (NOT alusel(1) AND alusel(0) AND alusel(2) AND
m1/Mmux__old_resi_28_I7_Result30 AND N_PZ_1043)
OR (NOT alusel(1) AND alusel(0) AND alusel(2) AND N_PZ_1076 AND
m1/Mmux__old_resi_28_I6_Result28)
OR (NOT alusel(1) AND alusel(0) AND alusel(2) AND N_PZ_1076 AND
N_PZ_1043)
OR (NOT alusel(0) AND alusel(2) AND
m1/Mmux__old_resi_28_I7_Result30 AND NOT N_PZ_1043 AND aluopra(1))
OR (NOT alusel(0) AND alusel(2) AND NOT N_PZ_1076 AND
m1/Mmux__old_resi_28_I6_Result28 AND aluopra(0))
OR (NOT alusel(0) AND alusel(2) AND aluoprb(0) AND aluoprb(1) AND
NOT m1/Msub__sub0000__or0001)
OR (NOT alusel(0) AND NOT m1/Mmux__old_resi_28_I7_Result30 AND
N_PZ_1076 AND NOT m1/Mmux__old_resi_28_I6_Result28 AND N_PZ_1043));
m1/_addsub0000(2) <= ((m1/Madd__addsub0000__or0000 AND N_PZ_1041)
OR (NOT m1/Madd__addsub0000__or0000 AND NOT N_PZ_1041));
m1/_addsub0000(3) <= ((m1/Madd__addsub0000__or0000 AND NOT N_PZ_1082 AND
NOT N_PZ_1041)
OR (NOT m1/Madd__addsub0000__or0000 AND N_PZ_1082 AND
NOT N_PZ_1041)
OR (aluoprb(2) AND NOT N_PZ_1082 AND aluopra(2))
OR (NOT aluoprb(2) AND N_PZ_1082 AND NOT aluopra(2)));
m1/_addsub0000(4) <= ((m1/_addsub0000(3) AND N_PZ_1054 AND N_PZ_1082)
OR (NOT m1/_addsub0000(3) AND NOT N_PZ_1054 AND N_PZ_1082)
OR (aluoprb(3) AND NOT N_PZ_1054 AND aluopra(3))
OR (NOT aluoprb(3) AND N_PZ_1054 AND NOT aluopra(3)));
m1/_addsub0000(5) <= ((m1/_addsub0000(4) AND N_PZ_1038 AND N_PZ_1054)
OR (NOT m1/_addsub0000(4) AND NOT N_PZ_1038 AND N_PZ_1054)
OR (N_PZ_1038 AND NOT N_PZ_1054 AND NOT aluoprb(4))
OR (NOT N_PZ_1038 AND aluopra(4) AND NOT N_PZ_1054));
m1/_addsub0000(6) <= ((aluoprb(5) AND aluopra(5) AND NOT N_PZ_1059)
OR (NOT aluoprb(5) AND NOT aluopra(5) AND N_PZ_1059)
OR (N_PZ_1059 AND N_PZ_1038 AND m1/_addsub0000(5))
OR (NOT N_PZ_1059 AND N_PZ_1038 AND NOT m1/_addsub0000(5)));
m1/_addsub0000(7) <= ((N_PZ_1092 AND N_PZ_1059 AND m1/_addsub0000(6))
OR (N_PZ_1092 AND NOT N_PZ_1059 AND NOT aluoprb(6))
OR (NOT N_PZ_1092 AND N_PZ_1059 AND NOT m1/_addsub0000(6))
OR (NOT N_PZ_1092 AND NOT N_PZ_1059 AND aluopra(6)));
FDCPE_parity: FDCPE port map (parity,parity_D,clock,'0','0','1');
parity_D <= ((N_PZ_1894 AND alupar)
OR (NOT N_PZ_1894 AND parity));
FDCPE_pc0: FDCPE port map (pc(0),pc_D(0),clock,'0','0','1');
pc_D(0) <= ((NOT N_PZ_1209 AND pc(0))
OR (N_PZ_1145 AND NOT pc(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_5_0));
FDCPE_pc1: FDCPE port map (pc(1),pc_D(1),clock,'0','0','1');
pc_D(1) <= ((NOT N_PZ_1209 AND pc(1))
OR (N_PZ_1145 AND pc(0) AND NOT pc(1))
OR (NOT reset AND NOT N_PZ_1891 AND NOT pc(0) AND pc(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_5_1));
FTCPE_pc2: FTCPE port map (pc(2),pc_T(2),clock,'0','0','1');
pc_T(2) <= ((reset AND pc(2))
OR (NOT N_PZ_1117 AND pc(0) AND pc(1))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(1).PIN AND N_PZ_2033)
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT N_PZ_1916 AND N_PZ_2033)
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT regfil_5_2 AND N_PZ_2033)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND N_PZ_2236 AND pc(0) AND pc(1) AND NOT pc(2))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(2).PIN AND data(1).PIN AND data(0).PIN AND
data(6).PIN AND data(7).PIN AND pc(2))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND N_PZ_1916 AND NOT regfil_5_2 AND pc(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_5_2 AND NOT pc(2)));
FDCPE_pc3: FDCPE port map (pc(3),pc_D(3),clock,'0','0','1');
pc_D(3) <= ((NOT N_PZ_1209 AND pc(3))
OR (N_PZ_1145 AND pc(3) AND NOT N_PZ_2033)
OR (N_PZ_1145 AND NOT pc(3) AND N_PZ_2033)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_5_3));
FTCPE_pc4: FTCPE port map (pc(4),pc_T(4),clock,'0','0','1');
pc_T(4) <= ((reset AND pc(4))
OR (NOT N_PZ_1117 AND pc(3) AND N_PZ_2033)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND data(1).PIN AND pc(3) AND
N_PZ_2033)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(1).PIN AND NOT N_PZ_1916 AND pc(3) AND
N_PZ_2033)
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND N_PZ_1916 AND pc(3) AND NOT regfil_5_4 AND pc(4) AND
N_PZ_2033)
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(4).PIN AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND data(6).PIN AND data(7).PIN AND pc(4))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND N_PZ_1916 AND NOT regfil_5_4 AND pc(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND NOT pc(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(1).PIN AND data(0).PIN AND
data(6).PIN AND data(7).PIN AND N_PZ_1916 AND regfil_5_4 AND NOT pc(4)));
FDCPE_pc5: FDCPE port map (pc(5),pc_D(5),clock,'0','0','1');
pc_D(5) <= ((NOT N_PZ_1209 AND pc(5))
OR (N_PZ_1145 AND NOT pc(4) AND pc(5))
OR (N_PZ_1145 AND NOT pc(3) AND pc(4) AND pc(5))
OR (N_PZ_1145 AND pc(3) AND pc(4) AND N_PZ_2033 AND NOT pc(5))
OR (N_PZ_1145 AND pc(3) AND pc(4) AND NOT N_PZ_2033 AND pc(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND data(6).PIN AND data(7).PIN AND data(5).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_5_5));
FTCPE_pc6: FTCPE port map (pc(6),pc_T(6),clock,'0','0','1');
pc_T(6) <= ((reset AND pc(6))
OR (NOT N_PZ_1117 AND pc(3) AND pc(4) AND N_PZ_2033 AND pc(5))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(2).PIN AND data(1).PIN AND data(0).PIN AND
data(6).PIN AND data(7).PIN AND pc(6))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT N_PZ_1916 AND pc(3) AND pc(6) AND pc(4) AND N_PZ_2033 AND
pc(5))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND pc(3) AND NOT regfil_5_6 AND pc(6) AND pc(4) AND N_PZ_2033 AND
pc(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND data(1).PIN AND pc(3) AND
pc(4) AND N_PZ_2033 AND pc(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(1).PIN AND NOT N_PZ_1916 AND pc(3) AND
pc(4) AND N_PZ_2033 AND pc(5))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND N_PZ_1916 AND NOT regfil_5_6 AND pc(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_5_6 AND NOT pc(6)));
FDCPE_pc7: FDCPE port map (pc(7),pc_D(7),clock,'0','0','1');
pc_D(7) <= ((NOT N_PZ_1209 AND pc(7))
OR (pc(7) AND N_PZ_1145 AND NOT N_PZ_2021)
OR (N_PZ_1145 AND NOT N_PZ_2021 AND pc(3) AND pc(6) AND pc(4) AND
N_PZ_2033 AND pc(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_5_7));
FTCPE_pc8: FTCPE port map (pc(8),pc_T(8),clock,'0','0','1');
pc_T(8) <= ((reset AND pc(8))
OR (NOT N_PZ_1117 AND N_PZ_2021)
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(1).PIN AND N_PZ_2021 AND pc(8))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT N_PZ_1916 AND N_PZ_2021 AND pc(8))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND N_PZ_2021 AND NOT regfil_4_0 AND pc(8))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND N_PZ_2236 AND N_PZ_2021 AND NOT pc(8))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(2).PIN AND data(1).PIN AND data(0).PIN AND
data(6).PIN AND data(7).PIN AND pc(8))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND N_PZ_1916 AND NOT regfil_4_0 AND pc(8))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_4_0 AND NOT pc(8)));
FDCPE_pc9: FDCPE port map (pc(9),pc_D(9),clock,'0','0','1');
pc_D(9) <= ((NOT N_PZ_1209 AND pc(9))
OR (N_PZ_1145 AND NOT pc(8) AND pc(9))
OR (N_PZ_1145 AND N_PZ_2021 AND pc(8) AND NOT pc(9))
OR (N_PZ_1145 AND NOT N_PZ_2021 AND pc(8) AND pc(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_4_1));
FTCPE_pc10: FTCPE port map (pc(10),pc_T(10),clock,'0','0','1');
pc_T(10) <= ((reset AND pc(10))
OR (NOT N_PZ_1117 AND N_PZ_2021 AND pc(8) AND pc(9))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT N_PZ_1916 AND N_PZ_2021 AND pc(10) AND pc(8) AND pc(9))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND N_PZ_2021 AND NOT regfil_4_2 AND pc(10) AND pc(8) AND
pc(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND data(1).PIN AND
N_PZ_2021 AND pc(8) AND pc(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(1).PIN AND NOT N_PZ_1916 AND N_PZ_2021 AND
pc(8) AND pc(9))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(2).PIN AND data(1).PIN AND data(0).PIN AND
data(6).PIN AND data(7).PIN AND pc(10))
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND N_PZ_1916 AND NOT regfil_4_2 AND pc(10))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_4_2 AND NOT pc(10)));
FDCPE_pc11: FDCPE port map (pc(11),pc_D(11),clock,'0','0','1');
pc_D(11) <= ((NOT N_PZ_1209 AND pc(11))
OR (NOT reset AND pc(11) AND NOT N_PZ_1223 AND NOT N_PZ_1891)
OR (NOT reset AND N_PZ_1209 AND N_PZ_2021 AND pc(10) AND pc(8) AND
pc(9) AND NOT N_PZ_1223 AND NOT N_PZ_1891)
OR (NOT reset AND NOT state(0) AND NOT data(1).PIN AND data(0).PIN AND
data(6).PIN AND data(7).PIN AND N_PZ_1209 AND N_PZ_1916 AND
regfil_4_3));
FDCPE_pc12: FDCPE port map (pc(12),pc_D(12),clock,'0','0','1');
pc_D(12) <= ((NOT N_PZ_1209 AND pc(12))
OR (NOT reset AND NOT N_PZ_1223 AND NOT N_PZ_1891 AND pc(12))
OR (NOT reset AND N_PZ_1209 AND N_PZ_1223 AND NOT N_PZ_1891 AND
NOT pc(12))
OR (NOT reset AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1209 AND N_PZ_1819 AND regfil_4_4));
FDCPE_pc13: FDCPE port map (pc(13),pc_D(13),clock,'0','0','1');
pc_D(13) <= ((pc(13) AND NOT N_PZ_2067)
OR (N_PZ_1145 AND N_PZ_1223 AND pc(12) AND NOT pc(13))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_4_5));
FDCPE_pc14: FDCPE port map (pc(14),pc_D(14),clock,'0','0','1');
pc_D(14) <= ((NOT N_PZ_2067 AND pc(14))
OR (N_PZ_1145 AND NOT pc(13) AND pc(14))
OR (N_PZ_1145 AND N_PZ_1223 AND pc(12) AND pc(13) AND
NOT pc(14))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_4_6));
FDCPE_pc15: FDCPE port map (pc(15),pc_D(15),clock,'0','0','1');
pc_D(15) <= ((NOT N_PZ_2067 AND pc(15))
OR (N_PZ_1145 AND NOT pc(13) AND pc(15))
OR (N_PZ_1145 AND NOT pc(14) AND pc(15))
OR (N_PZ_1145 AND N_PZ_1223 AND pc(12) AND pc(13) AND
pc(14) AND NOT pc(15))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1819 AND regfil_4_7));
FTCPE_regd0: FTCPE port map (regd(0),regd_T(0),clock,'0','0','1');
regd_T(0) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND NOT regd(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT regd(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
NOT data(1).PIN AND NOT data(7).PIN AND NOT regd(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
NOT data(1).PIN AND NOT data(7).PIN AND regd(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT _cmp_eq0004 AND regd(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(7).PIN AND NOT regd(0) AND NOT N_PZ_1916)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
NOT data(0).PIN AND NOT data(7).PIN AND NOT _cmp_eq0004 AND regd(0)));
FTCPE_regd1: FTCPE port map (regd(1),regd_T(1),clock,'0','0','1');
regd_T(1) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND NOT regd(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(2).PIN AND
NOT data(1).PIN AND NOT data(6).PIN AND NOT regd(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(2).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT regd(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT _cmp_eq0004 AND NOT regd(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT _cmp_eq0004 AND regd(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND data(2).PIN AND
NOT data(1).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND regd(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND data(2).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND regd(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT N_PZ_1819 AND NOT regd(1)));
FTCPE_regd2: FTCPE port map (regd(2),regd_T(2),clock,'0','0','1');
regd_T(2) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND NOT regd(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND data(5).PIN AND NOT regd(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(0).PIN AND
NOT data(6).PIN AND data(5).PIN AND NOT regd(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT regd(2) AND NOT _cmp_eq0004)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regd(2) AND NOT _cmp_eq0004)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND NOT data(5).PIN AND regd(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN AND NOT data(5).PIN AND regd(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT regd(2) AND NOT N_PZ_1819));
FTCPE_regfil_0_0: FTCPE port map (regfil_0_0,regfil_0_0_T,clock,'0','0','1');
regfil_0_0_T <= ((NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1268 AND
regfil_0_0)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND NOT N_PZ_1268 AND
N_PZ_1996 AND NOT regfil_0_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(7) AND NOT regfil_0_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(7) AND regfil_0_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1 AND
regfil_1_3 AND regfil_1_6 AND regfil_1_4 AND regfil_1_5 AND
regfil_1_7));
FTCPE_regfil_0_1: FTCPE port map (regfil_0_1,regfil_0_1_T,clock,'0','0','1');
regfil_0_1_T <= ((NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1262 AND
NOT regfil_0_1)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1946 AND
regfil_0_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(8) AND NOT regfil_0_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(8) AND regfil_0_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1 AND
regfil_1_3 AND regfil_1_6 AND regfil_1_4 AND regfil_1_5 AND
regfil_1_7 AND regfil_0_0));
FTCPE_regfil_0_2: FTCPE port map (regfil_0_2,regfil_0_2_T,clock,'0','0','1');
regfil_0_2_T <= ((NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1944 AND
NOT regfil_0_2)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND regfil_0_2 AND
N_PZ_1945)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(9) AND NOT regfil_0_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(9) AND regfil_0_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1 AND
regfil_0_1 AND regfil_1_3 AND regfil_1_6 AND regfil_1_4 AND
regfil_1_5 AND regfil_1_7 AND regfil_0_0));
FTCPE_regfil_0_3: FTCPE port map (regfil_0_3,regfil_0_3_T,clock,'0','0','1');
regfil_0_3_T <= ((NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1943 AND
NOT regfil_0_3)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND regfil_0_3 AND
N_PZ_2180)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(10) AND NOT regfil_0_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(10) AND regfil_0_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1 AND
regfil_0_1 AND regfil_1_3 AND regfil_1_6 AND regfil_1_4 AND
regfil_1_5 AND regfil_1_7 AND regfil_0_2 AND regfil_0_0));
FTCPE_regfil_0_4: FTCPE port map (regfil_0_4,regfil_0_4_T,clock,'0','0','1');
regfil_0_4_T <= ((NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_2181 AND
regfil_0_4)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1996 AND
NOT N_PZ_2181 AND NOT regfil_0_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(11) AND NOT regfil_0_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(11) AND regfil_0_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1 AND
regfil_0_1 AND regfil_1_3 AND regfil_1_6 AND regfil_1_4 AND
regfil_0_3 AND regfil_1_5 AND regfil_1_7 AND regfil_0_2 AND
regfil_0_0));
FTCPE_regfil_0_5: FTCPE port map (regfil_0_5,regfil_0_5_T,clock,'0','0','1');
regfil_0_5_T <= ((N_PZ_1799)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1265 AND
NOT regfil_0_5)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_2000 AND
regfil_0_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(12) AND NOT regfil_0_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(12) AND regfil_0_5));
FTCPE_regfil_0_6: FTCPE port map (regfil_0_6,regfil_0_6_T,clock,'0','0','1');
regfil_0_6_T <= ((regfil_0_5 AND N_PZ_1799)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND regfil_0_6 AND
N_PZ_2106)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND NOT regfil_0_6 AND
N_PZ_1888)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(13) AND NOT regfil_0_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(13) AND regfil_0_6)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(6).PIN AND NOT regd(2) AND NOT regd(1) AND
NOT regd(0) AND NOT regfil_0_6));
FTCPE_regfil_0_7: FTCPE port map (regfil_0_7,regfil_0_7_T,clock,'0','0','1');
regfil_0_7_T <= ((regfil_0_5 AND N_PZ_1799 AND regfil_0_6)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1266 AND
NOT regfil_0_7)
OR (NOT regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_2001 AND
regfil_0_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(14) AND NOT regfil_0_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(14) AND regfil_0_7));
FTCPE_regfil_1_0: FTCPE port map (regfil_1_0,regfil_1_0_T,clock,'0','0','1');
regfil_1_0_T <= ((NOT regd(2) AND NOT regd(1) AND regd(0) AND regfil_1_0 AND
N_PZ_1268)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND NOT regfil_1_0 AND
NOT N_PZ_1268 AND N_PZ_1996)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(0) AND NOT regfil_1_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(0) AND regfil_1_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN));
FTCPE_regfil_1_1: FTCPE port map (regfil_1_1,regfil_1_1_T,clock,'0','0','1');
regfil_1_1_T <= ((NOT regd(2) AND NOT regd(1) AND regd(0) AND regfil_1_1 AND
N_PZ_1946)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND NOT regfil_1_1 AND
N_PZ_1262)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(1) AND NOT regfil_1_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(1) AND regfil_1_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0));
FTCPE_regfil_1_2: FTCPE port map (regfil_1_2,regfil_1_2_T,clock,'0','0','1');
regfil_1_2_T <= ((NOT regd(2) AND NOT regd(1) AND regd(0) AND regfil_1_2 AND
N_PZ_1945)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND NOT regfil_1_2 AND
N_PZ_1944)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(2) AND NOT regfil_1_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(2) AND regfil_1_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_1));
FTCPE_regfil_1_3: FTCPE port map (regfil_1_3,regfil_1_3_T,clock,'0','0','1');
regfil_1_3_T <= ((NOT regd(2) AND NOT regd(1) AND regd(0) AND regfil_1_3 AND
N_PZ_2180)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND NOT regfil_1_3 AND
N_PZ_1943)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(3) AND NOT regfil_1_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(3) AND regfil_1_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1));
FTCPE_regfil_1_4: FTCPE port map (regfil_1_4,regfil_1_4_T,clock,'0','0','1');
regfil_1_4_T <= ((NOT regd(2) AND NOT regd(1) AND regd(0) AND regfil_1_4 AND
N_PZ_2181)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND N_PZ_1996 AND
NOT regfil_1_4 AND NOT N_PZ_2181)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(4) AND NOT regfil_1_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(4) AND regfil_1_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1 AND
regfil_1_3));
FTCPE_regfil_1_5: FTCPE port map (regfil_1_5,regfil_1_5_T,clock,'0','0','1');
regfil_1_5_T <= ((NOT regd(2) AND NOT regd(1) AND regd(0) AND N_PZ_1265 AND
NOT regfil_1_5)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND regfil_1_5 AND
N_PZ_2000)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(5) AND NOT regfil_1_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(5) AND regfil_1_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1 AND
regfil_1_3 AND regfil_1_4));
FTCPE_regfil_1_6: FTCPE port map (regfil_1_6,regfil_1_6_T,clock,'0','0','1');
regfil_1_6_T <= ((NOT state(3) AND state(1) AND NOT N_PZ_1066 AND NOT state(0) AND
NOT N_PZ_1209 AND addrhold(6) AND NOT regfil_1_6)
OR (NOT state(3) AND state(1) AND NOT N_PZ_1066 AND NOT state(0) AND
NOT N_PZ_1209 AND NOT addrhold(6) AND regfil_1_6)
OR (state(3) AND state(2) AND NOT state(4) AND state(0) AND
NOT N_PZ_1209 AND NOT regd(2) AND NOT regd(1) AND regd(0) AND regfil_1_6 AND
NOT alures(6))
OR (state(3) AND state(2) AND NOT state(4) AND state(0) AND
NOT N_PZ_1209 AND NOT regd(2) AND NOT regd(1) AND regd(0) AND NOT regfil_1_6 AND
alures(6))
OR (NOT state(3) AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND data(6).PIN AND NOT N_PZ_1209 AND NOT regd(2) AND NOT regd(1) AND
regd(0) AND NOT regfil_1_6)
OR (NOT state(3) AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND NOT data(6).PIN AND NOT N_PZ_1209 AND NOT regd(2) AND NOT regd(1) AND
regd(0) AND regfil_1_6)
OR (NOT reset AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
N_PZ_1209 AND NOT regd(2) AND NOT _cmp_eq0004 AND NOT regd(1) AND regd(0) AND
NOT N_PZ_1373 AND regfil_1_6 AND _COND_18(6))
OR (NOT reset AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
N_PZ_1209 AND NOT regd(2) AND NOT _cmp_eq0004 AND NOT regd(1) AND regd(0) AND
NOT N_PZ_1373 AND NOT regfil_1_6 AND NOT _COND_18(6))
OR (NOT reset AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND N_PZ_1209 AND regfil_1_0 AND regfil_1_2 AND
regfil_1_1 AND regfil_1_3 AND regfil_1_4 AND regfil_1_5));
FTCPE_regfil_1_7: FTCPE port map (regfil_1_7,regfil_1_7_T,clock,'0','0','1');
regfil_1_7_T <= ((NOT regd(2) AND NOT regd(1) AND regd(0) AND regfil_1_7 AND
N_PZ_2001)
OR (NOT regd(2) AND NOT regd(1) AND regd(0) AND NOT regfil_1_7 AND
N_PZ_1266)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND addrhold(7) AND NOT regfil_1_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND NOT state(0) AND NOT addrhold(7) AND regfil_1_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_1_0 AND regfil_1_2 AND regfil_1_1 AND
regfil_1_3 AND regfil_1_6 AND regfil_1_4 AND regfil_1_5));
FTCPE_regfil_2_0: FTCPE port map (regfil_2_0,regfil_2_0_T,clock,'0','0','1');
regfil_2_0_T <= ((holding(0) AND NOT regfil_2_0 AND N_PZ_2114)
OR (NOT holding(0) AND regfil_2_0 AND N_PZ_2114)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1268 AND
regfil_2_0)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND NOT N_PZ_1268 AND
N_PZ_1996 AND NOT regfil_2_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(7) AND NOT regfil_2_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(7) AND regfil_2_0)
OR (regfil_3_0 AND regfil_3_1 AND regfil_3_2 AND
regfil_3_3 AND regfil_3_4 AND regfil_3_5 AND N_PZ_1941 AND
regfil_3_6 AND regfil_3_7));
FTCPE_regfil_2_1: FTCPE port map (regfil_2_1,regfil_2_1_T,clock,'0','0','1');
regfil_2_1_T <= ((holding(1) AND N_PZ_2114 AND NOT regfil_2_1)
OR (NOT holding(1) AND regfil_2_1 AND NOT N_PZ_2155)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND regfil_2_1 AND
N_PZ_1946)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND NOT regfil_2_1 AND
N_PZ_1262)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(8) AND NOT regfil_2_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(8) AND regfil_2_1)
OR (regfil_3_0 AND regfil_2_0 AND regfil_3_1 AND
regfil_3_2 AND regfil_3_3 AND regfil_3_4 AND regfil_3_5 AND
N_PZ_1941 AND regfil_3_6 AND regfil_3_7)
OR (regfil_3_0 AND NOT holding(1) AND regfil_2_0 AND
N_PZ_2114 AND regfil_3_1 AND regfil_2_1 AND regfil_3_2 AND
regfil_3_3 AND regfil_3_4 AND regfil_3_5 AND regfil_3_6 AND
regfil_3_7));
FTCPE_regfil_2_2: FTCPE port map (regfil_2_2,regfil_2_2_T,clock,'0','0','1');
regfil_2_2_T <= ((holding(2) AND N_PZ_2114 AND NOT regfil_2_2)
OR (NOT holding(2) AND regfil_2_2 AND NOT N_PZ_2155)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1944 AND
NOT regfil_2_2)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND regfil_2_2 AND
N_PZ_1945)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(9) AND NOT regfil_2_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(9) AND regfil_2_2)
OR (regfil_3_0 AND regfil_2_0 AND regfil_3_1 AND
regfil_2_1 AND regfil_3_2 AND regfil_3_3 AND regfil_3_4 AND
regfil_3_5 AND N_PZ_1941 AND regfil_3_6 AND regfil_3_7)
OR (regfil_3_0 AND NOT holding(2) AND regfil_2_0 AND
N_PZ_2114 AND regfil_3_1 AND regfil_2_1 AND regfil_3_2 AND
regfil_2_2 AND regfil_3_3 AND regfil_3_4 AND regfil_3_5 AND
regfil_3_6 AND regfil_3_7));
FTCPE_regfil_2_3: FTCPE port map (regfil_2_3,regfil_2_3_T,clock,'0','0','1');
regfil_2_3_T <= ((N_PZ_2114 AND holding(3) AND NOT regfil_2_3)
OR (NOT holding(3) AND regfil_2_3 AND NOT N_PZ_2155)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1943 AND
NOT regfil_2_3)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND regfil_2_3 AND
N_PZ_2180)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(10) AND NOT regfil_2_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(10) AND regfil_2_3)
OR (regfil_3_0 AND regfil_2_0 AND regfil_3_1 AND
regfil_2_1 AND regfil_3_2 AND regfil_2_2 AND regfil_3_3 AND
regfil_3_4 AND regfil_3_5 AND N_PZ_1941 AND regfil_3_6 AND
regfil_3_7)
OR (regfil_3_0 AND regfil_2_0 AND N_PZ_2114 AND
regfil_3_1 AND regfil_2_1 AND regfil_3_2 AND regfil_2_2 AND
regfil_3_3 AND NOT holding(3) AND regfil_3_4 AND regfil_3_5 AND
regfil_2_3 AND regfil_3_6 AND regfil_3_7));
FTCPE_regfil_2_4: FTCPE port map (regfil_2_4,regfil_2_4_T,clock,'0','0','1');
regfil_2_4_T <= ((N_PZ_2114 AND holding(4) AND NOT regfil_2_4)
OR (NOT holding(4) AND regfil_2_4 AND NOT N_PZ_2155)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_2181 AND
regfil_2_4)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1996 AND
NOT N_PZ_2181 AND NOT regfil_2_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(11) AND NOT regfil_2_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(11) AND regfil_2_4)
OR (regfil_3_0 AND regfil_2_0 AND regfil_3_1 AND
regfil_2_1 AND regfil_3_2 AND regfil_2_2 AND regfil_3_3 AND
regfil_3_4 AND regfil_3_5 AND N_PZ_1941 AND regfil_2_3 AND
regfil_3_6 AND regfil_3_7)
OR (regfil_3_0 AND regfil_2_0 AND N_PZ_2114 AND
regfil_3_1 AND regfil_2_1 AND regfil_3_2 AND regfil_2_2 AND
regfil_3_3 AND regfil_3_4 AND NOT holding(4) AND regfil_3_5 AND
regfil_2_3 AND regfil_3_6 AND regfil_2_4 AND regfil_3_7));
FTCPE_regfil_2_5: FTCPE port map (regfil_2_5,regfil_2_5_T,clock,'0','0','1');
regfil_2_5_T <= ((N_PZ_2114 AND holding(5) AND NOT regfil_2_5)
OR (N_PZ_1941 AND regfil_2_5 AND NOT _mux0014(13)8)
OR (N_PZ_2114 AND NOT holding(5) AND regfil_2_5 AND
NOT _mux0014(13)8)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1265 AND
NOT regfil_2_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(12) AND NOT regfil_2_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(12) AND regfil_2_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_2_5 AND _mux0014(13)8)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT regd(2) AND regd(1) AND NOT regd(0) AND
NOT alures(5) AND regfil_2_5)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(5).PIN AND NOT regd(2) AND regd(1) AND
NOT regd(0) AND regfil_2_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND NOT regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND NOT regd(0) AND NOT N_PZ_1373 AND _COND_18(5) AND
regfil_2_5 AND NOT _mux0014(13)8));
FTCPE_regfil_2_6: FTCPE port map (regfil_2_6,regfil_2_6_T,clock,'0','0','1');
regfil_2_6_T <= ((N_PZ_2114 AND NOT regfil_2_6 AND holding(6))
OR (N_PZ_1941 AND regfil_2_5 AND NOT _mux0014(13)8)
OR (NOT _mux0014(13)8 AND regfil_2_6 AND NOT N_PZ_2155 AND
NOT holding(6))
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND NOT regfil_2_6 AND
N_PZ_1888)
OR (N_PZ_2114 AND regfil_2_5 AND NOT _mux0014(13)8 AND
regfil_2_6 AND NOT holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(13) AND NOT regfil_2_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(13) AND regfil_2_6)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT regd(2) AND regd(1) AND NOT regd(0) AND
regfil_2_6 AND NOT alures(6))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(6).PIN AND NOT regd(2) AND regd(1) AND
NOT regd(0) AND NOT regfil_2_6)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(6).PIN AND NOT regd(2) AND regd(1) AND
NOT regd(0) AND regfil_2_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND NOT regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND NOT regd(0) AND NOT N_PZ_1373 AND NOT _mux0014(13)8 AND
regfil_2_6 AND _COND_18(6)));
FTCPE_regfil_2_7: FTCPE port map (regfil_2_7,regfil_2_7_T,clock,'0','0','1');
regfil_2_7_T <= ((N_PZ_2114 AND holding(7) AND NOT regfil_2_7)
OR (NOT holding(7) AND NOT _mux0014(13)8 AND regfil_2_7 AND
NOT N_PZ_2155)
OR (N_PZ_1941 AND regfil_2_5 AND NOT _mux0014(13)8 AND
regfil_2_6)
OR (NOT regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1266 AND
NOT regfil_2_7)
OR (N_PZ_2114 AND NOT holding(7) AND regfil_2_5 AND
NOT _mux0014(13)8 AND regfil_2_7 AND regfil_2_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(14) AND NOT regfil_2_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(14) AND regfil_2_7)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT regd(2) AND regd(1) AND NOT regd(0) AND
NOT alures(7) AND regfil_2_7)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(7).PIN AND NOT regd(2) AND regd(1) AND
NOT regd(0) AND regfil_2_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND NOT regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND NOT regd(0) AND _COND_18(7) AND NOT N_PZ_1373 AND
NOT _mux0014(13)8 AND regfil_2_7));
FTCPE_regfil_3_0: FTCPE port map (regfil_3_0,regfil_3_0_T,clock,'0','0','1');
regfil_3_0_T <= ((N_PZ_1941)
OR (regfil_3_0 AND NOT holding(0) AND N_PZ_2114)
OR (NOT regfil_3_0 AND holding(0) AND N_PZ_2114)
OR (NOT regd(2) AND regd(1) AND regd(0) AND regfil_3_0 AND
N_PZ_1268)
OR (NOT regd(2) AND regd(1) AND regd(0) AND NOT regfil_3_0 AND
NOT N_PZ_1268 AND N_PZ_1996)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(0) AND NOT regfil_3_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(0) AND regfil_3_0));
FTCPE_regfil_3_1: FTCPE port map (regfil_3_1,regfil_3_1_T,clock,'0','0','1');
regfil_3_1_T <= ((regfil_3_0 AND N_PZ_1941)
OR (holding(1) AND N_PZ_2114 AND NOT regfil_3_1)
OR (NOT holding(1) AND N_PZ_2114 AND regfil_3_1)
OR (NOT regd(2) AND regd(1) AND regd(0) AND regfil_3_1 AND
N_PZ_1946)
OR (NOT regd(2) AND regd(1) AND regd(0) AND NOT regfil_3_1 AND
N_PZ_1262)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND regfil_3_1 AND NOT addrhold(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT regfil_3_1 AND addrhold(1)));
FTCPE_regfil_3_2: FTCPE port map (regfil_3_2,regfil_3_2_T,clock,'0','0','1');
regfil_3_2_T <= ((regfil_3_0 AND regfil_3_1 AND N_PZ_1941)
OR (holding(2) AND N_PZ_2114 AND NOT regfil_3_2)
OR (NOT holding(2) AND N_PZ_2114 AND regfil_3_2)
OR (NOT regd(2) AND regd(1) AND regd(0) AND regfil_3_2 AND
N_PZ_1945)
OR (NOT regd(2) AND regd(1) AND regd(0) AND NOT regfil_3_2 AND
N_PZ_1944)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND regfil_3_2 AND NOT addrhold(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT regfil_3_2 AND addrhold(2)));
FTCPE_regfil_3_3: FTCPE port map (regfil_3_3,regfil_3_3_T,clock,'0','0','1');
regfil_3_3_T <= ((N_PZ_2114 AND regfil_3_3 AND NOT holding(3))
OR (N_PZ_2114 AND NOT regfil_3_3 AND holding(3))
OR (regfil_3_0 AND regfil_3_1 AND regfil_3_2 AND
N_PZ_1941)
OR (NOT regd(2) AND regd(1) AND regd(0) AND N_PZ_1943 AND
NOT regfil_3_3)
OR (NOT regd(2) AND regd(1) AND regd(0) AND regfil_3_3 AND
N_PZ_2180)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(3) AND NOT regfil_3_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(3) AND regfil_3_3));
FTCPE_regfil_3_4: FTCPE port map (regfil_3_4,regfil_3_4_T,clock,'0','0','1');
regfil_3_4_T <= ((N_PZ_2114 AND regfil_3_4 AND NOT holding(4))
OR (N_PZ_2114 AND NOT regfil_3_4 AND holding(4))
OR (NOT regd(2) AND regd(1) AND regd(0) AND regfil_3_4 AND
N_PZ_2181)
OR (regfil_3_0 AND regfil_3_1 AND regfil_3_2 AND
regfil_3_3 AND N_PZ_1941)
OR (NOT regd(2) AND regd(1) AND regd(0) AND N_PZ_1996 AND
NOT regfil_3_4 AND NOT N_PZ_2181)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(4) AND NOT regfil_3_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(4) AND regfil_3_4));
FTCPE_regfil_3_5: FTCPE port map (regfil_3_5,regfil_3_5_T,clock,'0','0','1');
regfil_3_5_T <= ((N_PZ_2114 AND regfil_3_5 AND NOT holding(5))
OR (N_PZ_2114 AND NOT regfil_3_5 AND holding(5))
OR (NOT regd(2) AND regd(1) AND regd(0) AND regfil_3_5 AND
N_PZ_2000)
OR (NOT regd(2) AND regd(1) AND regd(0) AND NOT regfil_3_5 AND
N_PZ_1265)
OR (regfil_3_0 AND regfil_3_1 AND regfil_3_2 AND
regfil_3_3 AND regfil_3_4 AND N_PZ_1941)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(5) AND NOT regfil_3_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(5) AND regfil_3_5));
FTCPE_regfil_3_6: FTCPE port map (regfil_3_6,regfil_3_6_T,clock,'0','0','1');
regfil_3_6_T <= ((N_PZ_2114 AND regfil_3_6 AND NOT holding(6))
OR (N_PZ_2114 AND NOT regfil_3_6 AND holding(6))
OR (NOT regd(2) AND regd(1) AND regd(0) AND regfil_3_6 AND
N_PZ_2106)
OR (NOT regd(2) AND regd(1) AND regd(0) AND NOT regfil_3_6 AND
N_PZ_1888)
OR (regfil_3_0 AND regfil_3_1 AND regfil_3_2 AND
regfil_3_3 AND regfil_3_4 AND regfil_3_5 AND N_PZ_1941)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND regfil_3_6 AND NOT addrhold(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT regfil_3_6 AND addrhold(6))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(6).PIN AND NOT regd(2) AND regd(1) AND
regd(0) AND NOT regfil_3_6));
FTCPE_regfil_3_7: FTCPE port map (regfil_3_7,regfil_3_7_T,clock,'0','0','1');
regfil_3_7_T <= ((N_PZ_2114 AND holding(7) AND NOT regfil_3_7)
OR (N_PZ_2114 AND NOT holding(7) AND regfil_3_7)
OR (NOT regd(2) AND regd(1) AND regd(0) AND N_PZ_1266 AND
NOT regfil_3_7)
OR (NOT regd(2) AND regd(1) AND regd(0) AND regfil_3_7 AND
N_PZ_2001)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND addrhold(7) AND NOT regfil_3_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
state(1) AND state(0) AND NOT addrhold(7) AND regfil_3_7)
OR (regfil_3_0 AND regfil_3_1 AND regfil_3_2 AND
regfil_3_3 AND regfil_3_4 AND regfil_3_5 AND N_PZ_1941 AND
regfil_3_6));
FTCPE_regfil_4_0: FTCPE port map (regfil_4_0,regfil_4_0_T,clock,'0','0','1');
regfil_4_0_T <= ((data(0).PIN AND NOT regfil_4_0 AND N_PZ_1061)
OR (NOT data(0).PIN AND regfil_4_0 AND N_PZ_1061)
OR (regfil_4_0 AND N_PZ_1100 AND NOT _mux0010(8)71)
OR (NOT regfil_4_0 AND regfil_2_0 AND N_PZ_2114)
OR (regfil_4_0 AND NOT regfil_2_0 AND N_PZ_2114 AND
NOT _mux0010(8)71)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND addrhold(7) AND NOT regfil_4_0)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT addrhold(7) AND regfil_4_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_0 AND _mux0010(8)71)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
regfil_4_0 AND NOT alures(0))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
NOT regfil_4_0 AND alures(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT regfil_4_0 AND NOT _COND_18(0) AND
NOT N_PZ_1373)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND regfil_4_0 AND _COND_18(0) AND
NOT N_PZ_1373 AND NOT _mux0010(8)71));
FTCPE_regfil_4_1: FTCPE port map (regfil_4_1,regfil_4_1_T,clock,'0','0','1');
regfil_4_1_T <= ((data(1).PIN AND NOT regfil_4_1 AND N_PZ_1061)
OR (NOT data(1).PIN AND regfil_4_1 AND N_PZ_1061)
OR (regfil_4_1 AND N_PZ_1100 AND NOT _mux0010(9)71)
OR (NOT regfil_4_1 AND N_PZ_2114 AND regfil_2_1)
OR (regfil_4_1 AND N_PZ_2114 AND NOT regfil_2_1 AND
NOT _mux0010(9)71)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND regfil_4_1 AND NOT addrhold(8))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT regfil_4_1 AND addrhold(8))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_1 AND _mux0010(9)71)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
regfil_4_1 AND NOT alures(1))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
NOT regfil_4_1 AND alures(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT regfil_4_1 AND NOT N_PZ_1373 AND
NOT _COND_18(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND regfil_4_1 AND NOT N_PZ_1373 AND
_COND_18(1) AND NOT _mux0010(9)71));
FTCPE_regfil_4_2: FTCPE port map (regfil_4_2,regfil_4_2_T,clock,'0','0','1');
regfil_4_2_T <= ((data(2).PIN AND NOT regfil_4_2 AND N_PZ_1061)
OR (NOT data(2).PIN AND regfil_4_2 AND N_PZ_1061)
OR (regfil_4_2 AND N_PZ_1100 AND NOT _mux0010(10)71)
OR (NOT regfil_4_2 AND N_PZ_2114 AND regfil_2_2)
OR (regfil_4_2 AND N_PZ_2114 AND NOT regfil_2_2 AND
NOT _mux0010(10)71)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND regfil_4_2 AND NOT addrhold(9))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT regfil_4_2 AND addrhold(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_2 AND _mux0010(10)71)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
regfil_4_2 AND NOT alures(2))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
NOT regfil_4_2 AND alures(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT regfil_4_2 AND NOT N_PZ_1373 AND
NOT _COND_18(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND regfil_4_2 AND NOT N_PZ_1373 AND
_COND_18(2) AND NOT _mux0010(10)71));
FTCPE_regfil_4_3: FTCPE port map (regfil_4_3,regfil_4_3_T,clock,'0','0','1');
regfil_4_3_T <= ((data(3).PIN AND NOT regfil_4_3 AND N_PZ_1061)
OR (NOT data(3).PIN AND regfil_4_3 AND N_PZ_1061)
OR (N_PZ_2114 AND NOT regfil_4_3 AND regfil_2_3)
OR (regfil_4_3 AND N_PZ_1100 AND NOT _mux0010(11)71)
OR (N_PZ_2114 AND regfil_4_3 AND NOT regfil_2_3 AND
NOT _mux0010(11)71)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND N_PZ_1157 AND
NOT regfil_4_3)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND regfil_4_3 AND NOT addrhold(10))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT regfil_4_3 AND addrhold(10))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_3 AND _mux0010(11)71)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
NOT alures(3) AND regfil_4_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT N_PZ_1373 AND regfil_4_3 AND
_COND_18(3) AND NOT _mux0010(11)71));
FTCPE_regfil_4_4: FTCPE port map (regfil_4_4,regfil_4_4_T,clock,'0','0','1');
regfil_4_4_T <= ((data(4).PIN AND NOT regfil_4_4 AND N_PZ_1061)
OR (NOT data(4).PIN AND regfil_4_4 AND N_PZ_1061)
OR (N_PZ_2114 AND NOT regfil_4_4 AND regfil_2_4)
OR (regfil_4_4 AND N_PZ_1100 AND NOT _mux0010(12)71)
OR (N_PZ_2114 AND regfil_4_4 AND NOT regfil_2_4 AND
NOT _mux0010(12)71)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND regfil_4_4 AND NOT addrhold(11))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT regfil_4_4 AND addrhold(11))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_4 AND _mux0010(12)71)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
regfil_4_4 AND NOT alures(4))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
NOT regfil_4_4 AND alures(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT N_PZ_1373 AND NOT regfil_4_4 AND
NOT _COND_18(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT N_PZ_1373 AND regfil_4_4 AND
_COND_18(4) AND NOT _mux0010(12)71));
FTCPE_regfil_4_5: FTCPE port map (regfil_4_5,regfil_4_5_T,clock,'0','0','1');
regfil_4_5_T <= ((data(5).PIN AND NOT regfil_4_5 AND N_PZ_1061)
OR (NOT data(5).PIN AND regfil_4_5 AND N_PZ_1061)
OR (N_PZ_2114 AND NOT regfil_4_5 AND regfil_2_5)
OR (regfil_4_5 AND N_PZ_1100 AND NOT _mux0010(13)71)
OR (N_PZ_2114 AND regfil_4_5 AND NOT regfil_2_5 AND
NOT _mux0010(13)71)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND regfil_4_5 AND NOT addrhold(12))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT regfil_4_5 AND addrhold(12))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_5 AND _mux0010(13)71)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
regfil_4_5 AND NOT alures(5))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
NOT regfil_4_5 AND alures(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT N_PZ_1373 AND NOT regfil_4_5 AND
NOT _COND_18(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT N_PZ_1373 AND regfil_4_5 AND
_COND_18(5) AND NOT _mux0010(13)71));
FTCPE_regfil_4_6: FTCPE port map (regfil_4_6,regfil_4_6_T,clock,'0','0','1');
regfil_4_6_T <= ((data(6).PIN AND NOT regfil_4_6 AND N_PZ_1061)
OR (NOT data(6).PIN AND regfil_4_6 AND N_PZ_1061)
OR (N_PZ_2114 AND NOT regfil_4_6 AND regfil_2_6)
OR (regfil_4_6 AND N_PZ_1100 AND NOT _mux0010(14)71)
OR (N_PZ_2114 AND regfil_4_6 AND NOT regfil_2_6 AND
NOT _mux0010(14)71)
OR (regd(2) AND NOT regd(1) AND NOT regd(0) AND NOT regfil_4_6 AND
N_PZ_1888)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND regfil_4_6 AND NOT addrhold(13))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT regfil_4_6 AND addrhold(13))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_6 AND _mux0010(14)71)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
regfil_4_6 AND NOT alures(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT N_PZ_1373 AND regfil_4_6 AND
_COND_18(6) AND NOT _mux0010(14)71));
FTCPE_regfil_4_7: FTCPE port map (regfil_4_7,regfil_4_7_T,clock,'0','0','1');
regfil_4_7_T <= ((data(7).PIN AND NOT regfil_4_7 AND N_PZ_1061)
OR (NOT data(7).PIN AND regfil_4_7 AND N_PZ_1061)
OR (N_PZ_2114 AND NOT regfil_4_7 AND regfil_2_7)
OR (regfil_4_7 AND N_PZ_1100 AND NOT _mux0010(15)71)
OR (N_PZ_2114 AND regfil_4_7 AND NOT regfil_2_7 AND
NOT _mux0010(15)71)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND regfil_4_7 AND NOT addrhold(14))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT regfil_4_7 AND addrhold(14))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_4_7 AND _mux0010(15)71)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
regfil_4_7 AND NOT alures(7))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND NOT regd(1) AND NOT regd(0) AND
NOT regfil_4_7 AND alures(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND NOT _COND_18(7) AND NOT N_PZ_1373 AND
NOT regfil_4_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND NOT regd(1) AND NOT regd(0) AND _COND_18(7) AND NOT N_PZ_1373 AND
regfil_4_7 AND NOT _mux0010(15)71));
FTCPE_regfil_5_0: FTCPE port map (regfil_5_0,regfil_5_0_T,clock,'0','0','1');
regfil_5_0_T <= ((N_PZ_1528)
OR (regfil_3_0 AND N_PZ_1533)
OR (regfil_1_0 AND N_PZ_1432)
OR (sp(0) AND N_PZ_1536)
OR (data(0).PIN AND NOT regfil_5_0 AND N_PZ_1062)
OR (NOT data(0).PIN AND regfil_5_0 AND N_PZ_1062)
OR (regfil_5_0 AND NOT regfil_3_0 AND N_PZ_2114)
OR (regfil_5_0 AND _COND_18(0) AND N_PZ_2196)
OR (NOT regfil_5_0 AND regfil_3_0 AND N_PZ_2114)
OR (NOT regfil_5_0 AND NOT _COND_18(0) AND N_PZ_2196)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND addrhold(0) AND NOT regfil_5_0)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT addrhold(0) AND regfil_5_0)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regfil_5_0 AND NOT alures(0) AND N_PZ_1129)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT regfil_5_0 AND alures(0) AND N_PZ_1129)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
regfil_5_0));
FTCPE_regfil_5_1: FTCPE port map (regfil_5_1,regfil_5_1_T,clock,'0','0','1');
regfil_5_1_T <= ((regfil_5_0 AND N_PZ_1528)
OR (data(1).PIN AND NOT regfil_5_1 AND N_PZ_1062)
OR (NOT data(1).PIN AND regfil_5_1 AND N_PZ_1062)
OR (regfil_5_0 AND NOT regfil_5_1 AND N_PZ_1580)
OR (NOT regfil_5_0 AND regfil_3_1 AND N_PZ_1533)
OR (NOT regfil_5_0 AND regfil_5_1 AND N_PZ_1580)
OR (NOT regfil_5_0 AND sp(1) AND N_PZ_1536)
OR (NOT regfil_5_0 AND regfil_1_1 AND N_PZ_1432)
OR (NOT regfil_3_0 AND regfil_3_1 AND N_PZ_1533)
OR (NOT regfil_1_0 AND regfil_1_1 AND N_PZ_1432)
OR (N_PZ_2114 AND regfil_3_1 AND NOT regfil_5_1)
OR (N_PZ_2114 AND NOT regfil_3_1 AND regfil_5_1)
OR (regfil_5_1 AND _COND_18(1) AND N_PZ_2196)
OR (NOT regfil_5_1 AND N_PZ_1129 AND N_PZ_1262)
OR (NOT sp(0) AND sp(1) AND N_PZ_1536)
OR (regfil_5_0 AND regfil_3_0 AND NOT regfil_3_1 AND
N_PZ_1533)
OR (regfil_5_0 AND regfil_1_0 AND NOT regfil_1_1 AND
N_PZ_1432)
OR (regfil_5_0 AND sp(0) AND NOT sp(1) AND N_PZ_1536)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND addrhold(1) AND NOT regfil_5_1)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT addrhold(1) AND regfil_5_1)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regfil_5_1 AND N_PZ_1129 AND NOT alures(1)));
FTCPE_regfil_5_2: FTCPE port map (regfil_5_2,regfil_5_2_T,clock,'0','0','1');
regfil_5_2_T <= ((data(2).PIN AND N_PZ_1062 AND NOT regfil_5_2)
OR (NOT data(2).PIN AND N_PZ_1062 AND regfil_5_2)
OR (N_PZ_2114 AND regfil_3_2 AND NOT regfil_5_2)
OR (regfil_5_2 AND NOT _mux0009(2)72 AND N_PZ_1100)
OR (N_PZ_2114 AND NOT regfil_3_2 AND regfil_5_2 AND
NOT _mux0009(2)72)
OR (regfil_5_2 AND NOT _mux0009(2)72 AND _COND_18(2) AND
N_PZ_2196)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND addrhold(2) AND NOT regfil_5_2)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT addrhold(2) AND regfil_5_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_2 AND _mux0009(2)72)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND N_PZ_1129 AND regfil_5_2 AND NOT alures(2))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND N_PZ_1129 AND NOT regfil_5_2 AND alures(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND N_PZ_1129 AND NOT regfil_5_2 AND
NOT _COND_18(2)));
FTCPE_regfil_5_3: FTCPE port map (regfil_5_3,regfil_5_3_T,clock,'0','0','1');
regfil_5_3_T <= ((data(3).PIN AND NOT regfil_5_3 AND N_PZ_1062)
OR (NOT data(3).PIN AND regfil_5_3 AND N_PZ_1062)
OR (regfil_5_3 AND N_PZ_2114 AND NOT regfil_3_3)
OR (regfil_5_3 AND NOT regfil_5_2 AND N_PZ_1580)
OR (regfil_5_3 AND _COND_18(3) AND N_PZ_2196)
OR (NOT regfil_5_3 AND N_PZ_2114 AND regfil_3_3)
OR (NOT regfil_5_3 AND N_PZ_1129 AND N_PZ_1157)
OR (NOT regfil_5_3 AND regfil_5_2 AND N_PZ_1580)
OR (regfil_1_3 AND N_PZ_2004 AND N_PZ_1432)
OR (regfil_3_3 AND NOT N_PZ_2358 AND N_PZ_1533)
OR (NOT regfil_3_3 AND N_PZ_2358 AND N_PZ_1533)
OR (sp(3) AND NOT Madd__AUX_11__or0001 AND N_PZ_1536)
OR (NOT sp(3) AND Madd__AUX_11__or0001 AND N_PZ_1536)
OR (regfil_5_0 AND regfil_5_1 AND regfil_5_2 AND
N_PZ_1528)
OR (regfil_5_2 AND regfil_1_2 AND NOT regfil_1_3 AND
N_PZ_1432)
OR (regfil_5_2 AND NOT regfil_1_3 AND
Madd__addsub0000__or0000 AND N_PZ_1432)
OR (regfil_1_2 AND NOT regfil_1_3 AND
Madd__addsub0000__or0000 AND N_PZ_1432)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND regfil_5_3 AND NOT addrhold(3))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT regfil_5_3 AND addrhold(3))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regfil_5_3 AND N_PZ_1129 AND NOT alures(3)));
FTCPE_regfil_5_4: FTCPE port map (regfil_5_4,regfil_5_4_T,clock,'0','0','1');
regfil_5_4_T <= ((data(4).PIN AND N_PZ_1062 AND NOT regfil_5_4)
OR (NOT data(4).PIN AND N_PZ_1062 AND regfil_5_4)
OR (N_PZ_2114 AND NOT regfil_5_4 AND regfil_3_4)
OR (regfil_5_4 AND NOT _mux0009(4)72 AND N_PZ_1100)
OR (NOT regfil_5_4 AND NOT _COND_18(4) AND N_PZ_2196)
OR (N_PZ_2114 AND regfil_5_4 AND NOT _mux0009(4)72 AND
NOT regfil_3_4)
OR (regfil_5_4 AND NOT _mux0009(4)72 AND _COND_18(4) AND
N_PZ_2196)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND addrhold(4) AND NOT regfil_5_4)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT addrhold(4) AND regfil_5_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_4 AND _mux0009(4)72)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND N_PZ_1129 AND regfil_5_4 AND NOT alures(4))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND N_PZ_1129 AND NOT regfil_5_4 AND alures(4)));
FTCPE_regfil_5_5: FTCPE port map (regfil_5_5,regfil_5_5_T,clock,'0','0','1');
regfil_5_5_T <= ((data(5).PIN AND N_PZ_1062 AND NOT regfil_5_5)
OR (NOT data(5).PIN AND N_PZ_1062 AND regfil_5_5)
OR (N_PZ_2114 AND NOT regfil_5_5 AND regfil_3_5)
OR (regfil_5_5 AND NOT _mux0009(5)72 AND N_PZ_1100)
OR (NOT regfil_5_5 AND NOT _COND_18(5) AND N_PZ_2196)
OR (N_PZ_2114 AND regfil_5_5 AND NOT _mux0009(5)72 AND
NOT regfil_3_5)
OR (regfil_5_5 AND NOT _mux0009(5)72 AND _COND_18(5) AND
N_PZ_2196)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND addrhold(5) AND NOT regfil_5_5)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT addrhold(5) AND regfil_5_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_5 AND _mux0009(5)72)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND N_PZ_1129 AND regfil_5_5 AND NOT alures(5))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND N_PZ_1129 AND NOT regfil_5_5 AND alures(5)));
FTCPE_regfil_5_6: FTCPE port map (regfil_5_6,regfil_5_6_T,clock,'0','0','1');
regfil_5_6_T <= ((data(6).PIN AND N_PZ_1062 AND NOT regfil_5_6)
OR (NOT data(6).PIN AND N_PZ_1062 AND regfil_5_6)
OR (N_PZ_2114 AND regfil_3_6 AND NOT regfil_5_6)
OR (N_PZ_1129 AND NOT regfil_5_6 AND N_PZ_1888)
OR (regfil_5_6 AND NOT _mux0009(6)72 AND N_PZ_1100)
OR (N_PZ_2114 AND NOT regfil_3_6 AND regfil_5_6 AND
NOT _mux0009(6)72)
OR (regfil_5_6 AND NOT _mux0009(6)72 AND _COND_18(6) AND
N_PZ_2196)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND addrhold(6) AND NOT regfil_5_6)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT addrhold(6) AND regfil_5_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_6 AND _mux0009(6)72)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND N_PZ_1129 AND regfil_5_6 AND NOT alures(6)));
FTCPE_regfil_5_7: FTCPE port map (regfil_5_7,regfil_5_7_T,clock,'0','0','1');
regfil_5_7_T <= ((data(7).PIN AND NOT regfil_5_7 AND N_PZ_1062)
OR (NOT data(7).PIN AND regfil_5_7 AND N_PZ_1062)
OR (NOT _COND_18(7) AND NOT regfil_5_7 AND N_PZ_2196)
OR (regfil_5_7 AND N_PZ_1100 AND NOT _mux0009(7)72)
OR (NOT regfil_5_7 AND N_PZ_2114 AND regfil_3_7)
OR (_COND_18(7) AND regfil_5_7 AND N_PZ_2196 AND
NOT _mux0009(7)72)
OR (regfil_5_7 AND N_PZ_2114 AND NOT regfil_3_7 AND
NOT _mux0009(7)72)
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND regfil_5_7 AND NOT addrhold(7))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND NOT state(0) AND NOT regfil_5_7 AND addrhold(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT regfil_5_7 AND _mux0009(7)72)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regfil_5_7 AND N_PZ_1129 AND NOT alures(7))
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT regfil_5_7 AND N_PZ_1129 AND alures(7)));
FDCPE_regfil_6_0: FDCPE port map (regfil_6_0,regfil_6_0_D,clock,'0','0','1');
regfil_6_0_D <= ((NOT N_PZ_2186 AND regfil_6_0)
OR (NOT N_PZ_1268 AND N_PZ_1996 AND regfil_6_0)
OR (regd(2) AND regd(1) AND NOT regd(0) AND NOT N_PZ_1268 AND
N_PZ_1996 AND NOT regfil_6_0));
FTCPE_regfil_6_1: FTCPE port map (regfil_6_1,regfil_6_1_T,clock,'0','0','1');
regfil_6_1_T <= ((NOT N_PZ_1262 AND N_PZ_2186 AND regfil_6_1)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1262 AND
NOT regfil_6_1));
FTCPE_regfil_6_2: FTCPE port map (regfil_6_2,regfil_6_2_T,clock,'0','0','1');
regfil_6_2_T <= ((regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1945 AND
regfil_6_2)
OR (NOT reset AND state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND
alures(2) AND NOT regfil_6_2)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(2).PIN AND regd(2) AND regd(1) AND
NOT regd(0) AND NOT regfil_6_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND NOT regd(0) AND NOT N_PZ_1373 AND NOT _COND_18(2) AND
NOT regfil_6_2));
FTCPE_regfil_6_3: FTCPE port map (regfil_6_3,regfil_6_3_T,clock,'0','0','1');
regfil_6_3_T <= ((regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1943 AND
NOT regfil_6_3)
OR (NOT reset AND state(2) AND NOT state(4) AND NOT state(1) AND
state(0) AND regd(2) AND regd(1) AND NOT regd(0) AND NOT N_PZ_1943 AND
regfil_6_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
NOT _cmp_eq0004 AND NOT N_PZ_1373 AND NOT N_PZ_1943 AND regfil_6_3 AND N_PZ_1921));
FDCPE_regfil_6_4: FDCPE port map (regfil_6_4,regfil_6_4_D,clock,'0','0','1');
regfil_6_4_D <= ((NOT N_PZ_2186 AND regfil_6_4)
OR (N_PZ_1996 AND NOT N_PZ_2181 AND regfil_6_4)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1996 AND
NOT N_PZ_2181 AND NOT regfil_6_4));
FTCPE_regfil_6_5: FTCPE port map (regfil_6_5,regfil_6_5_T,clock,'0','0','1');
regfil_6_5_T <= ((NOT N_PZ_1265 AND regfil_6_5 AND N_PZ_2186)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1265 AND
NOT regfil_6_5));
FTCPE_regfil_6_6: FTCPE port map (regfil_6_6,regfil_6_6_T,clock,'0','0','1');
regfil_6_6_T <= ((regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1888 AND
NOT regfil_6_6)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_2106 AND
regfil_6_6)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(6).PIN AND regd(2) AND regd(1) AND
NOT regd(0) AND NOT regfil_6_6));
FTCPE_regfil_6_7: FTCPE port map (regfil_6_7,regfil_6_7_T,clock,'0','0','1');
regfil_6_7_T <= ((NOT N_PZ_1266 AND N_PZ_2186 AND regfil_6_7)
OR (regd(2) AND regd(1) AND NOT regd(0) AND N_PZ_1266 AND
NOT regfil_6_7));
FTCPE_regfil_7_0: FTCPE port map (regfil_7_0,regfil_7_0_T,clock,'0','0','1');
regfil_7_0_T <= ((regfil_7_0 AND NOT alures(0) AND N_PZ_1060)
OR (NOT regfil_7_0 AND alures(0) AND N_PZ_1060)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(0).PIN AND regd(2) AND regd(1) AND
regd(0) AND NOT regfil_7_0)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(0).PIN AND regd(2) AND regd(1) AND
regd(0) AND regfil_7_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
holding(0) AND NOT regfil_7_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT holding(0) AND regfil_7_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_0 AND NOT regfil_7_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_0 AND regfil_7_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND regfil_7_0 AND _COND_18(0) AND
NOT N_PZ_1373)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT regfil_7_0 AND NOT _COND_18(0) AND
NOT N_PZ_1373)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND carry AND NOT regfil_7_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND NOT carry AND regfil_7_0)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND regfil_7_0 AND NOT regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND NOT regfil_7_0 AND regfil_7_7));
FTCPE_regfil_7_1: FTCPE port map (regfil_7_1,regfil_7_1_T,clock,'0','0','1');
regfil_7_1_T <= ((regfil_7_1 AND NOT alures(1) AND N_PZ_1060)
OR (NOT regfil_7_1 AND alures(1) AND N_PZ_1060)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(1).PIN AND regd(2) AND regd(1) AND
regd(0) AND NOT regfil_7_1)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(1).PIN AND regd(2) AND regd(1) AND
regd(0) AND regfil_7_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND N_PZ_1890)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
regfil_7_1 AND NOT holding(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT regfil_7_1 AND holding(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_0 AND NOT regfil_7_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_0 AND regfil_7_1)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND regfil_7_1 AND NOT N_PZ_1373 AND
_COND_18(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT regfil_7_1 AND NOT N_PZ_1373 AND
NOT _COND_18(1)));
FTCPE_regfil_7_2: FTCPE port map (regfil_7_2,regfil_7_2_T,clock,'0','0','1');
regfil_7_2_T <= ((regfil_7_2 AND NOT alures(2) AND N_PZ_1060)
OR (NOT regfil_7_2 AND alures(2) AND N_PZ_1060)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(2).PIN AND regd(2) AND regd(1) AND
regd(0) AND NOT regfil_7_2)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(2).PIN AND regd(2) AND regd(1) AND
regd(0) AND regfil_7_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND N_PZ_1890)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
regfil_7_2 AND NOT holding(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT regfil_7_2 AND holding(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_3 AND NOT regfil_7_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_3 AND regfil_7_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND regfil_7_2 AND NOT N_PZ_1373 AND
_COND_18(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT regfil_7_2 AND NOT N_PZ_1373 AND
NOT _COND_18(2)));
FTCPE_regfil_7_3: FTCPE port map (regfil_7_3,regfil_7_3_T,clock,'0','0','1');
regfil_7_3_T <= ((regfil_7_3 AND NOT alures(3) AND N_PZ_1060)
OR (NOT regfil_7_3 AND alures(3) AND N_PZ_1060)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(3).PIN AND regd(2) AND regd(1) AND
regd(0) AND NOT regfil_7_3)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(3).PIN AND regd(2) AND regd(1) AND
regd(0) AND regfil_7_3)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
regfil_7_3 AND NOT holding(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT regfil_7_3 AND holding(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_3 AND NOT regfil_7_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_3 AND regfil_7_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_3 AND NOT regfil_7_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_3 AND regfil_7_2)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND regfil_7_3 AND NOT N_PZ_1373 AND
_COND_18(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT regfil_7_3 AND NOT N_PZ_1373 AND
NOT _COND_18(3)));
FTCPE_regfil_7_4: FTCPE port map (regfil_7_4,regfil_7_4_T,clock,'0','0','1');
regfil_7_4_T <= ((regfil_7_4 AND NOT alures(4) AND N_PZ_1060)
OR (NOT regfil_7_4 AND alures(4) AND N_PZ_1060)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(4).PIN AND regd(2) AND regd(1) AND
regd(0) AND NOT regfil_7_4)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(4).PIN AND regd(2) AND regd(1) AND
regd(0) AND regfil_7_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
holding(4) AND NOT regfil_7_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT holding(4) AND regfil_7_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_4 AND NOT regfil_7_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_4 AND regfil_7_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_3 AND NOT regfil_7_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_3 AND regfil_7_4)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT N_PZ_1373 AND regfil_7_4 AND
_COND_18(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT N_PZ_1373 AND NOT regfil_7_4 AND
NOT _COND_18(4)));
FTCPE_regfil_7_5: FTCPE port map (regfil_7_5,regfil_7_5_T,clock,'0','0','1');
regfil_7_5_T <= ((regfil_7_5 AND NOT alures(5) AND N_PZ_1060)
OR (NOT regfil_7_5 AND alures(5) AND N_PZ_1060)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(5).PIN AND regd(2) AND regd(1) AND
regd(0) AND NOT regfil_7_5)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(5).PIN AND regd(2) AND regd(1) AND
regd(0) AND regfil_7_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
regfil_7_5 AND NOT holding(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT regfil_7_5 AND holding(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_5 AND NOT regfil_7_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_5 AND regfil_7_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_4 AND NOT regfil_7_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_4 AND regfil_7_5)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT N_PZ_1373 AND regfil_7_5 AND
_COND_18(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT N_PZ_1373 AND NOT regfil_7_5 AND
NOT _COND_18(5)));
FTCPE_regfil_7_6: FTCPE port map (regfil_7_6,regfil_7_6_T,clock,'0','0','1');
regfil_7_6_T <= ((regfil_7_6 AND NOT alures(6) AND N_PZ_1060)
OR (NOT regfil_7_6 AND alures(6) AND N_PZ_1060)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(6).PIN AND regd(2) AND regd(1) AND
regd(0) AND NOT regfil_7_6)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(6).PIN AND regd(2) AND regd(1) AND
regd(0) AND regfil_7_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
regfil_7_6 AND NOT holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT regfil_7_6 AND holding(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_6 AND NOT regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_6 AND regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_5 AND NOT regfil_7_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_5 AND regfil_7_6)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT N_PZ_1373 AND regfil_7_6 AND
_COND_18(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT N_PZ_1373 AND NOT regfil_7_6 AND
NOT _COND_18(6)));
FTCPE_regfil_7_7: FTCPE port map (regfil_7_7,regfil_7_7_T,clock,'0','0','1');
regfil_7_7_T <= ((regfil_7_7 AND NOT alures(7) AND N_PZ_1060)
OR (NOT regfil_7_7 AND alures(7) AND N_PZ_1060)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND data(7).PIN AND regd(2) AND regd(1) AND
regd(0) AND NOT regfil_7_7)
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND state(0) AND NOT data(7).PIN AND regd(2) AND regd(1) AND
regd(0) AND regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
regfil_7_7 AND NOT holding(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT regfil_7_7 AND holding(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND data(3).PIN AND
data(2).PIN AND data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND regfil_7_0 AND NOT regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(4).PIN AND data(3).PIN AND
data(2).PIN AND data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT regfil_7_0 AND regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND regfil_7_6 AND NOT regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regfil_7_6 AND regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND _COND_18(7) AND NOT N_PZ_1373 AND
regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND regd(2) AND
NOT _cmp_eq0004 AND regd(1) AND regd(0) AND NOT _COND_18(7) AND NOT N_PZ_1373 AND
NOT regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
data(2).PIN AND data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND carry AND NOT regfil_7_7)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
data(2).PIN AND data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND NOT data(5).PIN AND NOT carry AND regfil_7_7));
FTCPE_regs0: FTCPE port map (regs(0),regs_T(0),clock,'0','0','1');
regs_T(0) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(0).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT regs(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(0).PIN AND NOT data(6).PIN AND
data(7).PIN AND NOT regs(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(0).PIN AND NOT data(6).PIN AND
data(7).PIN AND regs(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(0).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT _cmp_eq0004 AND regs(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
data(5).PIN AND regs(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT N_PZ_1819 AND NOT regs(0)));
FTCPE_regs1: FTCPE port map (regs(1),regs_T(1),clock,'0','0','1');
regs_T(1) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(1).PIN AND NOT data(6).PIN AND
data(7).PIN AND NOT regs(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(1).PIN AND NOT data(6).PIN AND
data(7).PIN AND regs(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(1).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT _cmp_eq0004 AND NOT regs(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(1).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT _cmp_eq0004 AND regs(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND data(5).PIN AND
NOT regs(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(5).PIN AND
NOT regs(1)));
FTCPE_regs2: FTCPE port map (regs(2),regs_T(2),clock,'0','0','1');
regs_T(2) <= ((NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND NOT data(6).PIN AND
data(7).PIN AND NOT regs(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND NOT data(6).PIN AND
data(7).PIN AND regs(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(2).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT _cmp_eq0004 AND NOT regs(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND data(6).PIN AND
NOT data(7).PIN AND NOT _cmp_eq0004 AND regs(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT regs(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT regs(2)));
FDCPE_sign: FDCPE port map (sign,sign_D,clock,'0','0','1');
sign_D <= ((N_PZ_1894 AND alures(7))
OR (NOT N_PZ_1894 AND sign));
FTCPE_sp0: FTCPE port map (sp(0),sp_T(0),clock,'0','0','1');
sp_T(0) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(0) AND NOT sp(0))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(0) AND sp(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND regfil_5_0 AND NOT sp(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT regfil_5_0 AND sp(0)));
FTCPE_sp1: FTCPE port map (sp(1),sp_T(1),clock,'0','0','1');
sp_T(1) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(1) AND NOT sp(1))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(1) AND sp(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND regfil_5_1 AND NOT sp(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT regfil_5_1 AND sp(1)));
FTCPE_sp2: FTCPE port map (sp(2),sp_T(2),clock,'0','0','1');
sp_T(2) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(2) AND NOT sp(2))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(2) AND sp(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(0) AND sp(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND regfil_5_2 AND NOT sp(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT regfil_5_2 AND sp(2)));
FTCPE_sp3: FTCPE port map (sp(3),sp_T(3),clock,'0','0','1');
sp_T(3) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(3) AND NOT sp(3))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(3) AND sp(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND regfil_5_3 AND NOT sp(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT regfil_5_3 AND sp(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1)));
FTCPE_sp4: FTCPE port map (sp(4),sp_T(4),clock,'0','0','1');
sp_T(4) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(4) AND NOT sp(4))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(4) AND sp(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND N_PZ_2168)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(3)));
FTCPE_sp5: FTCPE port map (sp(5),sp_T(5),clock,'0','0','1');
sp_T(5) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(5) AND NOT sp(5))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(5) AND sp(5))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT N_PZ_1981)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(3) AND sp(4)));
FTCPE_sp6: FTCPE port map (sp(6),sp_T(6),clock,'0','0','1');
sp_T(6) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(6) AND NOT sp(6))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(6) AND sp(6))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND N_PZ_2169)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4)));
FTCPE_sp7: FTCPE port map (sp(7),sp_T(7),clock,'0','0','1');
sp_T(7) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(7) AND NOT sp(7))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(7) AND sp(7))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT N_PZ_1982)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4) AND
sp(6)));
FTCPE_sp8: FTCPE port map (sp(8),sp_T(8),clock,'0','0','1');
sp_T(8) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(8) AND NOT sp(8))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(8) AND sp(8))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND regfil_4_0 AND NOT sp(8))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT regfil_4_0 AND sp(8))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4) AND
sp(6) AND sp(7)));
FTCPE_sp9: FTCPE port map (sp(9),sp_T(9),clock,'0','0','1');
sp_T(9) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(9) AND NOT sp(9))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(9) AND sp(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND regfil_4_1 AND NOT sp(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT regfil_4_1 AND sp(9))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4) AND
sp(6) AND sp(7) AND sp(8)));
FTCPE_sp10: FTCPE port map (sp(10),sp_T(10),clock,'0','0','1');
sp_T(10) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(10) AND NOT sp(10))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(10) AND sp(10))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND regfil_4_2 AND NOT sp(10))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT regfil_4_2 AND sp(10))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4) AND
sp(6) AND sp(7) AND sp(8) AND sp(9)));
FTCPE_sp11: FTCPE port map (sp(11),sp_T(11),clock,'0','0','1');
sp_T(11) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(11) AND NOT sp(11))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(11) AND sp(11))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND regfil_4_3 AND NOT sp(11))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT regfil_4_3 AND sp(11))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4) AND
sp(6) AND sp(10) AND sp(7) AND sp(8) AND sp(9)));
FTCPE_sp12: FTCPE port map (sp(12),sp_T(12),clock,'0','0','1');
sp_T(12) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(12) AND NOT sp(12))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(12) AND sp(12))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT N_PZ_1929)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4) AND
sp(6) AND sp(11) AND sp(10) AND sp(7) AND sp(8) AND sp(9)));
FTCPE_sp13: FTCPE port map (sp(13),sp_T(13),clock,'0','0','1');
sp_T(13) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(13) AND NOT sp(13))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(13) AND sp(13))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT N_PZ_1848)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4) AND
sp(6) AND sp(11) AND sp(10) AND sp(7) AND sp(8) AND sp(9) AND
sp(12)));
FTCPE_sp14: FTCPE port map (sp(14),sp_T(14),clock,'0','0','1');
sp_T(14) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND addrhold(14) AND NOT sp(14))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT addrhold(14) AND sp(14))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND N_PZ_2105)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4) AND
sp(6) AND sp(11) AND sp(10) AND sp(7) AND sp(8) AND sp(9) AND
sp(12) AND sp(13)));
FTCPE_sp15: FTCPE port map (sp(15),sp_T(15),clock,'0','0','1');
sp_T(15) <= ((NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND sp(15) AND NOT addrhold(15))
OR (NOT reset AND NOT state(3) AND state(2) AND state(4) AND
NOT state(1) AND state(0) AND NOT sp(15) AND addrhold(15))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND data(6).PIN AND
data(7).PIN AND data(5).PIN AND NOT N_PZ_1849)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND sp(2) AND sp(0) AND sp(1) AND sp(5) AND sp(3) AND sp(4) AND
sp(6) AND sp(11) AND sp(10) AND sp(7) AND sp(8) AND sp(9) AND
sp(12) AND sp(13) AND sp(14)));
FTCPE_state0: FTCPE port map (state(0),state_T(0),clock,'0','0','1');
state_T(0) <= ((N_PZ_1065)
OR (reset AND NOT state(0))
OR (NOT reset AND state(2) AND state(1))
OR (state(3) AND state(1) AND NOT N_PZ_1209)
OR (NOT state(3) AND NOT state(0) AND NOT N_PZ_1209)
OR (NOT state(2) AND NOT state(0) AND NOT N_PZ_1209)
OR (NOT reset AND NOT state(1) AND NOT statehold(0) AND N_PZ_1209)
OR (state(3) AND state(2) AND state(4) AND NOT N_PZ_1209)
OR (NOT state(0) AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1209)
OR (NOT state(0) AND NOT data(7).PIN AND N_PZ_1209 AND NOT N_PZ_1921)
OR (NOT state(0) AND data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND N_PZ_1209)
OR (NOT state(3) AND NOT state(4) AND NOT state(1) AND NOT N_PZ_1209 AND
regd(2) AND regd(1) AND NOT regd(0))
OR (NOT state(0) AND data(2).PIN AND data(1).PIN AND
data(0).PIN AND data(6).PIN AND data(7).PIN AND N_PZ_1209)
OR (NOT state(0) AND data(1).PIN AND data(6).PIN AND
data(7).PIN AND N_PZ_1209 AND N_PZ_1916 AND NOT parity)
OR (NOT state(0) AND data(4).PIN AND data(1).PIN AND
data(0).PIN AND data(6).PIN AND data(7).PIN AND data(5).PIN AND
N_PZ_1209)
OR (NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
data(0).PIN AND data(6).PIN AND data(7).PIN AND data(5).PIN AND
N_PZ_1209)
OR (NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(7).PIN AND
data(5).PIN AND N_PZ_1209)
OR (NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND data(1).PIN AND data(6).PIN AND data(7).PIN AND
data(5).PIN AND N_PZ_1209 AND NOT sign)
OR (NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
NOT data(2).PIN AND data(1).PIN AND data(6).PIN AND data(7).PIN AND
data(5).PIN AND N_PZ_1209 AND sign)
OR (NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND data(6).PIN AND data(7).PIN AND
N_PZ_1209 AND N_PZ_1819 AND parity)
OR (NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND data(6).PIN AND
data(7).PIN AND NOT data(5).PIN AND N_PZ_1209 AND NOT carry)
OR (NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
NOT data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND data(6).PIN AND
data(7).PIN AND NOT data(5).PIN AND N_PZ_1209 AND carry)
OR (NOT state(0) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND data(6).PIN AND
data(7).PIN AND NOT data(5).PIN AND N_PZ_1209 AND NOT zero)
OR (NOT state(0) AND NOT data(4).PIN AND NOT data(3).PIN AND
NOT data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND data(6).PIN AND
data(7).PIN AND NOT data(5).PIN AND N_PZ_1209 AND zero));
FDCPE_state1: FDCPE port map (state(1),state_D(1),clock,'0','0','1');
state_D(1) <= ((state(1) AND N_PZ_1066)
OR (NOT reset AND NOT state(1) AND N_PZ_1209 AND statehold(1))
OR (NOT reset AND NOT state(0) AND NOT data(6).PIN AND data(7).PIN AND
N_PZ_1209)
OR (state(3) AND state(2) AND NOT state(4) AND NOT state(0) AND
NOT N_PZ_1209)
OR (NOT state(3) AND NOT state(2) AND NOT state(4) AND state(0) AND
NOT N_PZ_1209)
OR (NOT reset AND NOT state(0) AND NOT data(3).PIN AND NOT data(1).PIN AND
data(7).PIN AND N_PZ_1209)
OR (NOT reset AND NOT state(0) AND data(2).PIN AND NOT data(1).PIN AND
data(7).PIN AND N_PZ_1209)
OR (NOT reset AND NOT state(0) AND data(2).PIN AND NOT data(0).PIN AND
data(7).PIN AND N_PZ_1209)
OR (NOT reset AND NOT state(0) AND NOT data(1).PIN AND NOT data(0).PIN AND
data(7).PIN AND N_PZ_1209)
OR (state(3) AND state(2) AND state(4) AND NOT state(1) AND
state(0) AND NOT N_PZ_1209)
OR (NOT reset AND NOT state(0) AND NOT data(2).PIN AND data(0).PIN AND
data(7).PIN AND NOT data(5).PIN AND N_PZ_1209)
OR (NOT reset AND NOT state(0) AND NOT data(4).PIN AND NOT data(3).PIN AND
NOT data(2).PIN AND data(0).PIN AND data(7).PIN AND N_PZ_1209)
OR (NOT reset AND NOT state(0) AND data(3).PIN AND NOT data(0).PIN AND
data(7).PIN AND N_PZ_1209 AND N_PZ_1819 AND parity)
OR (NOT reset AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
data(7).PIN AND N_PZ_1209 AND N_PZ_1819 AND NOT parity)
OR (NOT state(3) AND NOT state(4) AND NOT state(1) AND state(0) AND
NOT N_PZ_1209 AND regd(2) AND regd(1) AND NOT regd(0))
OR (NOT reset AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(0).PIN AND data(7).PIN AND data(5).PIN AND N_PZ_1209 AND sign)
OR (NOT reset AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(0).PIN AND data(7).PIN AND NOT data(5).PIN AND N_PZ_1209 AND carry)
OR (NOT reset AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
NOT data(0).PIN AND data(7).PIN AND data(5).PIN AND N_PZ_1209 AND NOT sign)
OR (NOT reset AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
NOT data(0).PIN AND data(7).PIN AND NOT data(5).PIN AND N_PZ_1209 AND NOT carry)
OR (NOT reset AND NOT state(0) AND NOT data(4).PIN AND data(3).PIN AND
NOT data(0).PIN AND data(7).PIN AND NOT data(5).PIN AND N_PZ_1209 AND zero)
OR (NOT reset AND NOT state(0) AND NOT data(4).PIN AND NOT data(3).PIN AND
NOT data(0).PIN AND data(7).PIN AND NOT data(5).PIN AND N_PZ_1209 AND NOT zero)
OR (NOT reset AND NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND
N_PZ_1209 AND regd(2) AND regd(1) AND NOT regd(0) AND NOT N_PZ_1373)
OR (NOT reset AND NOT state(0) AND data(4).PIN AND NOT data(3).PIN AND
data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND data(6).PIN AND
data(5).PIN AND N_PZ_1209));
FDCPE_state2: FDCPE port map (state(2),state_D(2),clock,'0','0','1');
state_D(2) <= ((NOT reset AND state(2) AND state(1) AND NOT state(0))
OR (NOT reset AND state(3) AND state(2) AND state(4) AND
NOT state(1))
OR (NOT reset AND state(3) AND NOT state(2) AND state(1) AND
state(0))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(0))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND state(4) AND
NOT state(1) AND state(0) AND statehold(2))
OR (NOT reset AND NOT state(3) AND state(2) AND NOT state(4) AND
NOT state(1) AND regd(2) AND regd(1) AND NOT regd(0))
OR (NOT reset AND NOT state(3) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(1).PIN AND data(6).PIN AND N_PZ_1966)
OR (NOT reset AND NOT state(3) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(6).PIN AND NOT data(7).PIN AND NOT _cmp_eq0004 AND
N_PZ_1921));
FTCPE_state3: FTCPE port map (state(3),state_T(3),clock,'0','0','1');
state_T(3) <= ((N_PZ_1894)
OR (reset AND state(3))
OR (NOT reset AND state(2) AND state(1) AND state(0))
OR (state(3) AND NOT state(2) AND NOT state(1) AND state(0))
OR (NOT reset AND NOT state(2) AND NOT state(1) AND state(0) AND
NOT N_PZ_1065 AND statehold(3))
OR (NOT reset AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND data(1).PIN AND N_PZ_1966)
OR (NOT reset AND NOT state(2) AND NOT state(4) AND state(1) AND
NOT state(0) AND NOT data(6).PIN AND data(7).PIN));
FTCPE_state4: FTCPE port map (state(4),state_T(4),clock,'0','0','1');
state_T(4) <= ((reset AND state(4))
OR (NOT state(3) AND state(2) AND state(4) AND NOT state(1))
OR (NOT state(3) AND NOT state(2) AND state(4) AND state(1))
OR (NOT reset AND state(3) AND state(2) AND state(1) AND
state(0))
OR (state(3) AND NOT state(2) AND state(4) AND NOT state(1) AND
state(0))
OR (NOT state(2) AND state(4) AND NOT state(1) AND state(0) AND
NOT statehold(4)));
FTCPE_statehold0: FTCPE port map (statehold(0),statehold_T(0),clock,'0','0','1');
statehold_T(0) <= ((statehold(0) AND N_PZ_2232)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND statehold(0) AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND statehold(0) AND NOT data(4).PIN AND
NOT data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN)
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT statehold(0) AND data(4).PIN AND
NOT data(3).PIN AND NOT data(2).PIN AND NOT data(1).PIN AND data(0).PIN AND
NOT data(6).PIN AND NOT data(7).PIN));
FTCPE_statehold1: FTCPE port map (statehold(1),statehold_T(1),clock,'0','0','1');
statehold_T(1) <= ((N_PZ_2232 AND NOT statehold(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT statehold(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT statehold(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND statehold(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND NOT statehold(1))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND data(3).PIN AND
NOT data(2).PIN AND data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND
NOT data(7).PIN AND data(5).PIN AND statehold(1)));
FTCPE_statehold2: FTCPE port map (statehold(2),statehold_T(2),clock,'0','0','1');
statehold_T(2) <= ((N_PZ_2232 AND statehold(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT statehold(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT statehold(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND statehold(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND NOT statehold(2))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT data(5).PIN AND statehold(2)));
FTCPE_statehold3: FTCPE port map (statehold(3),statehold_T(3),clock,'0','0','1');
statehold_T(3) <= ((N_PZ_2232 AND statehold(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
statehold(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND statehold(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND statehold(3))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
N_PZ_1819 AND NOT statehold(3)));
FTCPE_statehold4: FTCPE port map (statehold(4),statehold_T(4),clock,'0','0','1');
statehold_T(4) <= ((N_PZ_2232 AND statehold(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(3).PIN AND NOT data(2).PIN AND
NOT data(1).PIN AND data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
NOT statehold(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND NOT data(2).PIN AND data(1).PIN AND
NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND N_PZ_1819 AND
NOT statehold(4))
OR (NOT reset AND NOT state(3) AND NOT state(2) AND NOT state(4) AND
state(1) AND NOT state(0) AND data(4).PIN AND NOT data(2).PIN AND
data(1).PIN AND NOT data(0).PIN AND NOT data(6).PIN AND NOT data(7).PIN AND
data(5).PIN AND statehold(4)));
FDCPE_zero: FDCPE port map (zero,zero_D,clock,'0','0','1');
zero_D <= ((N_PZ_1894 AND aluzout)
OR (NOT N_PZ_1894 AND zero));
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE);
FDDCPE (Q,D,C,CLR,PRE,CE);
FTCPE (Q,D,C,CLR,PRE,CE);
FTDCPE (Q,D,C,CLR,PRE,CE);
LDCP (Q,D,G,CLR,PRE);
**************************** Compiler Options ****************************
Following is a list of all global compiler options used by the fitter run.
Device(s) Specified : xc2c512-7-PQ208
Optimization Method : DENSITY
Multi-Level Logic Optimization : ON
Ignore Timing Specifications : OFF
Default Register Power Up Value : LOW
Keep User Location Constraints : ON
What-You-See-Is-What-You-Get : OFF
Exhaustive Fitting : OFF
Keep Unused Inputs : OFF
Slew Rate : FAST
Set Unused I/O Pin Termination : KEEPER
Global Clock Optimization : ON
Global Set/Reset Optimization : ON
Global Ouput Enable Optimization : ON
Enable Input Registers : ON
Function Block Fan-in Limit : 38
Use DATA_GATE Attribute : ON
Set Tristate Outputs to Termination Mode : KEEPER
Default Voltage Standard for All Outputs : LVCMOS18
Input Limit : 32
Pterm Limit : 28
</pre>
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