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[/] [cpu8080/] [trunk/] [project/] [cpu8080_tbw.ant] - Rev 30
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////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2003 Xilinx, Inc.
// All Right Reserved.
////////////////////////////////////////////////////////////////////////////////
// ____ ____
// / /\/ /
// /___/ \ / Vendor: Xilinx
// \ \ \/ Version : 8.2.02i
// \ \ Application : ISE
// / / Filename : cpu8080_tbw.ant
// /___/ /\ Timestamp : Sat Nov 18 22:47:07 2006
// \ \ / \
// \___\/\___\
//
//Command:
//Design Name: cpu8080_tbw
//Device: Xilinx
//
`timescale 1ns/1ps
module cpu8080_tbw;
wire [15:0] addr;
reg [7:0] data$inout$reg = 8'b00000000;
wire [7:0] data = data$inout$reg;
wire readmem;
wire writemem;
wire readio;
wire writeio;
wire intr;
wire inta;
wire waitr;
wire [2:0] r;
wire [2:0] g;
wire [2:0] b;
wire hsync_n;
wire vsync_n;
reg ps2_clk = 1'b0;
reg ps2_data = 1'b0;
reg reset_n = 1'b0;
reg clock = 1'b0;
wire [7:0] diag;
parameter PERIOD = 40;
parameter real DUTY_CYCLE = 0.5;
parameter OFFSET = 100;
initial // Clock process for clock
begin
#OFFSET;
forever
begin
clock = 1'b0;
#(PERIOD-(PERIOD*DUTY_CYCLE)) clock = 1'b1;
#(PERIOD*DUTY_CYCLE);
end
end
testbench UUT (
.addr(addr),
.data(data),
.readmem(readmem),
.writemem(writemem),
.readio(readio),
.writeio(writeio),
.intr(intr),
.inta(inta),
.waitr(waitr),
.r(r),
.g(g),
.b(b),
.hsync_n(hsync_n),
.vsync_n(vsync_n),
.ps2_clk(ps2_clk),
.ps2_data(ps2_data),
.reset_n(reset_n),
.clock(clock),
.diag(diag));
integer TX_FILE = 0;
integer TX_ERROR = 0;
initial begin // Annotation process for clock clock
#0;
ANNOTATE_addr;
ANNOTATE_readmem;
ANNOTATE_writemem;
ANNOTATE_readio;
ANNOTATE_writeio;
ANNOTATE_intr;
ANNOTATE_inta;
ANNOTATE_waitr;
ANNOTATE_r;
ANNOTATE_g;
ANNOTATE_b;
ANNOTATE_hsync_n;
ANNOTATE_vsync_n;
ANNOTATE_diag;
#OFFSET;
forever begin
#30;
ANNOTATE_addr;
ANNOTATE_readmem;
ANNOTATE_writemem;
ANNOTATE_readio;
ANNOTATE_writeio;
ANNOTATE_intr;
ANNOTATE_inta;
ANNOTATE_waitr;
ANNOTATE_r;
ANNOTATE_g;
ANNOTATE_b;
ANNOTATE_hsync_n;
ANNOTATE_vsync_n;
ANNOTATE_diag;
#10;
end
end
initial begin // Open the annotations file...
TX_FILE = $fopen("C:\\Xilinx\\ISEexamples\\cpu8080\\cpu8080_tbw.ano");
#200040 // Final time: 200040 ns
$display("Success! Annotation Simulation Complete.");
$fdisplay(TX_FILE, "Total[%d]", TX_ERROR);
$fclose(TX_FILE);
$finish;
end
initial begin
// ------------- Current Time: 110ns
#110;
ps2_clk = 1'b1;
ps2_data = 1'b1;
reset_n = 1'b0;
reset_n = 1'b1;
// -------------------------------------
// ------------- Current Time: 390ns
#280;
ps2_data = 1'b0;
// -------------------------------------
// ------------- Current Time: 510ns
#120;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 590ns
#80;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 670ns
#80;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 830ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 990ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 1150ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 1310ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 1470ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 1630ns
#160;
ps2_clk = 1'b1;
ps2_data = 1'b0;
// -------------------------------------
// ------------- Current Time: 1790ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 1950ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 1990ns
#40;
ps2_data = 1'b1;
// -------------------------------------
// ------------- Current Time: 2110ns
#120;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 2270ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 2430ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 2590ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 2750ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 2910ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 3070ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 3230ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 3310ns
#80;
ps2_data = 1'b0;
// -------------------------------------
// ------------- Current Time: 3390ns
#80;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 3550ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 3590ns
#40;
ps2_data = 1'b1;
// -------------------------------------
// ------------- Current Time: 3710ns
#120;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 3870ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 5910ns
#2040;
ps2_data = 1'b0;
// -------------------------------------
// ------------- Current Time: 6070ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 6230ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 6390ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 6550ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 6630ns
#80;
ps2_data = 1'b1;
// -------------------------------------
// ------------- Current Time: 6710ns
#80;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 6870ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 6910ns
#40;
ps2_data = 1'b0;
// -------------------------------------
// ------------- Current Time: 7030ns
#120;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 7190ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 7350ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 7510ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 7550ns
#40;
ps2_data = 1'b1;
// -------------------------------------
// ------------- Current Time: 7670ns
#120;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 7830ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 7910ns
#80;
ps2_data = 1'b0;
// -------------------------------------
// ------------- Current Time: 7990ns
#80;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 8150ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 8310ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 8470ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 8630ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 8790ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 8950ns
#160;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 9110ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
// ------------- Current Time: 9190ns
#80;
ps2_data = 1'b1;
// -------------------------------------
// ------------- Current Time: 9270ns
#80;
ps2_clk = 1'b0;
// -------------------------------------
// ------------- Current Time: 9430ns
#160;
ps2_clk = 1'b1;
// -------------------------------------
end
task ANNOTATE_addr;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,addr,%b]", $time, addr);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_readmem;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,readmem,%b]", $time, readmem);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_writemem;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,writemem,%b]", $time, writemem);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_readio;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,readio,%b]", $time, readio);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_writeio;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,writeio,%b]", $time, writeio);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_intr;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,intr,%b]", $time, intr);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_inta;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,inta,%b]", $time, inta);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_waitr;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,waitr,%b]", $time, waitr);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_r;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,r,%b]", $time, r);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_g;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,g,%b]", $time, g);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_b;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,b,%b]", $time, b);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_hsync_n;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,hsync_n,%b]", $time, hsync_n);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_vsync_n;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,vsync_n,%b]", $time, vsync_n);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
task ANNOTATE_diag;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,diag,%b]", $time, diag);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
endmodule
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