Subversion Repositories cpu8080

////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2003 Xilinx, Inc.
// All Right Reserved.
////////////////////////////////////////////////////////////////////////////////
//   ____  ____ 
//  /   /\/   / 
// /___/  \  /    Vendor: Xilinx 
// \   \   \/     Version : 8.2.02i
//  \   \         Application : ISE
//  /   /         Filename : cpu_tbw.tfw
// /___/   /\     Timestamp : Sat Oct 28 09:12:59 2006
// \   \  /  \ 
//  \___\/\___\ 
//
//Command: 
//Design Name: cpu_tbw
//Device: Xilinx
//
`timescale 1ns/1ps

module cpu_tbw;
    wire [15:0] addr;
    reg [7:0] data$inout$reg = 8'bZ1Z00000;
    wire [7:0] data = data$inout$reg;
    wire readmem;
    wire writemem;
    wire readio;
    wire writeio;
    wire intr;
    wire inta;
    reg waitr = 1'b0;
    wire [2:0] r;
    wire [2:0] g;
    wire [2:0] b;
    wire hsync_n;
    wire vsync_n;
    reg reset = 1'b0;
    reg clock = 1'b0;

    parameter PERIOD = 200;
    parameter real DUTY_CYCLE = 0.5;
    parameter OFFSET = 0;

    initial    // Clock process for clock
    begin
        #OFFSET;
        forever
        begin
            clock = 1'b0;
            #(PERIOD-(PERIOD*DUTY_CYCLE)) clock = 1'b1;
            #(PERIOD*DUTY_CYCLE);
        end
    end

    testbench UUT (
        .addr(addr),
        .data(data),
        .readmem(readmem),
        .writemem(writemem),
        .readio(readio),
        .writeio(writeio),
        .intr(intr),
        .inta(inta),
        .waitr(waitr),
        .r(r),
        .g(g),
        .b(b),
        .hsync_n(hsync_n),
        .vsync_n(vsync_n),
        .reset(reset),
        .clock(clock));

        integer TX_ERROR = 0;
        
        initial begin  // Open the results file...
            #100200 // Final time:  100200 ns
            if (TX_ERROR == 0) begin
                $display("No errors or warnings.");
                end else begin
                    $display("%d errors found in simulation.", TX_ERROR);
                    end
                    $stop;
                end

                initial begin
                    // -------------  Current Time:  85ns
                    #85;
                    reset = 1'b1;
                    data$inout$reg = 8'bZZZZZZZZ;
                    // -------------------------------------
                    // -------------  Current Time:  485ns
                    #400;
                    reset = 1'b0;
                    // -------------------------------------
                end

                task CHECK_addr;
                    input [15:0] NEXT_addr;

                    #0 begin
                        if (NEXT_addr !== addr) begin
                            $display("Error at time=%dns addr=%b, expected=%b", $time, addr, NEXT_addr);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_readmem;
                    input NEXT_readmem;

                    #0 begin
                        if (NEXT_readmem !== readmem) begin
                            $display("Error at time=%dns readmem=%b, expected=%b", $time, readmem, NEXT_readmem);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_writemem;
                    input NEXT_writemem;

                    #0 begin
                        if (NEXT_writemem !== writemem) begin
                            $display("Error at time=%dns writemem=%b, expected=%b", $time, writemem, NEXT_writemem);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_readio;
                    input NEXT_readio;

                    #0 begin
                        if (NEXT_readio !== readio) begin
                            $display("Error at time=%dns readio=%b, expected=%b", $time, readio, NEXT_readio);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_writeio;
                    input NEXT_writeio;

                    #0 begin
                        if (NEXT_writeio !== writeio) begin
                            $display("Error at time=%dns writeio=%b, expected=%b", $time, writeio, NEXT_writeio);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_intr;
                    input NEXT_intr;

                    #0 begin
                        if (NEXT_intr !== intr) begin
                            $display("Error at time=%dns intr=%b, expected=%b", $time, intr, NEXT_intr);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_inta;
                    input NEXT_inta;

                    #0 begin
                        if (NEXT_inta !== inta) begin
                            $display("Error at time=%dns inta=%b, expected=%b", $time, inta, NEXT_inta);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_r;
                    input [2:0] NEXT_r;

                    #0 begin
                        if (NEXT_r !== r) begin
                            $display("Error at time=%dns r=%b, expected=%b", $time, r, NEXT_r);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_g;
                    input [2:0] NEXT_g;

                    #0 begin
                        if (NEXT_g !== g) begin
                            $display("Error at time=%dns g=%b, expected=%b", $time, g, NEXT_g);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_b;
                    input [2:0] NEXT_b;

                    #0 begin
                        if (NEXT_b !== b) begin
                            $display("Error at time=%dns b=%b, expected=%b", $time, b, NEXT_b);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_hsync_n;
                    input NEXT_hsync_n;

                    #0 begin
                        if (NEXT_hsync_n !== hsync_n) begin
                            $display("Error at time=%dns hsync_n=%b, expected=%b", $time, hsync_n, NEXT_hsync_n);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask
                task CHECK_vsync_n;
                    input NEXT_vsync_n;

                    #0 begin
                        if (NEXT_vsync_n !== vsync_n) begin
                            $display("Error at time=%dns vsync_n=%b, expected=%b", $time, vsync_n, NEXT_vsync_n);
                            TX_ERROR = TX_ERROR + 1;
                        end
                    end
                endtask

            endmodule