Subversion Repositories cpu8080

V3 23
FL $XILINX/ISEexamples/cpu8080/cpu8080.v 2006/10/20.22:31:24 I.33
MO work/cpu8080         FL $XILINX/ISEexamples/cpu8080/cpu8080.v MI alu
MO work/alu             FL $XILINX/ISEexamples/cpu8080/cpu8080.v
FL test.lst 2006/10/20.22:03:36 I.33
FL $XILINX/ISEexamples/cpu8080/testbench.v 2006/10/20.22:07:46 I.33 FL test.lst
MO work/testbench       FL $XILINX/ISEexamples/cpu8080/testbench.v MI cpu8080 \
      MI intcontrol     MI ram            MI rom            MI select
MO work/select          FL $XILINX/ISEexamples/cpu8080/testbench.v MI selectone
MO work/selectone       FL $XILINX/ISEexamples/cpu8080/testbench.v
MO work/intcontrol      FL $XILINX/ISEexamples/cpu8080/testbench.v
MO work/rom             FL $XILINX/ISEexamples/cpu8080/testbench.v
MO work/ram             FL $XILINX/ISEexamples/cpu8080/testbench.v
FL $XILINX/verilog/src/glbl.v 2006/05/17.11:09:08 I.33
MO work/glbl            FL $XILINX/verilog/src/glbl.v
FL $XILINX/ISEexamples/cpu8080/cpu_tbw.tfw 2006/10/20.21:19:58 I.33
MO work/cpu_tbw         FL $XILINX/ISEexamples/cpu8080/cpu_tbw.tfw MI testbench