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https://opencores.org/ocsvn/cpu8080/cpu8080/trunk
Subversion Repositories cpu8080
[/] [cpu8080/] [trunk/] [project/] [junk] - Rev 18
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test Page 1Program Variable Code C Line Source-----------------------------------------------------------------------------------------------------------------------------------00000000 00000000 1 !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!00000000 00000000 2 !00000000 00000000 3 ! Code for the test bench. This gets dumped and placed into testbench.v as byte00000000 00000000 4 ! definitions.00000000 00000000 5 !00000000 00000000 600000000 00000000 7 !00000000 00000000 8 ! Select controller defines00000000 00000000 9 !00000000 00000000 10 selmain: equ $00 ! offset of main control register00000000 00000000 11 sel1msk: equ $02 ! offset of select 1 mask00000000 00000000 12 sel1cmp: equ $03 ! offset of select 1 compare00000000 00000000 13 sel2msk: equ $04 ! offset of select 1 mask00000000 00000000 14 sel2cmp: equ $05 ! offset of select 1 compare00000000 00000000 15 sel3msk: equ $06 ! offset of select 1 mask00000000 00000000 16 sel3cmp: equ $07 ! offset of select 1 compare00000000 00000000 17 sel4msk: equ $08 ! offset of select 1 mask00000000 00000000 18 sel4cmp: equ $09 ! offset of select 1 compare00000000 00000000 19 !00000000 00000000 20 ! bits00000000 00000000 21 !00000000 00000000 22 selenb: equ $01 ! enable select00000000 00000000 23 selio: equ $02 ! I/O address or memory00000000 00000000 2400000000 00000000 25 !00000000 00000000 26 ! Note: select 1 is ROM, 2, is RAM, 3 is interrupt controller, 4 is serial I/O.00000000 00000000 27 !00000000 00000000 2800000000 00000000 29 !00000000 00000000 30 ! Where to place ROM and RAM for this test00000000 00000000 31 !00000000 00000000 32 rombas: equ $000000000000 00000000 33 rambas: equ rombas+102400000000 00000000 34 !00000000 00000000 35 ! Interrupt controller defines00000000 00000000 36 !00000000 00000000 37 intbas: equ $1000000000 00000000 38 intmsk: equ intbas+$00 ! mask00000000 00000000 39 intsts: equ intbas+$01 ! status00000000 00000000 40 intact: equ intbas+$02 ! active interrupt00000000 00000000 41 intpol: equ intbas+$03 ! polarity select00000000 00000000 42 intedg: equ intbas+$04 ! edge/level select00000000 00000000 43 intvec: equ intbas+$05 ! vector base page00000000 00000000 44 !00000000 00000000 45 ! Mits Serial I/O card00000000 00000000 46 !00000000 00000000 47 siobas: equ $2000000000 00000000 48 sioctl: equ siobas+$00 ! control register00000000 00000000 49 siodat: equ siobas+$01 ! data00000000 00000000 5000000000 00000000 51 !00000000 00000000 52 ! Set up selectors00000000 00000000 53 !00000000 00000000 5400000000 00000000 55 !00000000 00000000 56 ! ROM00000000 00000000 57 !00000000 00000000 3E 00 58 mvi a,rombas shr 8 ! enable select 1 to 1kb at base00000002 00000000 D3 03 59 out sel1cmp00000004 00000000 3E FD 60 mvi a,($fc00 shr 8) or selenb00000006 00000000 D3 02 61 out sel1msk00000008 00000000 62 !00000008 00000000 63 ! RAM00000008 00000000 64 !00000008 00000000 3E 04 65 mvi a,rambas shr 8 ! enable select 2 to 1kb at base0000000A 00000000 D3 05 66 out sel2cmp0000000C 00000000 3E FD 67 mvi a,($fc00 shr 8) or selenb0000000E 00000000 D3 04 68 out sel2msk00000010 00000000 69 !00000010 00000000 70 ! ROM and RAM set up, exit bootstrap mode00000010 00000000 71 !00000010 00000000 3E 00 72 mvi a,$00 ! exit bootstrap mode00000012 00000000 D3 00 73 out selmain00000014 00000000 74 !00000014 00000000 31 00 08 75 lxi sp,rambas+1024 ! set stack to top of ram00000017 00000000 76 !00000017 00000000 77 ! Serial I/O00000017 00000000 78 !00000017 00000000 3E 20 79 mvi a,siobas ! enable interrupt controller for 4 addresses00000019 00000000 D3 09 80 out sel4cmp0000001B 00000000 3E FF 81 mvi a,$fc or selio or selenb0000001D 00000000 D3 08 82 out sel4msk0000001F 00000000 83 !0000001F 00000000 84 ! Print "hello, world" and stop0000001F 00000000 85 !0000001F 00000000 21 00 00 86 lxi h,helstr ! index stringtest Page 2Program Variable Code C Line Source-----------------------------------------------------------------------------------------------------------------------------------00000022 00000000 87 loop:00000022 00000000 7E 88 mov a,m ! get character00000023 00000000 23 89 inx h ! next character00000024 00000000 B7 90 ora a ! check end of string00000025 00000000 CA 00 00 91 jz endstr ! yes, skip00000028 00000000 CD 00 00 92 call wrtout ! output character0000002B 00000000 C3 22 00 93 jmp loop ! loop next character0000002E 00000000 94 endstr:0000002E 00000000 95 !0000002E 00000000 96 ! Copy characters from input to output0000002E 00000000 97 !0000002E 00000000 98 echo:0000002E 00000000 DB 20 99 in sioctl ! check character waiting00000030 00000000 E6 20 100 ani $2000000032 00000000 CA 2E 00 101 jz echo ! no, wait00000035 00000000 DB 21 102 in siodat ! yes, get character00000037 00000000 CD 00 00 103 call wrtout ! output0000003A 00000000 C3 2E 00 104 jmp echo ! loop forever0000003D 00000000 1050000003D 00000000 106 !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!0000003D 00000000 107 !0000003D 00000000 108 ! Serial output routine0000003D 00000000 109 !0000003D 00000000 110 ! Outputs the character in a.0000003D 00000000 111 !0000003D 00000000 112 wrtout:0000003D 00000000 F5 113 push psw ! save character to output0000003E 00000000 114 wrtout01:0000003E 00000000 DB 20 115 in sioctl ! get output ready status /n00000040 00000000 E6 80 116 ani $80 ! mask00000042 00000000 C2 3E 00 117 jnz wrtout01 ! no, loop00000045 00000000 F1 118 pop psw ! restore character00000046 00000000 D3 21 119 out siodat ! output00000048 00000000 C9 120 ret ! return to caller00000049 00000000 121 !00000049 00000000 122 ! String to print00000049 00000000 123 !00000049 00000000 124 helstr:00000049 00000000 48 45 4C 4C 4F 2C + 125 defb 'HELLO, FPGA WORLD\cr\lf', 00000005D 00000000 + 1260000005D 00000000 + 127
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