URL
https://opencores.org/ocsvn/cpu8080/cpu8080/trunk
Subversion Repositories cpu8080
[/] [cpu8080/] [trunk/] [project/] [testbench_summary.html] - Rev 2
Go to most recent revision | Compare with Previous | Blame | View Log
<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD> <BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'> <TABLE BORDER CELLSPACING=0 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'> <TD COLSPAN='4'><B>CPU8080 Project Status</B></TD></TR> <TR ALIGN=LEFT> <TD BGCOLOR='#FFFF99'><B>Project File:</B></TD> <TD>cpu8080.ise</TD> <TD BGCOLOR='#FFFF99'><B>Current State:</B></TD> <TD>Synthesized</TD> </TR> <TR ALIGN=LEFT> <TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD> <TD>testbench</TD> <TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD> <TD ALIGN=LEFT>No Errors</TD> </TR> <TR ALIGN=LEFT> <TD BGCOLOR='#FFFF99'><B>Target Device:</B></TD> <TD>xc3s200-5pq208</TD> <TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD> <TD ALIGN=LEFT>No Warnings</TD> </TR> <TR ALIGN=LEFT> <TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD> <TD>ISE 8.2.02i</TD> <TD BGCOLOR='#FFFF99'><UL><LI><B>Updated:</B></LI></UL></TD> <TD>Fri Oct 6 08:33:24 2006</TD> </TR> </TABLE> <BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>CPU8080 Partition Summary</B></TD></TR> <TR><TD COLSPAN='4'>No partition information was found.</TD></TR> </TABLE> <BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>Device Utilization Summary (estimated values)</B></TD></TR> <TR ALIGN=CENTER BGCOLOR='#FFFF99'> <TD ALIGN=LEFT><B>Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD><B>Utilization</B></TD></TR> <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slices</TD> <TD ALIGN=RIGHT>1139</TD> <TD ALIGN=RIGHT>1920</TD> <TD ALIGN=RIGHT>59%</TD> </TR> <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Slice Flip Flops</TD> <TD ALIGN=RIGHT>371</TD> <TD ALIGN=RIGHT>3840</TD> <TD ALIGN=RIGHT>9%</TD> </TR> <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of 4 input LUTs</TD> <TD ALIGN=RIGHT>2153</TD> <TD ALIGN=RIGHT>3840</TD> <TD ALIGN=RIGHT>56%</TD> </TR> <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded IOBs</TD> <TD ALIGN=RIGHT>33</TD> <TD ALIGN=RIGHT>141</TD> <TD ALIGN=RIGHT>23%</TD> </TR> <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of BRAMs</TD> <TD ALIGN=RIGHT>1</TD> <TD ALIGN=RIGHT>12</TD> <TD ALIGN=RIGHT>8%</TD> </TR> <TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of GCLKs</TD> <TD ALIGN=RIGHT>2</TD> <TD ALIGN=RIGHT>8</TD> <TD ALIGN=RIGHT>25%</TD> </TR> </TABLE> <BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='6'><B>Detailed Reports</B></TD></TR> <TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD> <TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT><B>Infos</B></TD></TR> <TR ALIGN=LEFT><TD><A HREF_DISABLED='testbench.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Thu Oct 5 23:01:08 2006</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD></TR> <TR ALIGN=LEFT><TD>Translation Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> <TR ALIGN=LEFT><TD>Map Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> <TR ALIGN=LEFT><TD>Place and Route Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> <TR ALIGN=LEFT><TD>Static Timing Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> <TR ALIGN=LEFT><TD>Bitgen Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD></TR> </TABLE> <BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'> <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='3'><B>Secondary Reports</B></TD></TR> <TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD></TR> <TR ALIGN=LEFT><TD>Xplorer Report</TD><TD> </TD><TD> </TD></TR> </TABLE> </BODY></HTML>
Go to most recent revision | Compare with Previous | Blame | View Log